Local Area Network (LIN) Enhanced Physical Interface

www.DataSheet4U.com Freescale Semiconductor Advance Information Document Number: MC33661 Rev. 6.0, 11/2006 Local Area Network (LIN) Enhanced Physical Interface with Selectable Slew Rate Local Interconnect Network (LIN) is a serial communication protocol designed to support automotive networks in conjunction with Controller Area Network (CAN). As the lowest level of a hierarchical network, LIN enables cost-effective communication with sensors and actuators when all the features of CAN are not required. The 33661 is a Physical Layer component dedicated to automotive LIN sub-bus applications. It offers slew rate selection for optimized operation at 10 kbps and 20 kbps, fast baud rate (above 100 kbps) for test and programming modes, excellent radiated emission performance, and safe behavior in the event of LIN bus short-to-ground or LIN bus leakage during low-power mode. The 33661 is compatible with LIN Protocol Specification 2.0. Features • Operational from VSUP 6.0 V to 18 V DC, Functional up to 27 V DC, and Handles 40 V During Load Dump • Active Bus Waveshaping Offering Excellent Radiated Emission Performance • 5.0 kV ESD on LIN Bus Pin • 30 kΩ Internal Pullup Resistor • LIN Bus Short-to-Ground or High Leakage in Sleep Mode • -18 V to +40 V DC Voltage at LIN Pin • 8.0 µA in Sleep Mode • Local and Remote Wake-Up Capability Reported by INH and RXD Pins • 5.0 V and 3.3 V Compatible Digital Inputs Without Any External Components Required • Pb-Free Packaging Designated by Suffix Code EF 33661 LIN PHYSICAL INTERFACE D SUFFIX EF SUFFIX (PB-FREE) 98ASB42564B 8-PIN SOICN ORDERING INFORMATION Device MC33661D/R2 - 40°C to 125°C MCZ33661EF/R2 8 SOICN Temperature Range (TA) Package VPWR 33661 WAKE VDD Regulator 12 V 5.0 V VSUP INH EN MCU RXD TXD LIN GND LIN Bus Figure 1. 33661 Simplified Application Diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2006. All rights reserved. INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM VSUP WAKE EN INH Control 20 µA INH Control RXD Receiver 30 kΩ LIN TXD Slope Control GND Figure 2. 33661 Simplified Internal Block Diagram 33661 2 Analog Integrated Circuit Device Data Freescale Semiconductor PIN CONNECTIONS PIN CONNECTIONS RXD EN WAKE TXD 1 2 3 4 8 7 6 5 INH VSUP LIN GND Figure 3. 33661 8-SOICN Pin Connections Table 1. 33661 8-SOICN Pin Definitions A functional description of each pin can be found in the Functional Pin Description section beginning on page page 12. Pin 1 2 3 4 5 6 7 8 Pin Name RXD EN WAKE TXD GND LIN VSUP INH Formal Name Data Output Enable Control Wake Input Data Input Ground LIN Bus Power Supply Inhibit Output Definition MCU interface that reports the state of the LIN bus voltage. Controls the operation mode of the interface. High-voltage input used to wake up the device from Sleep mode. MCU interface to control the state of the LIN output. Device ground pin. Bidirectional pin that represents the single-wire bus transmitter and receiver. Device power supply pin. This pin can have two main functions: controlling an external switchable voltage regulator having an inhibit input or driving a bus external resistor in the master node application. 33661 Analog Integrated Circuit Device Data Freescale Semiconductor 3 ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Table 2. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Ratings ELECTRICAL RATINGS Power Supply Voltage Continuous Supply Voltage Transient Voltage (Load Dump) WAKE DC and Transient Voltage (Through a 33 kΩ Serial Resistor) Logic Voltage (RXD, TXD, EN Pins) LIN Bus Voltage DC Voltage Transient (Coupled Through 1.0 nF Capacitor) INH Voltage / Current DC Voltage DC Current ESD Voltage (1) Human Body Model All Pins LIN Pin with Respect to Ground Machine Model THERMAL RATINGS Operating Temperature Ambient Junction Storage Temperature Thermal Resistance, Junction to Ambient Peak Package Reflow Temperature During Reflow Thermal Shutdown Temperature Thermal Shutdown Hysteresis Temperature (2), (3) Symbol Value Unit VSUP 27 40 VWAKE VLOG VBUS -18 to 40 -150 to 100 VINH IINH VESD1 ± 2000 ± 5000 VESD2 ± 200 - 0.3 to VSUP + 0.3 40 -18 to 40 - 0.3 to 5.5 V V V V V mA V °C TA TJ TSTG RθJA TPPRT TSHUT THYST - 40 to 125 - 40 to 150 - 40 to 150 150 Note 3. 150 to 200 8.0 to 20 °C °C/W °C °C °C Notes 1 ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 Ω), ESD2 testing is performed in accordance with the Machine Model (CZAP = 220 pF, RZAP = 0 Ω). 2 3. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. 33661 4 Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics Characteristics noted under conditions 7.0 V ≤ VSUP ≤ 18 V, - 40°C ≤ TA ≤ 125°C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted. Characteristic VSUP PIN (DEVICE POWER SUPPLY) Supply Voltage Nominal DC Functional DC, TA ≥ 25°C Supply Current in Sleep Mode VSUP ≤ 13.5 V, Recessive State 13.5 V < VSUP < 18 V VSUP ≤ 13.5 V, Dominant State or Shorted to GND Supply Current in Normal, Slow, or Fast Mode Bus Recessive, Excluding INH Output Current Bus Dominant, Total Bus Load > 500 Ω, Excluding INH Output Current RXD OUTPUT PIN (LOGIC) Low-Level Output Voltage IIN ≤ 1.5 mA High-Level Output Voltage VEN = 5.0 V, IOUT ≤ 250 µA VEN = 3.3 V, IOUT ≤ 250 µA TXD INPUT PIN (LOGIC) Low-Level Input Voltage High-Level Input Voltage Input Threshold Voltage Hysteresis Pullup Current Source VEN = 5.0 V, 1.0 V < VTXD < 3.5 V EN INPUT PIN (LOGIC) Low-Level Input Voltage High-Level Input Voltage Input Voltage Threshold Hysteresis Low-Level Input Current VIN = 1.0 V High-Level Input Current VIN = 4.0 V IIH — 20 40 VIL VIH VINHYST IIL 5.0 20 30 µA — 2.5 100 — — 300 1.2 — 800 V V mV µA VIL VIH VINHYST IPU - 60 - 35 - 20 — 2.5 100 — — 300 1.2 — 800 V V mV µA VOH 4.25 3.0 — — 5.25 3.5 VOL 0 — 0.9 V V IS(REC) IS(DOM) — — 4.0 6.0 6.0 8.0 IS1 IS2 IS3 — — — 8.0 — 300 12 200 — mA VSUP 7.0 6.0 13.5 — 18.0 — µA V Symbol Min Typ Max Unit 33661 Analog Integrated Circuit Device Data Freescale Semiconductor 5 ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 7.0 V ≤ VSUP ≤ 18 V, - 40°C ≤ TA ≤ 125°C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted. Characteristic LIN PIN (VOLTAGE EXPRESSED VERSUS VSUP VOLTAGE) Low-Level Bus Voltage (Dominant State) External Bus Pullup 500 Ω High-Level Bus Voltage (Recessive State) TXD HIGH, IOUT = 1.0 µA Internal Pullup Resistor to VSUP (Normal Mode) Internal Pullup Current Source (Sleep Mode) Overcurrent Shutdown Threshold Leakage Current to GND Recessive State, 8.0 V ≤ VSUP ≤ 18 V, 8.0 V ≤ VLIN ≤ 18 V GND Disconnected, VGND = VSUP, VLIN at - 18 V VSUP Disconnected, VLIN at +18 V LIN Receiver, Low-Level Input Voltage TXD HIGH, RXD LOW LIN Receiver, High-Level Input Voltage TXD HIGH, RXD HIGH LIN Receiver Threshold Center (VLINH - VLINL) / 2 LIN Receiver Input Voltage Hysteresis VLINH - VLINL LIN Wake-Up Threshold Voltage INH OUTPUT PIN Driver ON Resistance (Normal Mode) Leakage Current (Sleep Mode) 0 V < VINH < VSUP WAKE INPUT PIN Typical Wake-Up Threshold Voltage (EN = 0 V, 7.0 V ≤ VSUP ≤ 18 V) (5) HIGH-to-LOW Transition LOW-to-HIGH Transition Wake-Up Threshold Voltage Hysteresis WAKE Input Current VWAKE < 27 V VWUHYST IWU — 1.0 5.0 VWUTH 0.3 VSUP 0.4 VSUP 0.1 VSUP 0.43 VSUP 0.55 VSUP 0.16 VSUP 0.55 VSUP 0.65 VSUP 0.2 VSUP V µA V INHON ILEAK 0 — 5.0 — 35 70 Ω µA VLINWU VLINHYST — — — 0.5 VSUP 0.175 VSUP — V VLINTH 0.475 VSUP 0.5 VSUP 0.525 VSUP V VLINH 0.6 VSUP — VSUP V VLINL 0 VSUP — 0.4 VSUP V RPU IPU IOV-CUR ILEAK 0 - 1.0 — 3.0 — 1.0 20 1.0 10 µA mA µA V VREC VSUP - 1.0 20 — 50 — 30 20 75 — 47 — 150 kΩ µA mA VDOM — — 1.4 V V Symbol Min Typ Max Unit Notes 4 This parameter is guaranteed by design; however, it is not production tested. 5 When VSUP > 18 V, the wake-up voltage thresholds remain identical to the wake-up thresholds at 18 V. 33661 6 Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 4. Dynamic Electrical Characteristics Characteristics noted under conditions 7.0 V ≤ VSUP ≤ 18 V, - 40°C ≤ TA ≤ 125°C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted. Characteristic LIN OUTPUT TIMING CHARACTERISTICS FOR NORMAL MODE Dominant Propagation Delay Time TXD to LIN (6) Measurement Threshold (50% TXD to 58.1% VSUP) Measurement Threshold (50% TXD to 28.4% VSUP) Recessive Propagation Delay Time TXD to LIN (6) Measurement Threshold (50% TXD to 42.2% V