Eight-Output Switch

www.DataSheet4U.com Freescale Semiconductor Technical Data Document Number: MC33291 Rev. 4.0, 10/2006 Eight-Output Switch with Serial Peripheral Interface I/O The 33291 device is an eight-output, low-side power switch with 8bit serial input control. The 33291 is a versatile circuit designed for automotive applications, but is well suited for other environments. The 33291 incorporates SMARTMOS technology, with CMOS logic, bipolar/MOS analog circuitry, and DMOS power MOSFETs. The 33291 interfaces directly with a microcontroller to control various inductive or incandescent loads. The circuit’s innovative monitoring and protection features include very low standby current, SPI cascade fault reporting capability, internal 53 V clamp on each output, output-specific diagnostics, and independent shutdown of outputs. The device is parametrically specified over an ambient temperature range of -40°C ≤ TA ≤ 125°C and 9.0 V ≤ VPWR ≤ 16 V supply. Features • Designed to Operate Over Wide Supply Voltages of 5.5 V to 26.5 V • Interfaces to Microprocessor Using 8-Bit SPI I/O Protocol up to 3.0 MHz • 1.0 A Peak Current Outputs with Maximum RDS(ON) of 1.6 Ω at TJ 150°C • Outputs Current-Limited to Accommodate In-Rush Currents Associated with Switching Incandescent Loads • Output Voltages Clamped to 53 V During Inductive Switching • Maximum Sleep Current (IPWR) of 25 µA • Maximum of 4.0 mA IDD During Operation • Pb-Free Packaging Designated by Suffix Code EG 33291 LOW-SIDE SWITCH DW SUFFIX EG SUFFIX (PB-FREE) 98ASB42344B 24-PIN SOICW ORDERING INFORMATION Device MC33291DW/R2 -40°C to 125°C MCZ33291EG/R2 24 SOICW Temperature Range (TA) Package VDD V PWR 33291 VPWR SFPD VDD CS MCU SCLK SI SO RESET OP 0 OP 1 OP 2 OP 3 OP 4 OP 5 OP 6 OP 7 GND Figure 1. 33291 Simplified Application Schematic Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as may be required, to permit improvements in the design of its products. © Freescale Semiconductor, Inc., 2006. All rights reserved. VPWR 21 Output 0 Overvoltage Voltage Regulator GE OVD OT VDD SF RB OF SFPD SFL CS SPI SCLK Interface SI Logic SO CSI CSBI 24 Bias 53 V VDD 16 SFPD 15 RST 22 + 10 µA 25 µA + 10 µA Fault Timers 10 µA + 10 µA Gate Control To Gates 1–7 Outputs 1, 2, 11–14, 23 CS 10 SCLK 3 SI 4 SO 9 Open Load Detect lLimit + - Short Circuit Detect RS Grounds Overtemperature Detect From Detectors 1–7 5–8, 17–20 Serial D/O Line Driver Figure 2. 33291 Simplified Block Diagram Table 1. Fault Operation SERIAL OUTPUT (SO) PIN REPORTS Overvoltage Overtemperature Overcurrent Output ON, Open Load Fault Output OFF, Open Load Fault DEVICE SHUTDOWNS Overvoltage Overtemperature Overcurrent Total device shutdown at VPWR = 28 V to 36 V. All outputs are latched off while the SPI register is reset (cleared). Outputs can be turned back on with a new SPI command after VPWR has decayed below 26.5 V. Only the output experiencing an overtemperature condition turns OFF. Only the output experiencing an overcurrent shuts down at 1.0 A to 3.0 A after a 70 µs to 250 µs delay, with SFPD pin grounded. All other outputs will continue to operate in a current limit mode with no shutdown if the SFPD pin is at 5.0 V (so long as the individual outputs are not experiencing thermal limit conditions). Overvoltage condition reported. Fault reported by Serial Output (SO) pin. SO pin reports short to battery/supply or overcurrent condition. Not reported. SO pin reports output OFF open load condition. 33291 2 Analog Integrated Circuit Device Data Freescale Semiconductor PIN CONNECTIONS PIN CONNECTIONS OP7 OP6 SCLK SI GND GND GND GND SO CS OP5 OP4 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 OP0 OP1 RST VPWR GND GND GND GND VDD SFPD OP2 OP3 Figure 3. 33291 Pin Connections Table 2. Pin Definitions Pin 1 2 3 4 5 – 8, 17 – 20 9 10 11 12 13 14 15 16 21 22 23 24 Pin Name OP7 OP6 SCLK SI GND SO CS OP5 OP4 OP3 OP2 SFPD VDD VPWR RST OP1 OP0 Formal Name Output 7 Output 6 System Clock Serial Input Ground Serial Output Chip Select Output 5 Output 4 Output 3 Output 2 Short Fault Protect Disable Logic Supply Output MOSFET Gate Drive Supply Reset Output 1 Output 0 Definition Connection to drain of output MOSFET number seven. Connection to drain of output MOSFET number six. Clocks the internal Shift registers of the 33291. This pin is for the input of serial instruction data. SI information is read on the falling edge of SCLK. Connection to IC Power Ground and functions as part of heat sinking path. Tri-stateable output from the Shift register. Whenever this pin is in a logic low state, data can be transferred from the MCU to the 33291 through the SI pin and from the 33291 to the MCU through the SO pin. Connection to drain of output MOSFET number five. Connection to drain of output MOSFET number four. Connection to drain of output MOSFET number three. Connection to drain of output MOSFET number two. This pin is used to prevent the outputs from latching-OFF because of an overcurrent condition. Plus supply for logic. Main power supply. This pin is active low. It is used to clear the SPI Shift register, thereby setting all output switches OFF. Connection to drain of output MOSFET number one. Connection to drain of output MOSFET number zero. 33291 Analog Integrated Circuit Device Data Freescale Semiconductor 3 ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Table 3. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Rating Power Supply Voltage Normal Operation (Steady-State) Transient Conditions (12) Logic Supply Voltage Input Pin Voltage (3) Output Clamp Voltage (4) 5.0 mA ≤ IOUT ≤ 0.5 A Output Self-Limit Current Continuous Per Output Current ESD Voltage (6) (7) (4) (5) (2) Symbol Value Unit V VPWR(SUS) VPWR(PK) VDD VIN VOUT(OFF) -1.5 to 26.5 -13 to 60 -0.3 to 7.0 -0.3 to 7.0 V V V 45 to 65 IOUT(LIM) , IOUT(CONT) VESD1 VESD2 1.0 to 3.0 500 A mA V Human Body Model Machine Model (7) Output Clamp Energy ±2000 ±200 50 3.0 -55 to 150 -40 to 125 -40 to 150 2.0 Note 11. mJ MHz (8) ECLAMP fSPI TSTG TC TJ PD TPPRT Recommended Frequency of SPI Operation Storage Temperature Operating Case Temperature Operating Junction Temperature Power Dissipation (TA = 25°C) (9) Peak Package Reflow Temperature During Reflow (10), (11) °C °C °C W °C Notes 1. Transient capability with external 100 Ω resistor in series with VPWR pin and supply. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. Exceeding these limits may cause a malfunction or permanent damage to the device. Exceeding the limits on SCLK, SI, CS, SFPD, or RST pins may cause permanent damage to the device. With output OFF. Continuous output current rating so long as maximum junction temperature is not exceeded. Operation at 125°C ambient temperature will require maximum output current computation using package RθJA. ESD data available upon request. ESD1 testing is performed in accordance with the Human Body Model (CZAP = 200 pF, RZAP = 1500 Ω), ESD2 testing is performed in accordance with the Machine Model (CZAP = 200pF, RZAP = 0 Ω). Maximum output clamp energy capability at 150°C junction temperature using a single non-repetitive pulse method. Maximum power dissipation at indicated junction temperature with no heat sink used. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. 33291 4 Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Table 3. Maximum Ratings (continued) All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Rating Thermal Resistance Junction-to-Ambient (Natural Convection, Single-Layer Board) (12), (13) Junction-to-Ambient (Natural Convection, Four-Layer Board) (12), (14) Junction to Board (15) RθJA RθJMA RθJL 68 44 20 Symbol Value Unit °C/W Notes 12. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance. 13. Per SEMI G38-87 and JEDEC JESD51-2 with the single layer board (JESD51-3) horizontal. 14. Per JEDEC JESD51-6 with the board (JESD51-7) horizontal. 15. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. 33291 Analog Integrated Circuit Device Data Freescale Semiconductor 5 ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 4. Static Electrical Characteristics Characteristics noted under conditions 4.5 V ≤ VDD ≤ 5.5 V, 9.0 V ≤ VPWR ≤ 16 V, -40°C ≤ TA ≤ 125°C, unless otherwise noted. Typical values noted reflect the approximate value with VBAT = 13 V, TA = 25°C. Characteristic POWER INPUT Supply Voltage Range Quasi-Functional (16) Fully Operational Supply Current (All Outputs ON, IOUT = 0.5 A) Sleep State Supply Current at RST ≤ 0.2 VDD and/or VDD < 0.5 V Sleep State Output Leakage Current (Per Output, RST = 0 V) Overvoltage Shutdown Overvoltage Shutdown Hysteresis (17) Logic Supply Voltage Logic Supply Current (18) RST ≥ 0.7 VDD RST ≤ 0.5 V Symbol Min Typ Max Unit V VPWR(QF) VPWR(FO) VPWR(ON) IPWR(ON) IPWR(SS) VOV VOV(HYS) VDD IDD – – (