Hex D Flip-Flop

www.DataSheet4U.com MC74HC174A Hex D Flip−Flop with Common Clock and Reset High−Performance Silicon−Gate CMOS The MC74HC174A is identical in pinout to the LS174. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of six D flip−flops with common Clock and Reset inputs. Each flip−flop is loaded with a low−to−high transition of the Clock input. Reset is asynchronous and active−low. Features 16 1 http://onsemi.com MARKING DIAGRAMS 16 PDIP−16 N SUFFIX CASE 648 1 16 16 1 SOIC−16 D SUFFIX CASE 751B 1 16 16 1 TSSOP−16 DT SUFFIX CASE 948F 1 16 16 1 SOEIAJ−16 F SUFFIX CASE 966 1 74HC174A ALYWG HC 174A ALYWG G HC174AG AWLYWW MC74HC174AN AWLYYWWG • • • • • Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 mA In Compliance with the Requirements Defined by JEDEC Standard No. 7A • Chip Complexity: 162 FETs or 40.5 Equivalent Gates • Pb−Free Packages are Available* A = Assembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week G = Pb−Free Package G = Pb−Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 1 December, 2006 − Rev. 10 Publication Order Number: MC74HC174A/D MC74HC174A D0 RESET Q0 D0 D1 Q1 D2 Q2 GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Q5 D5 D4 Q4 D3 Q3 CLOCK RESET 1 DATA INPUTS D1 D2 D3 D4 D5 CLOCK 3 4 6 11 13 14 9 PIN 16 = VCC PIN 8 = GND 2 5 7 10 12 15 Q0 Q1 Q2 Q3 Q4 Q5 NONINVERTING OUTPUTS Figure 1. Pin Assignment Figure 2. Logic Diagram FUNCTION TABLE Inputs Reset L H H H H L Clock X D X H L X X Output Q L H L No Change No Change DESIGN/VALUE TABLE Design Criteria Internal Gate Count* Internal Gate Propagation Delay Internal Gate Power Dissipation Speed Power Product *Equivalent to a two−input NAND gate. Value 40.5 1.5 5.0 0.0075 Units ea. ns mW pJ ORDERING INFORMATION Device MC74HC174AN MC74HC174ANG MC74HC174AD MC74HC174ADG MC74HC174ADR2 MC74HC174ADR2G MC74HC174ADTR2 MC74HC174ADTR2G MC74HC174AFEL MC74HC174AFELG Package PDIP−16 PDIP−16 (Pb−Free) SOIC−16 SOIC−16 (Pb−Free) SOIC−16 SOIC−16 (Pb−Free) TSSOP−16* TSSOP−16* SOEIAJ−16 SOEIAJ−16 (Pb−Free) Shipping† 500 Units / Rail 500 Units / Rail 48 Units / Rail 48 Units / Rail 2500 Units / Reel 2500 Units / Reel 2500 Units / Reel 2500 Units / Reel 2000 Units / Reel 2000 Units / Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. http://onsemi.com 2 MC74HC174A MAXIMUM RATINGS Symbol VCC VIN VOUT IIN IOUT ICC TSTG TL TJ qJA DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Current, per Pin DC Output Current, per Pin DC Supply Current, VCC and GND Pins Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature Under Bias Thermal Resistance PDIP SOIC TSSOP PDIP SOIC TSSOP PDIP, SOIC, TSSOP Parameter (Referenced to GND) (Referenced to GND) (Referenced to GND) (Note 1) Value *0.5 to )7.0 *1.5 to VCC )1.5 *0.5 to VCC )0.5 $20 $25 $50 *65 to )150 260 )150 78 112 148 750 500 450 Level 1 Oxygen Index: 30% − 35% Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Above VCC and Below GND at 85_C (Note 5) UL 94 V−0 @ 0.125 in. u2000 u100 u500 $300 V Unit V V V mA mA mA _C _C _C _C/W PD Power Dissipation in Still Air at 85_C mW MSL FR VESD Moisture Sensitivity Flammability Rating ESD Withstand Voltage ILATCHUP Latchup Performance mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. IO absolute maximum rating must be observed. 2. Tested to EIA/JESD22−A114−A. 3. Tested to EIA/JESD22−A115−A. 4. Tested to JESD22−C101−A. 5. Tested to EIA/JESD78. 6. For high frequency or heavy load considerations, see the ON Semiconductor High−Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Symbol VCC DC Supply Voltage Parameter (Referenced to GND) Min 2.0 0 Max 6.0 Unit V V ÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎÎ Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î VIN, VOUT TA DC Input Voltage, Output Voltage (Referenced to GND) (Note 7) VCC Operating Temperature, All Package Types *55 0 0 0 0 )125 1000 700 500 400 _C ns tr, tf CLOCK Input Rise and Fall Time (Figure 4) VCC = 2.0 V VCC = 3.3 V VCC = 4.5 V VCC = 6.0 V 7. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level. http://onsemi.com 3 MC74HC174A DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) VCC Symbol VIH Parameter Minimum High−Level Input Voltage Test Conditions VOUT = 0.1 V or VCC – 0.1 V |IOUT| v 20 mA VOUT = 0.1 V or VCC – 0.1 V |IOUT| v 20 mA VIN = VIH or VIL |IOUT| v 20 mA V 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 6.0 6.0 Guaranteed Limit *55_C to 25_C 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 v85_C 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 v125_C 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 Unit V ÎÎ Î Î Î ÎÎ ÎÎ ÎÎ Î Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î Î Î ÎÎ ÎÎ Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ ÎÎ Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ VIL Maximum Low−Level Input Voltage V VOH Minimum High−Level Output Voltage V VIN = VIH or VIL |IOUT| v 4.0 mA |IOUT| v 5.2 mA VIN = VIH or VIL |IOUT| v 20 mA 3.98 5.48 0.1 0.1 0.1 3.84 5.34 0.1 0.1 0.1 VOL Maximum Low−Level Output Voltage V VIN = VIH or VIL |IOUT| v 4.0 mA |IOUT| v 5.2 mA 0.26 0.26 0.33 0.33 IIN Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) VIN = VCC or GND $0.1 4.0 $1.0 40 $1.0 160 mA mA ICC VIN = VCC or GND IOUT = 0 mA 8. Information on typical parametric values, along with high frequency or heavy load considerations, can be found in the ON Semiconductor High−Speed CMOS Data Book (DL129/D). AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns) Symbol fmax Parameter Maximum Clock Frequency (50% Duty Cycle) (Figures 4 and 7) Maximum Propagation Delay, Clock to Q (Figures 5 and 7) VCC V 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Guaranteed Limit *55_C to 25_C 6.0 30 35 v85_C 4.8 24 28 v125_C 4.0 20 24 Unit MHz ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î ÎÎ Î Î Î ÎÎ ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ