Microcontrollers

www.DataSheet4U.com MC68HC908QL4 Data Sheet M68HC08 Microcontrollers MC68HC908QL4 Rev. 7 10/2006 freescale.com MC68HC908QL4 Data Sheet To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://www.freescale.com Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. This product incorporates SuperFlash® technology licensed from SST. © Freescale Semiconductor, Inc., 2006. All rights reserved. MC68HC908QL4 Data Sheet, Rev. 7 Freescale Semiconductor 3 Revision History The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location. Revision History (Sheet 1 of 2) Date September, 2003 Revision Level N/A Initial release 17.3 Functional Operating Range — Corrected operating voltage range November, 2003 17.6 Control Timing — Corrected values for internal operating frequency and internal clock period 17.14 5.0-Volt ADC Characteristics — Replaced ADC characteristic table found in initial release 17.15 3.3-Volt ADC Characteristics — Added March, 2004 Continued on next page Figure 2-2. Control, Status, and Data Registers Corrected reset state for the FLASH Block Protect Register. Corrected reset value for the Internal Oscillator Time Value 2.0 Table 7-1. Instruction Set Summary — Added WAIT instruction 11.8.1 Oscillator Status and Control Register — Revised description of ECGON bit for clarity Table 13-3. Interrupt Sources — Corrected address locations for SLIC, KBI, and ADC 14.3.5 SLIC Wait (Core Specific) — Revised description for clarity 14.3.7 SLIC Stop (Core Specific) — Revised description for clarity 14.6.6.2 Byte Transfer Mode Operation — Revised definition of Receiver Buffer Overrun Error 14.7.1 LIN Message Frame Header — Revised third paragraph of description March, 2004 Continued 2.0 14.14 Sleep and Wakeup Operation — Revised second paragraph of description 15.8 Input/Output Signals — Corrected reference from PTA0/TCH) to PTB0/TCH0 15.8.2 TIM Channel I/O Pins (PTB0/TCH0 and PTA1/TCH1) — Corrected reference to from PTA0/TCH) to PTB0/TCH0 Figure 16-1. Block Diagram Highlighting BRK and MON Blocks — Added 17.5 5-V DC Electrical Characteristics — Updated table notes 17.8 5-V Oscillator Characteristics — Updated table notes 17.9 3.3-V DC Electrical Characteristics — Updated table notes June, 2004 3.0 Modular sections reworked for clarity. Description Page Number(s) N/A 226 228 236 237 33 34 83 117 140 144 144 156 161 174 196 196 206 227 230 231 Throughout 1.0 MC68HC908QL4 Data Sheet, Rev. 7 4 Freescale Semiconductor Revision History (Sheet 2 of 2) Date Revision Level Description Updated to final Freescale format. Corrections per email review. Replaced ADC chapter with latest. Table 1-3. Function Priority in Shared Pins — Updated entry for PTA2 December, 2004 4.0 Figure 1-2. MCU Pin Assignments — Corrected pin assignments for the TSSOP packages. 17.11 Oscillator Characteristics — Updated deviation from trimmed internal oscillator specifications. 17.8 3.3-V DC Electrical Characteristics — Corrected capacitance values 17.11 Oscillator Characteristics — Corrected Note 8 13.4.1 External Pin Reset — Corrected location of RSTEN bit from CONFIG1 to CONFIG2. August, 2005 5.0 13.4.2 Active Resets from Internal Sources — Corrected location of RSTEN bit from CONFIG1 to CONFIG2. Chapter 18 Ordering Information and Mechanical Specifications — Replaced case outlines with appropriate 98A drawing. September, 2005 6.0 Figure 2-1. Memory Map — Corrected address labels. Removed all references to the MC68HC908QL3 and MC68HC908QL2. 1.6 Unused Pin Termination — Added new section. Chapter 4 Auto Wakeup Module (AWU) — Updated entire section for clarity. 12.2 Unused Pin Termination — Added new section. October, 2006 7.0 The following sections were updated to show that a break interrupt inhibits input captures: 15.6 TIM During Break Interrupts 16.2.1.2 TIM During Break Interrupts Updated DC injection current specification in the following subsections: 17.5 5-V DC Electrical Characteristics 17.8 3.3-V DC Electrical Characteristics Page Number(s) Throughout 23 21 210 208 211 120 120 219 26 Throughout 24 57 111 179 189 204 207 MC68HC908QL4 Data Sheet, Rev. 7 Freescale Semiconductor 5 Revision History MC68HC908QL4 Data Sheet, Rev. 7 6 Freescale Semiconductor List of Chapters Chapter 1 General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Chapter 2 Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Chapter 3 Analog-to-Digital Converter (ADC10) Module . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Chapter 4 Auto Wakeup Module (AWU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Chapter 5 Configuration Register (CONFIG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Chapter 6 Computer Operating Properly (COP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 Chapter 7 Central Processor Unit (CPU). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 Chapter 8 External Interrupt (IRQ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Chapter 9 Keyboard Interrupt Module (KBI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89 Chapter 10 Low-Voltage Inhibit (LVI). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97 Chapter 11 Oscillator Module (OSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 Chapter 12 Input/Output Ports (PORTS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 Chapter 13 System Integration Module (SIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Chapter 14 Slave LIN Interface Controller (SLIC) Module . . . . . . . . . . . . . . . . . . . . . . . . . 133 Chapter 15 Timer Interface Module (TIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173 Chapter 16 Development Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187 Chapter 17 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203 Chapter 18 Ordering Information and Mechanical Specifications . . . . . . . . . . . . . . . . . . 219 MC68HC908QL4 Data Sheet, Rev. 7 Freescale Semiconductor 7 List of Chapters MC68HC908QL4 Data Sheet, Rev. 7 8 Freescale Semiconductor Table of Contents Chapter 1 General Description 1.1 1.2 1.3 1.4 1.5 1.6 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MCU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Function Priority. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unused Pin Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 19 21 21 24 24 Chapter 2 Memory 2.1 2.2 2.3 2.4 2.5 2.6 2.6.1 2.6.2 2.6.3 2.6.4 2.6.5 2.6.6 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unimplemented Memory Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reserved Memory Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Direct Page Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Random-Access Memory (RAM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FLASH Memory (FLASH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FLASH Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FLASH Page Erase Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FLASH Mass Erase Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FLASH Program Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FLASH Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . FLASH Block Protect Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 25 25 25 34 34 35 36 37 38 40 40 Chapter 3 Analog-to-Digital Converter (ADC10) Module 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3.1 Clock Select and Divide Circuit . . . . . . . . . .