(MC68HC908GR4A / MC68HC908GR8A) Microcontrollers

MC68HC908GR8A MC68HC908GR4A Data Sheet M68HC08 Microcontrollers www.DataSheet4U.com MC68HC908GR8A Rev. 5 04/2007 freescale.com MC68HC908GR8A MC68HC908GR4A Data Sheet To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com/ Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. This product incorporates SuperFlash® technology licensed from SST. © Freescale Semiconductor, Inc., 2005, 2007. All rights reserved. MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5 Freescale Semiconductor 3 Revision History The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location. Revision History Date April, 2003 Revision Level 0 Initial release Module construction and style updated to meet current publications standards. IRQ1 changed to IRQ Mask option register changed to configuration register Deleted references to DMA module and bits FLASH memory operation details updated 3.3.4 Conversion — Clarified ADC details 3.7.1 ADC Status and Control Register — Corrected COCO bit functionality Table 4-1. Numeric Example — Corrected and improved examples Table 4-4. Example Filter Component Values — Added more values Chapter 5 Configuration Register (CONFIG) — Updated COP timeout selections 6.2 Functional Description — Updated block diagram and timeout values Table 7-1. Instruction Set Summary — Corrected STOP and added WAIT instruction 8.3 Functional Description — Updated IRQ description 8.4 IRQ Pin — Updated IRQ description October, 2004 1 Chapter 12 Input/Output (I/O) Ports — Corrected Figures 12-4, 12-11, 12-15 Figure 13-3. SCI Module Block Diagram — Corrected diagram Figure 13-5. SCI Transmitter — Updated diagram Figure 13-6. SCI Receiver Block Diagram — Updated Diagram Chapter 14 System Integration Module (SIM) — Clarified SIM features and functionality 16.3 Functional Description — Updated TBM description Table 17-3. Mode, Edge, and Level Selection — Added software compare condition Chapter 18 Development Support — Combined Break and Monitor Mode modules 18.2.1 Functional Description — Corrected Break description 18.3 Monitor Module (MON) — Reworked for clarity 19.5 5.0 V DC Electrical Characteristics — Changed VTST max to 8.5 V 19.6 3.0 V DC Electrical Characteristics — Changed VTST max to 8.5 V 19.15.1 CGM Component Specifications — Corrected and updated values 19.15.2 CGM Electrical Specifications — Corrected and updated values 19.17 Memory Characteristics — Updated memory characteristics table Description Page Number(s) N/A Throughout Throughout Throughout Throughout 40—42 50 51 61 73 75, 76 79, 80 92, 93 95 97 118, 123, 126 134 136 139 157—173 195 213 215—230 215 221 233 234 247 247 248 MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5 4 Freescale Semiconductor Revision History Date October, 2004 Revision Level 2 Description 19.17 Memory Characteristics — Corrected values for FLASH read bus clock frequency. 19.2 Absolute Maximum Ratings — Corrected value for supply voltage June, 2005 19.5 5.0 V DC Electrical Characteristics — Corrected stop IDD and I/O ports Hi-Z leakage current values. 19.6 3.0 V DC Electrical Characteristics — Corrected stop IDD and I/O ports Hi-Z leakage current values. 20.3 Package Dimensions — Updated package information. March, 2006 April, 2007 4 10.5 Clock Generator Module (CGM) — Updated description to remove erroneous information. Chapter 5 Configuration Register (CONFIG) — Replaced COPCLK with CGMXCLK and corrected what set and cleared indicate for bit CONFIG1_COPRS 10.6.2 Stop Mode — Replaced COPCLK with CGMXCLK Page Number(s) 248 229 231 232 247 106 3 5 75 107 MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5 Freescale Semiconductor 5 Revision History MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5 6 Freescale Semiconductor List of Chapters Chapter 1 General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Chapter 2 Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Chapter 3 Analog-to-Digital Converter (ADC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Chapter 4 Clock Generator Module (CGM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Chapter 5 Configuration Register (CONFIG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75 Chapter 6 Computer Operating Properly (COP) Module . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 Chapter 7 Central Processor Unit (CPU). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 Chapter 8 External Interrupt (IRQ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 Chapter 9 Keyboard Interrupt Module (KBI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99 Chapter 10 Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105 Chapter 11 Low-Voltage Inhibit (LVI). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 Chapter 12 Input/Output (I/O) Ports. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 Chapter 13 Serial Communications Interface (SCI) Module . . . . . . . . . . . . . . . . . . . . . . .131 Chapter 14 System Integration Module (SIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157 Chapter 15 Serial Peripheral Interface (SPI) Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175 Chapter 16 Timebase Module (TBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195 Chapter 17 Timer Interface Module (TIM1 and TIM2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199 Chapter 18 Development Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215 Chapter 19 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231 Chapter 20 Ordering Information and Mechanical Specifications . . . . . . . . . . . . . . . . . . 249 MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5 Freescale Semiconductor 7 List of Chapters MC68HC908GR8A • MC68HC908GR4A Data Sheet, Rev. 5 8 Freescale Semiconductor Table of Contents Chapter 1 General Description 1.1 1.2 1.2.1 1.2.2 1.3 1.4 1.5 1.5.1 1.5.2 1.5.3 1.5.4 1.5.5 1.5.6 1.5.7 1.5.8 1.5.9 1.5.10 1.5.11 1.5.12 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standard Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features of the CPU08 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MCU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Supply Pins (VDD and VSS). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oscillator Pins (OSC1 and OSC2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Reset Pin (RST). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Interrupt Pin (IRQ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CGM Power Supply Pins (VDDA and VSSA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Filter Capacitor Pin (VCGMXFC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ADC Power Supply/Reference Pins (VDDAD/VREFH and VSSAD/VREFL). . . . . . . . . . . . . . . . Port A Input/Output (I/O) Pins (PTA3/KBD3–PTA0/KBD0) . . . . . . . . . . . . . . . . . . . . . . . . . Port B I/O Pins (PTB5/AD5–PTB0/AD0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Port C I/O Pins (PTC1 and PTC0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Port D I/O Pins (PTD6/T2CH0–PTD0/SS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Port E I/O Pins (PTE1/RxD and PTE0/TxD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 19 19 20 21 22 23 23 23 23 23 24 24 24 24 24 24 24 25 Chapter 2 Memory 2.1 2.2 2.3 2.4 2.5 2.6 2.6.1 2.6.2 2.6.3 2.6.4 2.6.5 2.6.6 2.6.7 2.6.8 2.6.9 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unimplemented Memory Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reserved Memory Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input/Output (I/O) Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Random-Access Memory (RAM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .