(MC68HC08GTxx) Microcontrollers

MC68HC908GT16 MC68HC908GT8 MC68HC08GT16 Data Sheet M68HC08 Microcontrollers www.DataSheet4U.com MC68HC908GT16 Rev. 5.0 04/2007 freescale.com MC68HC908GT16 MC68HC908GT8 MC68HC08GT16 Data Sheet To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. This product incorporates SuperFlash® technology licensed from SST. © Freescale Semiconductor, Inc., 2007. All rights reserved. MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0 Freescale Semiconductor 3 Revision History The following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location. Revision History (Sheet 1 of 2) Date March, 2002 Revision Level N/A Original release 7.2 Features — Corrected third bulleted item to reflect ±4 percent variability Figure 15-1. Forced Monitor Mode (Low) — Reworked for clarity Figure 15-2. Forced Monitor Mode (High) — Reworked for clarity May, 2002 Figure 15-3. Standard Monitor Mode — Reworked for clarity 1.0 Table 15-1. Monitor Mode Signal Requirements and Options — Reworked for clarity Figure 12-4. Port A I/O Circuit — Reworked to correct pullup resistor Figure 12-11. Port C I/O Circuit — Reworked to correct pullup resistor Figure 12-15. Port D I/O Circuit — Reworked to correct pullup resistor Figure 2-2. Control, Status, and Data Registers — Corrected ESCI arbiter data register (SCIADAT) to reflect read-only status June, 2002 2.0 Figure 14-19. ESCI Arbiter Control Register (SCIACTL) — Corrected address location designator from $0018 to $000A Figure 14-20. ESCI Arbiter Data Register (SCIADAT) — Corrected address location designator from $0019 to $000B Reformatted to meet current publications standards 1.5.6 ADC Reference Pins (VREFH and VREFL) — Corrected connections 2.6.3 Flash Page Erase Operation — Updated procedure 2.6.4 Flash Mass Erase Operation — Updated procedure 2.6.5 Flash Program/Read Operation — Updated procedure 2.6.6 Flash Block Protection — Description updated for clarity 3.3.5 Conversion — Updated for clarity 3.6.3 ADC Voltage Reference High Pin (VREFH) — Corrected connections 3.0 (Continued on next page) 3.6.4 ADC Voltage Reference Low Pin (VREFL) — Corrected connections 3.7.1 ADC Status and Control Register — Updated description of the COCO bit Chapter 4 Configuration Register (CONFIG) — Updated COP tmeout selections Chapter 4 Configuration Register (CONFIG) — Updted SSREC bit usage Chapter 5 Computer Operating Properly (COP) Module — Updated timeout selections Figure 5-1. COP Block Diagram — Updated illustration for clarity Table 6-1. Instruction Set Summary — Updated definitions for STOP and WAIT Figure 7-9. Code Example for Switching Clock Sources — Replaced example code Figure 7-10. Code Example for Enabling the Clock Monitor — Replaced example code Figure 14-18. ESCI Prescaler Register (SCPSC) — Corrected address location Description Page Number(s) N/A 77 211 211 212 214 143 148 151 50 170 171 Throughout 27 41 42 43 45 52 53 53 54 57, 59 60 62 61 70 89 90 172 September, 2004 MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0 4 Freescale Semiconductor Revision History Revision History (Sheet 2 of 2) Date Revision Level Description Chapter 15 System Integration Module (SIM) — Clarified SIM features and functionality 15.7.2 SIM Reset Status Register — Clarified SRSR operation Table 19-1. Monitor Mode Signal Requirements and Options — Reworked 19.2.1 Functional Description — Corrected Break description 3.0 (Continued from previous page) 19.3 Monitor Module (MON) — Reworked Chapter 20 Electrical Specifications — Revised/added tables: 20.5 5.0-V DC Electrical Characteristics 20.6 3.0-V DC Electrical Characteristics 20.7 Supply Current Characteristics 20.8 5-V Control Timing 20.9 3-V Control Timing 20.20 Memory Characteristics — Updated memory table Chapter 20 Electrical Specifications — Added figures: Figure 20-1. RST and IRQ Timing Figure 20-2. RST and IRQ Timing March, 2006 4.0 Appendix A MC68HC08GT16 — Introduces the MC68HC08GT16, the ROM part equivalent to the MC68HC908GT16. 4.2 Functional Description — In the description of the COP Rate Select Bit corrected the values for COP timeout period Figure 5-1. COP Block Diagram — Replaced BUSCLKX4 with COPCLK 14.9.1 ESCI Arbiter Control Register — Replaced one half with one quarter in definition for ACLK = 0 5.0 14.9.3 Bit Time Measurement — Replaced one half with one quarter in definition for ACLK = 0 Revised the following diagrams: Figure 19-10. Forced Monitor Mode (Low) Figure 19-11. Forced Monitor Mode (High) Figure 19-12. Standard Monitor Mode Page Number(s) 179, 182, 183, 184 194 247 237, 240 243 257 258 259 260 260 273 260 260 281 57 61 176 177 September, 2004 April, 2007 245 245 246 MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0 Freescale Semiconductor 5 Revision History MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0 6 Freescale Semiconductor List of Chapters Chapter 1 General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Chapter 2 Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Chapter 3 Analog-to-Digital Converter (ADC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Chapter 4 Configuration Register (CONFIG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Chapter 5 Computer Operating Properly (COP) Module . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Chapter 6 Central Processor Unit (CPU). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 Chapter 7 Internal Clock Generator (ICG) Module) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77 Chapter 8 External Interrupt (IRQ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 Chapter 9 Keyboard Interrupt Module (KBI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 Chapter 10 Low-Voltage Inhibit (LVI). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 Chapter 11 Low-Power Modes (MODES). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Chapter 12 Input/Output (I/O) Ports (PORTS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 Chapter 13 Resets and Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .137 Chapter 14 Enhanced Serial Communications Interface (ESCI) Module . . . . . . . . . . . . . 149 Chapter 15 System Integration Module (SIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 179 Chapter 16 Serial Peripheral Interface (SPI) Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197 Chapter 17 Timebase Module (TBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 217 Chapter 18 Timer Interface Module (TIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221 Chapter 19 Development Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 237 Chapter 20 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255 Chapter 21 Ordering Information and Mechanical Specifications . . . . . . . . . . . . . . . . . . 275 Appendix A MC68HC08GT16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 277 MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0 Freescale Semiconductor 7 List of Chapters MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0 8 Freescale Semiconductor Table of Contents Chapter 1 General Description 1.1 1.2 1.2.1 1.2.2 1.3 1.4 1.5 1.5.1 1.5.2 1.5.3 1.5.4 1.5.5 1.5.6 1.5.7 1.5.8 1.5.9 1.5.10 1.5.11 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standard Features of the MC68HC908GT16/MC68HC908GT8 . . . . . . . . . . . . . . . . . . . . . Features of the CPU08 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MCU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Power Supply Pins (VDD and VSS). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oscillator Pins (PTE4/OSC1 and PTE3/OSC2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Reset Pin (RST). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . External Interrupt Pin (IRQ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ADC and ICG Power Supply Pins (VDDA and VSSA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ADC Reference Pins (VREFH and VREFL). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Port A Input/Output (I/O) Pins (PTA7/KBD7