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Part Number |
MC33395T |
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Manufacturer |
Motorola |
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Semiconductor DataSheet |
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DataSheet View |
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www.DataSheet4U.com
Freescale Semiconductor, Inc.
Document order number: MC33395/D Rev 2.0, 01/2004
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information Three-Phase Gate Driver IC
The 33395 simplifies the design of high-power BLDC motor control design by combining the gate drive, charge pump, current sense, and protection circuitry necessary to drive a three-phase bridge configuration of six N-channel power MOSFETs. Mode logic is incorporated to route a pulse width modulation (PWM) signal to either the low-side MOSFETs or high-side MOSFETs of the bridge, or to provide complementary PWM outputs to both the low- and high-sides of the bridge.
33395 33395T
THREE-PHASE GATE DRIVER IC
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Detection and drive circuitry are also incorporated to control a reverse battery protection high-side MOSFET switch. PWM frequencies up to 28 kHz are possible. Built-in protection circuitry prevents damage to the MOSFET bridge as well as the drive IC and includes overvoltage shutdown, overtemperature shutdown, overcurrent shutdown, and undervoltage shutdown. The device is parametrically specified over an ambient temperature range of -40°C ≤ TA ≤ 125°C and 5.5 V ≤ VIGN ≤ 24 V supply. Features • Drives Six N-Channel Low RDS(ON) Power MOSFETs • Built-In Charge Pump Circuitry • Built-In Current Sense Comparator and Output Drive Current Limiting • Built-In PWM Mode Control Logic • Built-In Circuit Protection • Designed for Fractional to Integral HP BLDC Motors • 32-Terminal SOIC Wide Body Surface Mount Package • 33395 Incorporates a <5.0 µs Shoot-Through Suppression Timer • 33395T Incorporates a <1.0 µs Shoot-Through Suppression Timer
DWB SUFFIX CASE 1324-02 32-TERMINAL SOICW
ORDERING INFORMATION
Device MC33395DWB/R2 MC33395TDWB/R2 Temperature Range (TA) -40°C to 125°C Package
32 SOICW
33395 Simplified Application Diagram
VPWR
33395
VDD VGDH VIGN VDD CP1H CP1L CP2H CP2L CRES 3 2 3 VIGNP GDH1 GDH2 GDH3 SRC1 SRC2 SRC3 N S N
H
S
H
H
MCU
HSE1–3 MODE0–1 GDL1 GDL2 PWM LSE1–3 GDL3 -ISENS AGND PGND +ISENS
VDD
This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Motorola, Inc. 2004
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VIGN VDD Low Low Voltage Reset Reset +ISENS Osc. Charge Charge Pump CP1H CP1L CP2H CP2L CPRES + Drive Limiting Drive Limiting L MODE0 MODE1 PWM HSE1 HSE2 HSE3 LSE1 LSE2 LSE3 AGND TEST PGND Overtemperature Shutdown Shutdown Control Control Logic Logic H VGDH VIGNP Gate Drive Gate Circuits Drive Circuits GDH1 GDH2 GDH3 SRC1 SRC2 SRC3 GDL1 GDL2 GDL3
Overvoltage Overvoltage Shutdown
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-ISENS
Figure 1. 33395 Simplified Internal Block Diagram
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CP2H CPRES VIGN VGDH VIGNP SRC1 GDH1 GDL1 SRC2 GDH2 GDL2 SRC3 GDH3 GDL3 PGND TEST
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
CP2L CP1H CP1L LSE1 LSE2 LSE3 HSE1 HSE2 HSE3 MODE0 MODE1 PWM VDD AGND +ISENS -ISENS
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TERMINAL FUNCTION DESCRIPTION
Terminal 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Terminal Name CP2H CPRES VIGN VGDH VIGNP SRC1 GDH1 GDL1 SRC2 GDH2 GDL2 SRC3 GDH3 GDL3 PGND Test -ISENS +ISENS AGND VDD PWM MODE1 MODE0 HSE3 Formal Name Charge Pump Cap Charge Pump Reserve Cap Input Voltage High-Side Gate Voltage Input Voltage Protected High-Side Sense Gate Drive High Output for Gate High-Side Sense Gate Drive High Output for Gate High-Side Sense Gate Drive High Gate Drive Low Power Ground Test Terminal IS Minus IS Plus Analog Ground Logic Supply Voltage Pulse Width Modulator Mode Control Bit 1 Mode Control Bit 0 High-Side Enable Definition High potential terminal connection for secondary charge pump capacitor Input from external reservoir capacitor for charge pump Input from ignition level supply voltage for power functions Output full-time gate drive for auxiliary high-side power MOSFET switch Input from protected ignition level supply for power functions Sense for high-side source voltage, phase 1 Output for gate high-side, phase 1 Output for gate drive low-side, phase 1 Sense for high-side source voltage, phase 2 Output for gate high-side, phase 2 Output for gate drive low-side, phase 2 Sense for high-side source voltage, phase 3 Output for gate drive high-side, phase 3 Output for gate drive low-side, phase 3 Ground terminals for power functions This should be connected to ground or left open Inverting input for current limit comparator Non-inverting input for current limit comparator Ground terminal for logic functions Supply voltage for logic functions Input for pulse width modulated driver duty cycle Input for mode control selection Input for mode control selection Input for high-side enable logic, phase 3
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
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TERMINAL FUNCTION DESCRIPTION (continued)
Terminal 25 26 27 28 29 30 31 32 Terminal Name HSE2 HSE1 LSE3 LSE2 LSE1 CP1L CP1H CP2L Formal Name High-Side Enable High-Side Enable Low-Side Enable Low-Side Enable Low-Side Enable External Pump Capacitor External Pump Capacitor Charge Pump Capacitor Definition Input for high-side enable logic, phase 2 Input for high-side enable logic, phase 1 Input for low-side enable logic, phase 3 Input for low-side enable logic, phase 2 Input for low-side enable logic, phase 1 Input from external pump capacitor for charge pump and secondary terminals Input from external pump capacitor for charge pump and secondary terminals Input from external reservoir, external pump capacitors for charge pump, and secondary terminals
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MAXIMUM RATINGS All voltages are with respect to ground unless otherwise noted
Rating VIGN Supply Voltage VIGNP Load Dump Survival VDD Logic Supply Voltage (Fail Safe) Logic Input Voltage (LSEn, HSEn, PWM, and MODEn) Start Up Current VIGNP ESD Voltage Human Body Model (Note 1) VESD1 VESD2 TSTG TA TC TJ PD TSOLDER RθJA ±500 ±200 -65 to 160 -40 to 125 -40 to 125 150 1.5 240 65 °C °C °C °C W °C °C/W V Symbol VIGN
IGNPLD
Value -15.5 to 40 -0.3 to 65 -0.3 to 7.0 0.3 to 7.0 100
Unit VDC VDC VDC VDC mA V
VDD VIN IVIGNStartUp
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Machine Model (Note 2) Storage Temperature Operating Ambient Temperature Operating Case Temperature Maximum Junction Temperature Power Dissipation (TA = 25°C) Terminal Soldering Temperature Thermal Resistance, Junction-to-Ambient
Notes 1. ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 Ω). 2. ESD2 testing is performed in accordance with the Machine Model (CZAP = 200 pF, RZAP = 0 Ω).
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33395 5
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STATIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions -40°C ≤ TA ≤ 125°C, 5.5 V ≤ VIGNP ≤ 24 V unless otherwise noted. Typical values reflect approximate parameter mean at TA = 25°C under normal conditions unless otherwise noted.
Characteristic Symbol Min Typ Max Unit
POWER INPUT
VIGN Current @ 5.5 V–24 V, VDD = 5.5 V VIGNP Current @ 5.5 V–24 V, VDD = 5.5 V VIGNP Overvoltage Shutdown VIGNP Voltage VDD Current @ 5.5 VDC, 5.5 V ≤ VIGNP ≤ 24 V V IIGN IIGNP
IGNPSD
– – 25 5.5 – 2.5 7.0
0.2 – 33 – 1.8 3.2 –
1.0 100 36.5 24 4.0 4.0 –
mA mA V V mA V V
VIGNP IV
DD
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VDD Low-Voltage Reset Level VDD One-Time Fuse (Logic Supply)
VDD(RESET) –
INPUT/OUTPUT
Input Current at VDD = 5.5 V LSEn, HSEn, PWM, and MODEn = 3.0 V Input Threshold at VDD = 5.5 V LSEn, HSEn, PWM, and MODEn (Note 3) VSCRn Source Sense Voltage SRC1, SRC2, SRC3 Comparator Input Offset Voltage Comparator Input Bias Current Comparator Input Offset Current Common Mode Voltage (Note 4) Comparator Differential Input Voltage (Note 4) Charge Pump Voltage VIGN (Note 5) VIGNP = 5.5 V, ICRES = 1.0 mA VIGNP = 9.0 V, ICRES = 1.0 mA VIGNP = 12 V, ICRES = 5.0 mA VIGNP = 24 V, ICRES = 1.0 mA VIGNP = 24 V, ICRES = 5.0 mA VGDH Output Voltage with GDHn in ON State VIGNP = 5.5 V, IGDHn = 1.0 mA VIGNP = 12 V, IGDHn = 5.0 mA VIGNP = 24 V, IGDHn = 5.0 mA VGDH Output Voltage with GDHn in OFF State VIGNP = SRCn = 14 V, IGDHn = 1.0 mA VGDHn(off) -1.0 0.6 1.0 VGDHn(on) -V SRCn 4.0 4.0 4.5 5.2 9.0 11 18 18 18 V VINP(OFFSET) VINP(BIAS) IINP(OFFSET) VCMR VINPdiff VCRES -VIGNP 4.0 4.0 4.5 8.0 4.5 6.0 7.5 10 16 12 18 18 18 18 18 V VSCRn -0.3 5.0 -500 -300 0 -VDD VIGNP 14 -170 -3.0 – – 24 20 500 300 VDD -2.0 +VDD mV nA nA VDC V V VTH 1.0 2.0 3.0 V IIN 5.0 12 25 V µA
Notes 3. Logic inputs LSEn, HSEn, PWM, and MODEn have internal 20 µA internal sinks. 4. Guaranteed by design and characterization. Not production tested. 5. The Charge Pump has a positive temperature coefficient. Therefore the Min’s occur at -40°C, Typ’s at 25°C, and Max’s at 125°C.
33395 6
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STATIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions -40°C ≤ TA ≤ 125°C, 5.5 V ≤ VIGNP ≤ 24 V unless otherwise noted. Typical values reflect approximate parameter mean at TA = 25°C under normal conditions unless otherwise noted.
Characteristic Symbol Min Typ Max Unit
INPUT/OUTPUT (continued)
VGDL Low-Side Output Voltage GDHn in ON State VIGNP = 5.5 V, IGDLn = 1.0 mA VIGNP = 12 V, IGDLn = 5.0 mA VIGNP = 24 V, IGDLn = 0 |