(MC33171 - MC33174) Low Power Operational Amplifiers

MC33171, MC33172, MC33174, NCV33172 Single Supply 3.0 V to 44 V, Low Power Operational Amplifiers Quality bipolar fabrication with innovative design concepts are employed for the MC33171/72/74 series of monolithic operational amplifiers. These devices operate at 180 mA per amplifier and offer 1.8 MHz of gain bandwidth product and 2.1 V/ms slew rate without the use of JFET device technology. Although this series can be operated from split supplies, it is particularly suited for single supply operation, since the common mode input voltage includes ground potential (VEE). With a Darlington input stage, these devices exhibit high input resistance, low input offset voltage and high gain. The all NPN output stage, characterized by no deadband crossover distortion and large output voltage swing, provides high capacitance drive capability, excellent phase and gain margins, low open loop high frequency output impedance and symmetrical source/sink AC frequency response. The MC33171/72/74 are specified over the industrial/automotive temperature ranges. The complete series of single, dual and quad operational amplifiers are available in plastic as well as the surface mount packages. www.DataSheet4U.com http://onsemi.com 8 PDIP−8 P SUFFIX CASE 626 1 SO−8 D, VD SUFFIX CASE 751 8 1 14 1 PDIP−14 P, VP SUFFIX CASE 646 Features • • • • • • • • • • • • • • • Low Supply Current: 180 mA (Per Amplifier) Wide Supply Operating Range: 3.0 V to 44 V or ±1.5 V to ±22 V Wide Input Common Mode Range, Including Ground (VEE) Wide Bandwidth: 1.8 MHz High Slew Rate: 2.1 V/ms Low Input Offset Voltage: 2.0 mV Large Output Voltage Swing: −14.2 V to +14.2 V (with ±15 V Supplies) Large Capacitance Drive Capability: 0 pF to 500 pF Low Total Harmonic Distortion: 0.03% Excellent Phase Margin: 60° Excellent Gain Margin: 15 dB Output Short Circuit Protection ESD Diodes Provide Input Protection for Dual and Quad Pb−Free Packages are Available NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes 14 1 SO−14 D, VD SUFFIX CASE 751A 14 1 TSSOP−14 DTB SUFFIX CASE 948G ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. DEVICE MARKING INFORMATION See general marking information in the device marking section on page 10 of this data sheet. © Semiconductor Components Industries, LLC, 2006 October, 2006 − Rev. 9 1 Publication Order Number: MC33171/D MC33171, MC33172, MC33174, NCV33172 PIN CONNECTIONS SINGLE Offset Null Inv. Input Noninv. Input VEE 1 2 3 4 8 QUAD NC VCC Output Offset Null Output 1 Inputs 1 VCC Inputs 2 Output 2 1 2 3 4 5 6 7 14 Output 4 Inputs 4 VEE Inputs 3 Output 3 − + 7 6 5 − + 1 4 − + 13 12 11 (Single, Top View) + 2 − 3 + − 10 9 8 DUAL Output 1 Inputs 1 VEE 1 2 3 4 8 (Top View) VCC Output 2 Inputs 2 5 − + 1 2− + 7 6 (Top View) VCC Q3 Q1 Q2 R1 Bias − Inputs + C2 Q15 D3 Q19 Q13 Q12 D1 R5 R3 R4 Q14 Q16 Q8 Q9 Q10 Q11 C1 R2 D2 R6 R7 R8 Q17 Q18 Output Q4 Q5 Q6 Q7 Current Limit VEE/GND Offset Null (MC33171) Figure 1. Representative Schematic Diagram (Each Amplifier) http://onsemi.com 2 MC33171, MC33172, MC33174, NCV33172 MAXIMUM RATINGS Rating Supply Voltage Input Differential Voltage Range Input Voltage Range Output Short Circuit Duration (Note 2) Operating Ambient Temperature Range Operating Junction Temperature Storage Temperature Range Symbol VCC/VEE VIDR VIR tSC TA TJ Tstg Value ±22 (Note 1) (Note 1) Indefinite (Note 3) +150 −65 to +150 Unit V V V sec °C °C °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = −15 V, RL connected to ground, TA = +25°C, unless otherwise noted.) Characteristics Input Offset Voltage (VCM = 0 V) VCC = +15 V, VEE = −15 V, TA = +25°C VCC = +5.0 V, VEE = 0 V, TA = +25°C VCC = +15 V, VEE = −15 V, TA = Tlow to Thigh (Note 3) Average Temperature Coefficient of Offset Voltage Input Bias Current (VCM = 0 V) TA = +25°C TA = Tlow to Thigh (Note 3) Input Offset Current (VCM = 0 V) TA = +25°C TA = Tlow to Thigh (Note 3) Large Signal Voltage Gain (VO = ±10 V, RL = 10 k) TA = +25°C TA = Tlow to Thigh (Note 3) Output Voltage Swing VCC = +5.0 V, VEE = 0 V, RL = 10 k, TA = +25°C VCC = +15 V, VEE = −15 V, RL = 10 k, TA = +25°C VCC = +15 V, VEE = −15 V, RL = 10 k, TA = Tlow to Thigh (Note 3) VCC = +5.0 V, VEE = 0 V, RL = 10 k, TA = +25°C VCC = +15 V, VEE = −15 V, RL = 10 k, TA = +25°C VCC = +15 V, VEE = −15 V, RL = 10 k, TA = Tlow to Thigh (Note 3) Output Short Circuit (TA = +25°C) Input Overdrive = 1.0 V, Output to Ground Source Sink Input Common Mode Voltage Range TA = +25°C TA = Tlow to Thigh (Note 3) Common Mode Rejection Ratio (RS ≤ 10 k), TA = +25°C Power Supply Rejection Ratio (RS = 100 W), TA = +25°C Power Supply Current (Per Amplifier) VCC = +5.0 V, VEE = 0 V, TA = +25°C VCC = +15 V, VEE = −15 V, TA = +25°C VCC = +15 V, VEE = −15 V, TA = Tlow to Thigh (Note 3) Symbol VIO Min − − − − − − − − 50 25 3.5 13.6 13.3 − − − Typ 2.0 2.5 − 10 20 − 5.0 − 500 − 4.3 14.2 − 0.05 −14.2 − Max 4.5 5.0 6.5 − 100 200 nA 20 40 V/mV − − V − − − 0.15 −13.6 −13.3 mA 3.0 15 VICR 5.0 27 − − V VEE to (VCC −1.8) VEE to (VCC −2.2) 80 80 − − − 90 100 180 220 − − − 250 250 300 dB dB mA mV/°C nA Unit mV DVIO/DT IIB IIO AVOL VOH VOL ISC CMRR PSRR ID 1. Either or both input voltages must not exceed the magnitude of VCC or VEE. 2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded. 3. MC3317x Tlow = −40°C Thigh = +85°C MC3317xV, NCV33172 Tlow = −40°C Thigh = +125°C http://onsemi.com 3 MC33171, MC33172, MC33174, NCV33172 AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = −15 V, RL connected to ground, TA = +25°C, unless otherwise noted.) Characteristics Slew Rate (Vin = −10 V to +10 V, RL = 10 k, CL = 100 pF) AV +1 AV −1 Gain Bandwidth Product (f = 100 kHz) Power Bandwidth AV = +1.0 RL = 10 k, VO = 20 Vpp, THD = 5% Phase Margin RL = 10 k RL = 10 k, CL = 100 pF Gain Margin RL = 10 k RL = 10 k, CL = 100 pF Equivalent Input Noise Voltage RS = 100 W, f = 1.0 kHz Equivalent Input Noise Current (f = 1.0 kHz) Differential Input Resistance Vcm = 0 V Input Capacitance Total Harmonic Distortion AV = +10, RL = 10 k, 2.0 Vpp ≤ VO ≤ 20 Vpp, f = 10 kHz Channel Separation (f = 10 kHz) Open Loop Output Impedance (f = 1.0 MHz) Symbol SR 1.6 − GBW BWp − fm − − − − − − − − − CS zo − − 35 60 45 15 5.0 32 0.2 300 0.8 0.03 120 100 − Deg − − dB − − − − − − − − − dB W pF % nV/ Hz √ pA/√Hz MW 1.4 2.1 2.1 1.8 − − − MHz kHz Min Typ Max Unit V/ms Am en In Rin Cin THD V ICR , INPUT COMMON MODE VOLTAGE RANGE (V) VCC −0.8 −1.6 −2.4 0.1 VEE 0 −55 −25 VCC/VEE = ±1.5 V to ± 22 V DVIO = 5.0 mV Vsat , OUTPUT SATURATION VOLTAGE (V) 0 0 VCC −1.0 Source VCC/VEE = ± 5.0 V to ± 22 V TA = 25°C 1.0 Sink 0 VEE 0 1.0 2.0 3.0 IL, LOAD CURRENT (±mA) 4.0 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 Figure 2. Input Common Mode Voltage Range versus Temperature Figure 3. Split Supply Output Saturation versus Load Current http://onsemi.com 4 MC33171, MC33172, MC33174, NCV33172 A VOL , OPEN LOOP VOLTAGE GAIN (dB) 3 0 20 10 0 −10 −20 VCC/VEE = ±15 V RL = 10 k Vout = 0 V TA = 25°C 1 − Phase 2 − Phase, CL = 100 pF 3 − Gain 4 − Gain, CL = 100 pF 1.0 M f, FREQUENCY (Hz) Phase Margin = 58° 2 4 3 200 220 10 M 0 10 20 50 100 200 CL, LOAD CAPACITANCE (pF) 500 0 1.0 k Gain 1 Margin = 15 dB 140 160 180 70 φ m, PHASE MARGIN (DEGREES) 120 φ , EXCESS PAHSE (DEGREES) 60 50 40 30 20 10 % fm VCC/VEE = ±15 V AVOL = +1.0 RL = 10 k DVO = 20 mVpp TA = 25°C 70 %, PERCENT OVERSHOOT 25 60 50 40 30 20 10 −30 100 k Figure 4. Open Loop Voltage Gain and Phase versus Frequency Figure 5. Phase Margin and Percent Overshoot versus Load Capacitance 1.3 GBW AND SR (NORMALIZED) 1.2 GBW 1.1 1.0 SR 0.9 0.8 0.7 −55 10 V/DIV 0 VCC/VEE = ±15 V RL = 10 k 5.0 ms/DIV 50 mV/DIV 0 VCC/VEE = ±15 V VCM = 0 V VO = 0 V DIO = ±0.5 mA TA = 25°C −25 0 25 50 75 100 125 5.0 ms/DIV TA, AMBIENT TEMPERATURE (°C) Figure 6. Normalized Gain Bandwidth Product and Slew Rate versus Temperature Figure 7. Small and Large Signal Transient Response z o , OUTPUT IMPEDANCE (Ω ) 120 100 80 60 40 20 VCC/VEE = ±15 V AV = +1.0 RL = 10 k CL = 100 pF TA = 25°C I D , I CC , POWER SUPPLY CURRENT (mA) 140 AV = 1000 AV = 100 1.1 1. TA = −55°C 2. TA = 25°C 0.9 3. TA = 125°C 0.7 Dual 0.5 0.3 0.1 0 5.0 10 15 VCC/VEE, SUPPLY VOLTAGE (±V) 20 Single 1 2 3 1 2 3 Quad 1 2 3 AV = 10 AV = 1.0 0 200 2.0 k 20 k f, FREQUENCY (Hz) 200 k 2.0 M Figure 8. Output Impedance and Frequency Figure 9. Supply Current versus Supply Voltage http://onsemi.com 5 MC33171, MC33172, MC33174, NCV33172 APPLICATIONS INFORMATION − CIRCUIT DESCRIPTION/PERFORMANCE FEATURES Although the bandwidth, slew rate, and settling time of the MC33171/72/74 amplifier family is similar to low power op amp products utilizing JFET input devices, these amplifiers offer additional advantages as a result of the PNP transistor differential inputs and an all NPN transistor output stage. Because the input common mode voltage range of this input stage includes the VEE potential, single supply operation is feasible to as low as 3.0 V with the common mode input voltage at ground potential. The input stage also allows differential input voltages up to ±44 V, provided the maximum input voltage range is not exceeded. Specifically, the input voltages must range between VCC and VEE supply voltages