GSM/DCS/TDMA/AMPS Multi-Protocol Transceiver

www.DataSheet4U.com Order this document by MC13760PP/D Product Preview MC13760 GSM/DCS/TDMA/AMPS Multi-Protocol Transceiver The MC13760 Multi–Protocol, Multi–Band Digital Transceiver IC combines, on a single Advanced BiCMOS chip, the major building blocks required for next generation multi–purpose, multi–band wireless products. The device includes the majority of the circuitry necessary for IF signal processing between the RF front end and the DSP and backend. The MC13760 contains two fractional–N synthesizers, a re–configurable zero IF receiver with programmable bandwidth, receive A/D conversion, multi–rate data interface to the baseband DSP, direct launch digital modulator, full transmit support circuits, and general purpose support circuits such as D/A and A/D converters, battery save and tri–state control switches. Intended for use in a combined GSM/TDMA/AMPS/iDEN portable wireless phone product in the 800/900/1800/1900 MHz bands. The MC13760 can be used over a wide range of RF and IF frequencies. The main PLL prescaler input is usable to over 2.0 GHz and the IF quadrature downconverter operates up to 400 MHz. The MC13760 has separate receive IF inputs and a common zero–IF IQ receiver for TDMA and for GSM accommodating the receiver architectural need to use different IF frequencies and filters without the need for additional switches. • Receiver Functions for all GSM/DCS/TDMA IS–136/AMPS Modes and Frequencies Including GPRS • Direct Interface to Motorola Baseband Processors, such as the DSP56690 through a Common Programming and Data Interface • Main Three Accumulator (24–Bit) Fractional–N Synthesizer • Resolution Capability of 6.0 Hz • Dual–Mode Charge Pump Output for TDMA TX VCO and all RX • Independent Charge Pump Output for the GSM/DCS TX VCO • GMSK Lookup ROM for Direct Transmission in GSM/DCS Mode • Digital 16–Bit Automatic Frequency Control MULTI–PROTOCOL TRANSCEIVER SEMICONDUCTOR TECHNICAL DATA PLASTIC PACKAGE CASE 1285 (BGA–104) ORDERING INFORMATION Device MC13760 Operating Temperature Range TA = –40 to 85°C Package BGA–104 • • • • • • • • • Secondary Three Accumulator (24–Bit) Fractional–N Synthesizer for use as an Accurate Frequency–Corrected Clock in GSM, or as an Additional Low Frequency LO Coarse Tuning of the VCO(s) via a 6–Bit D/A with Adapt Operates at 2.75 V Deep Sleep Mode with Current as low as 50 µA Versatile Frequency Generation including Linear and Constant Envelope Modulation Paths, Ramp and Power Level Control, Direct Gain Control of the RFPA in the TDMA Mode D/A Conversion of TDMA TXI and TXQ Reference Crystal Oscillator with a Buffered Output, Compensation/Fine Tuning via 9–Bit D/A Receiver Gain Adjustment and Bandwidth Down to 6.0 kHz Programmed over the SPI Bus A/D Conversion of RXI and RXQ to 8–Bit or 10–Bit Resolution Types of Applications • GSM/DCS/TDMA/AMPS Global Roaming Multiband Cellular Telephone • VHF/UHF 2–Way or Trunked Radio, iDEN, Tetra, or Satellite Communication Radios or Telephones • Hand–Held Wireless PDA’s • Wireless LAN’s, Industrial Devices, ISM Band Products • Any New Device Containing Some Combination of the Above Functions © Motorola, Inc. 2000 Rev 0 This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice. MOTOROLA WIRELESS SEMICONDUCTOR SOLUTIONS – RF AND IF DEVICE DATA 1 MC13760 Figure 1. MC13760 Detailed Block Diagram DMKGNDDIG DMKVCCDIG DMKGND DMKVCC BBEGND BBEVCC DCLICIN AGCGND AGCVCC DCLICP AGC Control SPI Control VACBYP AGC VAC On Channel AGC Det. RFA0 PRAVCC1 PREINI PREINIB PRAGND PRAVCC2 PREINGB PREING PRAGNDDIG LOIN DCLQCP Step Alternator Control DCOCL AGC Warp On Channel AGC Det. I 1 Pole 2 Pole 2 Pole 2 Pole NVCC NGND Step Atten AGC Amp Q Step Atten 1 Pole 2 Pole 2 Pole 2 Pole QVCC QGND +2 Quadrature Generator DCOCL DCLQCIN REFVCC TCAPP TCAPM CREF REFGND Internal Reference & Bias 8 24 Accumulator #1 PRSCIN Programmable Divider 26 MHz VCOCT2 VCOCT1 XTALWARP Third Order Passive Filter OSCVCC OSCGND XTALBASE 26 MHz XTALEMIT CPGITR ADAPT CPGT MNCPGND TBD Order Passive Filter MNCPGND MAINVCC MAINGND AOCDRIVE Dual Mode Charge Pump Wideb and Charge Pump Reference Oscillator 4 +10/ +26 +1/ +2 8 6 Recombination Logic Adapt SPI 6 Bit Control D/A SPI 9 Bit Control D/A Phase Detector Startup Accumulator #3 2 4 2 2 26 MHz 6 Recombination Logic Accumulator #2 24 Bit Adder Addressable Shift Register SPII SPICLK CEX Tracking Loop & BB Filter BW Control Adapt Timing S/H S/H S/H AGCI SERIALVCC SERIALGND Battery Save DIG_AFC Enable Battery Save 3:1 Input Mux 10 Bit, or 8 Bit Cyclic A/D Receive Data Register SRD RXACQ STD TXCLK/SCK RSTB TXE/TXKEY RXCLK RXFS/SFS TSLOT Fine Channel 24 AFC_SEL 32 16 LSB Look–Up ROM TX DATA Buffer Start DO Clk 4.333 MHz D Q dk Transmit Data Register Comb Filter Comb Filter 13.0 or 16.8 MHz IREF Clock Generation & Control Logic B6 B16 8 Bit D/A 8 Bit D/A Sw. Cap Filter +13/ +17/ +26/ +34 +65/ +84/ +130/ +168 PtC 200 kHz 24 Accumulator #1 Accumulator #2 Cont. Time Filter Sw. Cap Filter Clock Gen. TSLOTB TCLK TCLKB 1.0, 2.4 or 2.6 MHz CLKGENIN OUTI OUTIB OUTQ OUTQB Cont. Time Filter PtA +7/ +14/ +21/ +28 PtB Programmable Divider From PtD 3 From PtA From PtA Control Logic 2 16 6 From PtB +1/+2/ +3/+4 MUX Accumulator #3 SPII SPICLK CEX 8 400 KHz Reference 3 +1/ +2/ +3/ +4 Phase Detector/ +N Charge Pump 13.0 – 16.8 MHz or 26.0 – 33.6 MHz 5 49 Test Multiplex (2 Outputs) From PtD 62 62 Output Enable D or A 22 8 Bit D/A DMCS VBLIN ASW VCNTO PtD Addressable Shift Register CLKGENIN MUX MUX 8X6 3 Bit 6 Bit 6 Bit Cosine D/A 6 Reg 6 Lookup 3 Counter 8 Bit D/A 8 Bit 8 Bit Reg 8 Counter 8 5 Bit 5 Reg Super Filter From TXE/ PtC TXKEY 8 IREF Mixer & Preamp Current IF Control Channel AFC Addressable Shift Register SPII SPICLK CEX SPI REG 5 Bit D/A 5 62 REFPLLGND TXKEYOUT PLLCPVCC PLLBASE OSCENB PLLEMIT CLKSEL CLKOUT SEBYP SEGND DETSW SFVCC SFOUT PLLCP TEST1 TEST2 TESTD SATDET REFPLLVCC GPO1 TM Tark Circuit Loop Filter 2 MOTOROLA WIRELESS SEMICONDUCTOR SOLUTIONS – RF AND IF DEVICE DATA LONCGND LONCVCC GPO2 GPO3 ÁÁÁÁÁÁ Á Á Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁ Á Á Á Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁ Á Á Á Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á ÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á Á ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Á Á