(MB91F345B / MB91F346B) 32-bit Microcontroller CMOS

www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS07-16704-1E 32-bit Microcontroller CMOS FR60 Lite MB91345 Series MB91F345B/F346B ■ DESCRIPTION The MB91345 series is the microcontrollers based on 32-bit high-perform RISC-CPU while integrating a variety of I/O resources for embedded control applications which require high-performance, high-speed CPU processing. It is suitable for the embedded control in digital home appliances or audio visual equipment, requiring highperformance CPU processing power. This product compactly integrates a variety of peripheral functions for single chip and is FR60 applicable to fasterspeed application. Note : FR, the abbreviation of FUJITSU RISC controller, is a line of products of FUJITSU Limited. ■ FEATURE • FR CPU • 32-bit RISC, load/store architecture, with a five-stage pipeline • Maximum operating frequency : 50 MHz [PLL used : original oscillation 12.5 MHz] • 16-bit fixed length instruction (basic instructions) ; 1 instruction per cycle • Instruction set optimized for embedded applications : Memory-to-Memory transfer, bit manipulation, barrel shift instructions • Instructions adapted for high-level programming languages : Function entry/exit instructions, multiple-register load/store instructions • Register interlock function : Facilitating coding in assembles (Continued) Be sure to refer to the “Check Sheet” for the latest cautions on development. “Check Sheet” is seen at the following support page URL : http://www.fujitsu.com/global/services/microelectronics/product/micom/support/index.html “Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system development. Copyright©2007 FUJITSU LIMITED All rights reserved MB91345 Series • On-chip multiplier supported at instruction level Signed 32-bit multiplication : 5 cycles Signed 16-bit multiplication : 3 cycles • Interrupt (PC, PS save) : 6 cycles, 16 priority levels • Harvard architecture allowing program access and data access to be executed simultaneously • Instruction set compatible with FR family • External bus interface • Operating frequency : Max 25 MHz • 24-bit address full output (16 Mbytes area) • 8/16-bit data output • Capable of chip-select signal output for completely independent four areas settable in 64 Kbytes minimum • Support for various memory interfaces : SRAM and ROM/Flash • Basic bus cycle : 2 cycles • Programmable automatic wait cycle generator capable of inserting wait cycles for each area • External wait cycles generated by RDY input • Unused data/address pins can serve for general-purpose I/O • Internal memory Flash MB91F345B MB91F346B 512 Kbytes 1 Mbyte D-bus RAM 24 Kbytes 24 Kbytes F-bus RAM 8 Kbytes 8 Kbytes • DMAC (DMA Controller) • 5 channels • Two transfer factors (internal peripheral / software) • Addressing mode : 20/24-bit full-address selection (increment/decrement/fixed) • Transfer modes (burst transfer/step transfer/and block transfer) • Selectable transfer data sizes : 8, 16, or 32 bits • Bit search module (for REALOS) Search for the position of the bit I/O-changed first in one word from the MSB • Reload timer : 3 channels (including 1channel for REALOS) • 16-bit timer • The internal clock is optional from 2/8/32 division • Multi function serial interface • 11 channels • Full duplex double buffer • 2 channels out of 11 channels with 16-byte FIFO • Capable of selecting communication mode : asynchronous (Start-Stop synchronous) communication, clock synchronous communication (Max 8.25 Mbps) , I2C* standard mode (Max 100 kbps) , high-speed mode (Max 400 kbps) • Parity on/off selectable • Baud rate generator per channel • Abundant error detection functions are provided (Parity, frame, and overrun) • External clock can be used as transfer clock • ch.0, ch.1, ch.2, and ch.10 is tolerant of 5 V (Continued) 2 MB91345 Series (Continued) • Interrupt controller • A total of 24 external interrupt lines (external interrupt pins INT23 to INT0) • Interrupt from internal peripheral • Programmable 16 priority levels • Available for wakeup from STOP mode • A/D converter : • 10-bit resolution, 8 channels + 8 channels 2unit • Successive approximation type : Conversion time : min. 1.2 µs (at 16 MHz) • Conversion mode (Shingle-shot conversion mode, scan conversion mode) • Startup source (software/external trigger) • PPG timer : up to 16 channels (at 8 bits) • 8/16-bit PPG timer : 8 bits × 16 channels or 16 bits × 8 channels • The internal clock is optional from 1/4/16/64 division • PWC timer : 1 channel 16-bit up counter 1 channel (1 input) • Input capture and output compare : up to 8 channels (ch.0 to ch.3; 16-bit ICU, OCU, ch.4 to ch.7; 32-bit ICU, OCU) • 16-bit free-run counter × 1 channel + 16-bit input capture × 4 channels + 16-bit output compare × 4 channels • 32-bit free-run counter × 1 channel + 32-bit input capture × 4 channels + 32-bit output compare × 4 channels • MIN/MAX/ABS • MIN/MAX/ABS is performed and the result is accumulated and added. • Other interval timer and counter • 8/16-bit up down counter : 8-bit × 4 channels or 16-bit × 2 channels • 16-bit timebase timer/watchdog timer • I/O port • Max 71 ports • Other features • Internal oscillation circuit as a clock source and PLL multiplier • INIT is prepared as a reset terminal • Watchdog timer reset and software reset are also available • Stop and sleep mode supported as low-power-consumption modes • Gear function • Built-in time base timer • Memory patch function • Package : TQFP-100 • CMOS technology (0.18 µm) • Power supply voltage : 3.3 V ± 0.3 V (single power supply) * : Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use, these components in an I2C system provided that the system conforms to the I2C Standard Specification as defined by Philips. 3 MB91345 Series ■ PIN ASSIGNMENT (TOP VIEW) VCC P23/A03/SIN1 P22/A02/SCK0 P21/A01/SOT0 P20/A00/SIN0 P17/D15/ADTRG0 P16/D14/SCK7/ADTRG1 P15/D13/SOT7/TOT2 P14/D12/SIN7/TIN2 P13/D11/SCK6/TOT1 P12/D10/SOT6/TIN1 P11/D09/SIN6/TOT0 P10/D08/SCK5/TIN0 P07/D07/SOT5/INT15 P06/D06/SIN5/INT14 P05/D05/SCK4/INT13 P04/D04/SOT4/INT12 P03/D03/SIN4/INT11 P02/D02/SCK3/INT10 P01/D01/SOT3/INT9 P00/D00/SIN3/INT8 P63/SYSCLK/RT3 P62/RDY/RT2/ADTRG1-2 P61/RT1/PWC0/ADTRG0-2 VCC 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 VSS C P24/A04/SOT1 P25/A05/SCK1 P26/A06/SIN2 P27/A07/SOT2 P30/A08/SCK2 P31/A09/AIN0/TOT0-2 P32/A10/BIN0/TOT1-2 P33/A11/ZIN0/TOT2-2 P34/A12/AIN2 P35/A13/BIN2/IC4 P36/A14/ZIN2/IC5 P37/A15/FRCK1 P40/A16/PPG9/INT16 P41/A17/PPGB/INT17 P42/A18/PPGD/INT18 P43/A19/PPGF/INT19 P44/A20/IC0/INT20 P45/A21/IC1/INT21/SIN10 P46/A22/IC2/INT22/SOT10 P47/A23/IC3/INT23/SCK10 VSS X1 X0 VSS P60/RT0 P57/WR1/RT7 P56/WR0/RT6 P55/RD/RT5 P54/AS/RT4 P53/CS3/PPG7 P52/CS2/PPG5 P51/CS1/PPG3 P50/CS0/PPG1 MD2 MD1 MD0 INIT TRST IBREAK ICS2 ICS1 ICS0 ICD3 ICD2 ICD1 ICD0 ICLK VCC Note : TOTx and TOTx-2 have same function. Also ADTRGx and ADTRGx-2 have same function. Use either of the two depending on the combined resource. VSS PC2/IC7/SCK9 PC1/IC6/SOT9 PC0/FRCK0/SIN9 PE7/AN15/INT7/SCK8 PE6/AN14/INT6/SOT8 PE5/AN13/INT5/SIN8 PE4/AN12/INT4/PPGE PE3/AN11/INT3/PPGC PE2/AN10/INT2/PPGA PE1/AN9/INT1/PPG8 PE0/AN8/INT0/PPG6 AVSS AVRL AVRH AVCC PD7/AN7/PPG4 PD6/AN6/PPG2 PD5/AN5/ZIN3/PPG0 PD4/AN4/BIN3 PD3/AN3/AIN3 PD2/AN2/ZIN1 PD1/AN1/BIN1 PD0/AN0/AIN1 VCC (FPT-100P-M18) 4 MB91345 Series ■ PIN DESCRIPTION Pin No. 1 2 Pin name VSS C P24 3 A04 SOT1 P25 4 A05 SCK1 P26 5 A06 SIN2 P27 6 A07 SOT2 P30 7 A08 SCK2 P31 8 A09 AIN0 TOT0-2 P32 9 A10 BIN0 TOT1-2 B B B B B B B I/O Circuit type* ⎯ ⎯ GND pin Power stabilization capacitance pin General-purpose I/O port Bit 4 of external address bus output pin. Enabled when external bus is effective. Multi function serial 1 serial data output pin General-purpose I/O port. Enabled in single-chip mode. Bit 5 of external address bus output pin. Enabled when external bus is effective. Multi function serial 1 clock I/O pin General-purpose I/O port. Enabled in single-chip mode. Bit 6 of external address bus output pin. Enabled when external bus is effective. Multi function serial 2 serial data input pin General-purpose I/O port. Enabled in single-chip mode. Bit 7 of external address bus output pin. Enabled when external bus is effective. Multi function serial 2 serial data output pin General-purpose I/O port. Enabled in single-chip mode. Bit 8 of external address bus output pin. Enabled when external bus is effective. Multi function serial 2 clock I/O pin General-purpose I/O port. Enabled in single-chip mode. Bit 9 of external address bus output pin. Enabled when external bus is effective. Up down counter input pin Reload timer output pin General-purpose I/O port. Enabled in single-chip mode. Bit 10 of external address bus output pin. Enabled when external bus is effective. Up down counter input pin Reload timer output pin (Continued) Function 5 MB91345 Series Pin No. Pin name P33 I/O Circuit type* Function General-purpose I/O port. Enabled in single-chip mode. 10 A11 ZIN0 TOT2-2 P34 B Bit 11 of external address bus output pin. Enabled when external bus is effective. Up down counter input pin Reload timer output pin General-purpose I/O port. Enabled in single-chip mode. Bit 12 of external address bus output pin. Enabled when external bus is effective. Up down counter input pin General-purpose I/O port. Enabled in single-chip mode. Bit 13 of external address bus output pin. Enabled when external bus is effective. Up down counter input pin Input capture ICU 4 data sample input pin