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FUJITSU SEMICONDUCTOR DATA SHEET
DS07-12559-1E
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89480/MB89480L Series
MB89485/485L/P485/P485L/PV480
s DESCRIPTION
The MB89480 series has been developed as a general-purpose version of the F2MC*-8L family consisting of proprietary 8-bit single-chip microcontrollers. In addition to a compact instruction set, the microcontroller contains a variety of peripheral functions such as 21bit timebase timer, watch prescaler, PWC timer, PWM timer, 8/16-bit timer/counter, 6-bit PPG, LCD controller/ driver, external interrupt 1 (edge), external interrupt 2 (level), 10-bit A/D converter, UART/SIO, buzzer, watchdog timer reset. The MB89480 series is designed suitable for LCD remote controller as well as in a wide range of applications for consumer product. *: F2MC stands for FUJITSU Flexible Microcontroller.
s FEATURES
• Package used LQFP package and SH-DIP package for MB89P485/P485L, MB89485/485L MDIP package and MQFP package for MB89PV480 • High speed operating capability at low voltage • Minimum execution time: 0.32 µs at 12.5 MHz
(Continued)
s PACKAGES
64-pin Plastic SH-DIP 64-pin Plastic LQFP 64-pin Ceramic MDIP 64-pin Ceramic MQFP
(DIP-64P-M01)
(FPT-64P-M09)
(MDP-64C-P02)
(MQP-64C-P01)
MB89480/480L Series
(Continued) • F2MC-8L family CPU core
Instruction set optimized for controllers Multiplication and division instructions 16-bit arithmetic operations Test and branch instructions Bit manipulation instructions, etc.
• Six timers PWC timer (also usable as an interval timer) PWM timer 8/16-bit timer/counter x 2 21-bit timebase timer Watch prescaler • Programmable pulse generator 6-bit PPG with program-selectable pulse width and period • External interrupt Edge detection (selectable edge) : 4 channels Low level interrupt (wake-up function) : 8 channels • A/D converter (4 channels) 10-bit successive approximation type • UART/SIO Synchronous/asynchronous data transfer capability • LCD controller/driver Max 31 segments output x 4 commons Booster for LCD driving (selected by mask option) • Buzzer 7 frequencies are selectable by software • Low-power consumption mode Stop mode (oscillation stops so as to minimize the current consumption.) Sleep mode (CPU stops so as to reduce the current consumption to approx. 1/3 of normal.) Watch mode (everything except the watch prescaler stops so as to reduce the power comsumption to an extremely low level.) Sub-clock mode • Watchdog timer reset • I/O ports: Max 42 channels
2
MB89480/480L Series
s PRODUCT LINEUP
Part number Parameter Classification ROM size RAM size MB89485L MB89485 MB89P485L MB89P485 MB89PV480 Piggy-back 32K x 8-bit (external ROM)*1 1K × 8-bit : 136 : 8 bits : 1 to 3 bytes : 1, 8, 16 bits : 0.32 µs at 12.5 MHz : 2.88 µs at 12.5 MHz : 11 pins : 28 pins : 2 pins : 1 pin : 42 pins
Mass production products (mask ROM product) 16K x 8-bit (internal ROM)
OTP 16K x 8-bit (internal PROM with read protection) *2
512 x 8-bit Number of instructions Instruction bit length Instruction length Data bit length Minimum execution time Minimum interrupt processing time I/O ports (CMOS) N-channel open drain I/O ports Output ports (N-channel open drain) Input port Total
CPU functions
Ports
21-bit timebase timer Watchdog timer
Interrupt period (0.66 ms, 2.6 ms, 21.0 ms, 335.5 ms) at 12.5 MHz. Reset period (167.8 ms to 335.5 ms) at 12.5 MHz. 1 channel. 8-bit one-shot timer operation (supports underflow output, operating clock period: 1, 4, 32 tinst, external). 8-bit reload timer operation (supports square wave output, operating clock period: 1, 4, 32 tinst, external). 8-bit pulse width measurement operation (supports continuous measurement, H width, L width, rising edge to rising edge, falling edge to falling edge measurement and both edge measurement). 8-bit reload timer operation (supports square wave output, operating clock period: 1, 4, 32 tinst, external). 8-bit resolution PWM operation. Can generate square pulse with programmable period.
Pulse width count timer
PWM timer 6- bit programmable pulse generator
Can be operated either as a 2-channel 8-bit timer/counter (timer 11 and timer 12, each with its 8/16-bit timer/counter own independent operating clock cycle), or as one 16-bit timer/counter. 11, 12 In timer 11 or 16-bit timer/counter operation, event counter operation (external clock-triggered) and square wave output capability. Can be operated either as a 2-channel 8-bit timer/counter (timer 21 and timer 22, each with its 8/16-bit timer/counter own independent operating clock cycle), or as one 16-bit timer/counter. 21, 22 In timer 21 or 16-bit timer/counter operation, event counter operation (external clock-triggered) and square wave output capability. External interrupt 4 independent channels (selectable edge, interrupt vector, request flag). 8 channels (low level interrupt).
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3
MB89480/480L Series
(Continued)
Part number Parameter A/D converter MB89485L MB89485 MB89P485L MB89P485 MB89PV480
10-bit resolution × 4 channels. A/D conversion function (conversion time: 60 tinst ). Supports repeated activation by internal clock. Common output Segment output : 4 (Max) : 31 (Max) (selected resistor ladder) : 26 (Max) (selected booster) :4 : 31 × 4 bits : selected by mask option
LCD controller/driver
Bias power supply pins LCD display RAM size Dividing resistor/booster
UART/SIO Buzzer output Standby mode Process Operating voltage
Synchronous/asynchronous data transfer capability. (Max baud rate: 97.656 Kbps at 12.5 MHz). (7 and 8 bits with parity bit; 8 and 9 bits without parity bit). 7 frequencies are selectable by software. Sleep mode, stop mode, watch mode, sub-clock mode. CMOS 2.2 V to 3.6 V 2.2 V to 5.5 V 2.7 V to 3.6 V 3.5 V to 5.5 V 2.7 V to 5.5 V
*1 : Use MBM27C256A as the external ROM. *2 : Read protection feature is selected by part number, detail please refer to MASK OPTIONS. Note : 1 tinst = one instruction cycle (execution time) which can be selected as 1/4, 1/8, 1/16, or 1/64 of main clock.
s PACKAGE AND CORRESPONDING PRODUCTS
Part number Package DIP-64P-M01 FPT-64P-M09 MDP-64C-P02 MQP-64C-P01 O : Availabe X : Not available MB89485/485L O O X X MB89P485/P485L O O X X MB89PV480 X X O O
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MB89480/480L Series
s DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the piggyback product, verify its differences from the product that will actually be used. Take particular care on the following point: • The stack area is set at the upper limit of the RAM.
2. Current Consumption
• For the MB89PV480, the current consumed by the EPROM mounted in the piggy-back socket is needed to be included. • When operating at low speed, the current consumed by the one-time PROM product is greater than that for the mask ROM product. However, the current consumption is roughly the same in sleep and stop mode. • For more information, see “s ELECTRICAL CHARACTERISTICS”.
3. Oscillation Stabilization Time after Power-on Reset
• • • • For MB89PV480, MB89P485L and MB89485L, there is no power-on stabilization time after power-on reset. For MB89P485, there is power-on stabilization time after power-on reset. For MB89485, the power-on stabilization time can be selected. For more information, please refer to “s MASK OPTION”.
5
MB89480/480L Series
s PIN ASSIGNMENT
(TOP VIEW)
COM0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 P40/SEG8 P41/SEG9 P42/SEG10 P43/SEG11 P44/SEG12 P45/SEG13 P46/SEG14 P47/SEG15 P50/SEG16 P51/SEG17 P52/SEG18 P53/SEG19 P54/SEG20 P55/SEG21 P56/SEG22 P57 P10/SEG23/INT10 P11/SEG24/INT11 P12/SEG25/INT12 P13/SEG26/INT13 X0A X1A C *2 VSS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
*3 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 VSS 65 66 67 68 69 70 71 72 73 74 75 76 77 78 92 91 90 89 88 87 86 85 84 83 82 81 80 79 VCC A14 A13 A8 A9 A11 OE A10 CE O8 O7 O6 O5 O4
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
Vcc COM1 P30/COM2 P31/COM3 V3 P27/V2/EC1 P26/V1/TO1 V0/SEG0 P25/C0/EC2 *1 P24/C1/TO2 *1 P23/SI P22/SO P21/SCK P20/PWM P00/INT20 P01/INT21 P02/INT22 P03/INT23 *1 P04/INT24 *1 P05/INT25/PWC P06/INT26/PPG P07/INT27/BUZ AVss AVcc P17/SEG30/AN3 *1 P16/SEG29/AN2 *1 P15/SEG28/AN1 *1 P14/SEG27/AN0 *1 RST MODE X1 X0
(DIP-64P-M01) (MDP-64C-P02)
*1: If booster is selected, EC2 and TO2 will be redirected to P03/INT23 and P04/INT24 respectively. Segment output of P17/SEG30/AN3 - P14/SEG27/AN0 will be disabled. *2: For product other than MB89P485, pin 31 is NC pin. *3: Pin assignment on package top. Pin no. Pin symbol Pin no. Pin symbol Pin no. Pin symbol Pin no. Pin symbol
65 66 67 68 69 70 71 72
A15 A12 A7 A6 A5 A4 A3 A2
73 74 75 76 77 78 79 80
A1 A0 O1 O2 O3 VSS O4 O5
81 82 83 84 85 86 87 88
O6 O7 O8 CE A10 OE A11 A9
89 90 91 92
A8 A13 A14 Vcc
N.C.: As connected internally, do not use.
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6
MB89480/480L Series
(TOP VIEW)
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 COM0 Vcc COM1 P30/COM2 P31/COM3 V3 P27/V2/EC1 P26/V1/TO1 V0/SEG0
P40/SEG8 P41/SEG9 P42/SEG10 P43/SEG11 P44/SEG12 P45/SEG13 P46/SEG14 P47/SEG15 P50/SEG16 P51/SEG17 P52/SEG18 P53/SEG19 P54/SEG20 P55/SEG21 P56/SEG22 P57
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
P25/C0/EC2 *1 P24/C1/TO2 *1 P23/SI P22/SO P21/SCK P20/PWM P00/INT20 P01/INT21 P02/INT22 P03/INT23 *1 P04/INT24 *1 P05/INT25/PWC P06/INT26/PPG P07/INT27/BUZ AVss AVcc
*1: If booster is selected, EC2 and TO2 will be redirected to P03/INT23 and P04/INT24 respectively. Segment output of P17/SEG30/AN3 - P14/SEG27/AN0 will be disabled. *2: For product other than MB89P485, pin 23 is NC pin.
P10/SEG23/INT10 P11/SEG24/INT11 P12/SEG25/INT12 P13/SEG26/INT13 X0A X1A *2 C Vss X0 X1 MODE RST *1 P14/SEG27/AN0 1 P15/SEG28/AN1 * *1 P16/SEG29/AN2 *1 P17/SEG30/AN3
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
(FPT-64P-M09)
(Continued
