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Part Number |
MAX1471 |
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Manufacturer |
Maxim Integrated Products |
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Semiconductor DataSheet |
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DataSheet View |
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19-3272; Rev 1; 3/05
315MHz/434MHz Low-Power, 3V/5V ASK/FSK Superheterodyne Receiver
General Description
The MAX1471 low-power, CMOS, superheterodyne, RF dual-channel receiver is designed to receive both amplitude-shift-keyed (ASK) and frequency-shift-keyed (FSK) data without reconfiguring the device or introducing any time delay normally associated with changing modulation schemes. The MAX1471 requires few external components to realize a complete wireless RF digital data receiver for the 300MHz to 450MHz ISM bands. The MAX1471 includes all the active components required in a superheterodyne receiver including: a lownoise amplifier (LNA), an image-reject (IR) mixer, a fully integrated phase-locked loop (PLL), local oscillator (LO), 10.7MHz IF limiting amplifier with received-signalstrength indicator (RSSI), low-noise FM demodulator, and a 3V voltage regulator. Differential peak-detecting data demodulators are included for both the FSK and ASK analog baseband data recovery. The MAX1471 includes a discontinuous receive (DRX) mode for lowpower operation, which is configured through a serial interface bus. The MAX1471 is available in a 32-pin thin QFN package and is specified over the automotive -40°C to +125°C temperature range.
Features
♦ ASK and FSK Demodulated Data on Separate Outputs ♦ Specified over Automotive -40°C to +125°C Temperature Range ♦ Low Operating Supply Voltage Down to 2.4V ♦ On-Chip 3V Regulator for 5V Operation ♦ Low Operating Supply Current 7mA Continuous Receive Mode 1.1µA Deep-Sleep Mode ♦ Discontinuous Receive (DRX) Low-Power Management ♦ Fast-On Startup Feature < 250µs ♦ Integrated PLL, VCO, and Loop Filter ♦ 45dB Integrated Image Rejection ♦ RF Input Sensitivity* ASK: -114dBm FSK: -108dBm ♦ Selectable IF BW with External Filter ♦ Programmable Through Serial User Interface ♦ RSSI Output and High Dynamic Range with AGC
*0.2% BER, 4kbps, Manchester-encoded data, 280kHz IF BW
MAX1471
Applications
Automotive Remote Keyless Entry (RKE) Tire Pressure Monitoring Systems Garage Door Openers Wireless Sensors Wireless Keys Security Systems Medical Systems Home Automation Local Telemetry Systems
Ordering Information
PART MAX1471ATJ TEMP RANGE -40°C to +125°C PIN-PACKAGE 32 Thin QFN-EP**
**EP = Exposed pad.
Pin Configuration
PDMAXA ADATA HVIN SCLK
CS
32
DSADSA+ OPA+ DFA XTAL2 XTAL1 AVDD LNAIN
31
30
29
28
27
26
25 24 23 22 21
DVDD DGND DFF OPF+ DSF+ DSFPDMAXF PDMINF
1 2 3 4 5 6 7 8 9
LNASRC
MAX1471
FDATA
TOP VIEW
PDMINA
DIO
20 19 18 17
10
LNAOUT
11
MIXIN+
12
MIXIN-
13
MIXOUT
14
AGND
15
IFIN-
16
IFIN+
THIN QFN
________________________________________________________________ Maxim Integrated Products
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For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
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315MHz/434MHz Low-Power, 3V/5V ASK/FSK Superheterodyne Receiver MAX1471
ABSOLUTE MAXIMUM RATINGS
High-Voltage Supply, HVIN to DGND .......................-0.3V, +6.0V Low-Voltage Supply, AVDD and DVDD to AGND .....-0.3V, +4.0V SCLK, DIO, CS, ADATA, FDATA ....................................(DGND - 0.3V) to (HVIN + 0.3V) All Other Pins.............................(AGND - 0.3V) to (AVDD + 0.3V) Continuous Power Dissipation (TA = +70°C) 32-Pin Thin QFN (derate 21.3mW/°C above +70°C) ...1702mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) ................................ +300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, AVDD = DVDD = HVIN = +2.4V to +3.6V, fRF = 300MHz to 450MHz, TA = -40°C to +125°C, unless otherwise noted. Typical values are at AVDD = DVDD = HVIN = +3.0V, fRF = 434 MHz, TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER GENERAL CHARACTERISTICS Supply Voltage (5V) Supply Voltage (3V) HVIN VDD AVDD and DVDD unconnected from HVIN, but connected together HVIN, AVDD, and DVDD connected to power supply Operating TA < +85°C Polling duty cycle: 10% duty cycle DRX mode OFF current Deep-sleep current Operating Supply Current IDD TA < +105°C (Note 2) Polling duty cycle: 10% duty cycle DRX mode OFF current Deep-sleep current Operating TA < +125°C (Note 2) Polling duty cycle: 10% duty cycle DRX mode OFF current Deep-sleep current Startup Time tON Time for final signal detection, does not include baseband filter settling (Note 2) 200 4.5 2.4 5.0 3.0 7.0 705 5.0 1.1 5.5 3.6 8.4 855 14.2 7.1 8.5 865 15.5 13.4 8.6 900 44.1 36.4 250 µs µA mA µA mA µA V V mA SYMBOL CONDITIONS MIN TYP MAX UNITS
DIGITAL OUTPUTS (DIO, ADATA, FDATA) Output High Voltage Output Low Voltage DIGITAL INPUTS (CS, DIO, SCLK) Input High Threshold Input Low Threshold VIH VIL 0.9 x HVIN . 0.1 x HVIN V V VOH VOL ISOURCE = 250µA (Note 2) ISINK = 250µA (Note 2) HVIN 0.15 0.15 V V
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315MHz/434MHz Low-Power, 3V/5V ASK/FSK Superheterodyne Receiver
DC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuit, AVDD = DVDD = HVIN = +2.4V to +3.6V, fRF = 300MHz to 450MHz, TA = -40°C to +125°C, unless otherwise noted. Typical values are at AVDD = DVDD = HVIN = +3.0V, fRF = 434 MHz, TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER Input-High Leakage Current Input-Low Leakage Current Input Capacitance VOLTAGE REGULATOR Output Voltage VREG HVIN = 5.0V, ILOAD = 7.0mA 3.0 V SYMBOL IIH IIL CIN (Note 2) (Note 2) (Note 2) CONDITIONS MIN TYP MAX -20 20 2.0 UNITS µA µA pF
MAX1471
AC ELECTRICAL CHARACTERISTICS
(Typical Application Circuit, AVDD = DVDD = HVIN = +2.4V to +3.6V, fRF = 300MHz to 450MHz, TA = -40°C to +125°C, unless otherwise noted. Typical values are at AVDD = DVDD = HVIN = +3.0V, fRF = 434 MHz, TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER GENERAL CHARACTERISTICS Receiver Sensitivity Maximum Receiver Input Power Level Receiver Input Frequency Range Receiver Image Rejection LNA/MIXER (Note 4) LNA Input Impedance Voltage Conversion Gain (HighGain Mode) Input-Referred 3rd-Order Intercept Point (High-Gain Mode) Voltage Conversion Gain (LowGain Mode) Input-Referred 3rd-Order Intercept Point (Low-Gain Mode) LO Signal Feedthrough to Antenna Mixer Output Impedance IF Input Impedance Operating Frequency 3dB Bandwidth FM DEMODULATOR Demodulator Gain GFM 2.2 mV/kHz Z11 fIF 330 10.7 10 Ω MHz MHz ZOUT Z11 Normalized to 50Ω fRF = 315MHz fRF = 434MHz 1 - j4.7 1 - j3.4 47.5 -38 12.2 -5 -90 330 dB dBm dB dBm dBm Ω RFIN 0.2% BER, 4kbps Manchester Code, 280kHz IF BW, 50Ω ASK FSK -114 dBm -108 0 300 (Note 3) 45 450 dBm MHz dB SYMBOL CONDITIONS MIN TYP MAX UNITS
RFMAX fRF IR
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315MHz/434MHz Low-Power, 3V/5V ASK/FSK Superheterodyne Receiver MAX1471
AC ELECTRICAL CHARACTERISTICS (continued)
(Typical Application Circuit, AVDD = DVDD = HVIN = +2.4V to +3.6V, fRF = 300MHz to 450MHz, TA = -40°C to +125°C, unless otherwise noted. Typical values are at AVDD = DVDD = HVIN = +3.0V, fRF = 434 MHz, TA = +25°C, unless otherwise noted.) (Note 1)
PARAMETER ANALOG BASEBAND Maximum Data Filter Bandwidth Maximum Data Slicer Bandwidth Maximum Peak Detector Bandwidth Maximum Data Rate CRYSTAL OSCILLATOR Crystal Frequency Frequency Pulling by VDD Maximum Crystal Inductance Crystal Load Capacitance DIGITAL INTERFACE TIMING (see Figure 8) Minimum SCLK Setup to Falling Edge of CS Minimum CS Falling Edge to SCLK Rising-Edge Setup Time Minimum CS Idle Time Minimum CS Period Maximum SCLK Falling Edge to Data Valid Delay Minimum Data Valid to SCLK Rising-Edge Setup Time Minimum Data Valid to SCLK Rising-Edge Hold Time Minimum SCLK High Pulse Width Minimum SCLK Low Pulse Width Minimum CS Rising Edge to SCLK Rising-Edge Hold Time Maximum CS Falling Edge to Output Enable Time Maximum CS Rising Edge to Output Disable Time tSC tCSS tCSI tCS tDO tDS tDH tCH tCL tCSH tDV tTR 30 30 125 2.125 80 30 30 100 100 30 25 25 ns ns ns µs ns ns ns ns ns ns ns ns fXTAL 9.04 3 50 3 13.728 MHz ppm/V µH pF BWDF BWDS BWPD Manchester coded Nonreturn to zero (NRZ) 50 100 50 33 66 kHz kHz kHz kbps SYMBOL CONDITIONS MIN TYP MAX UNITS
Note 1: Note 2: Note 3: Note 4:
Production tested at TA = +85°C. Guaranteed by design and characterization over entire temperature range. Guaranteed by design and characterization. Not production tested. The oscillator register (0x3) is set to the nearest integer result of fXTAL / 100kHz (see the Oscillator Frequency Register section). Input impedance is measured at the LNAIN pin. Note that the impedance at 315MHz includes the 15nH inductive degeneration from the LNA source to ground. The impedance at 434MHz includes a 10nH inductive degeneration connected from the LNA source to ground. The equivalent input circuit is 50Ω in series with 2.2pF. The voltage conversion gain is measured with the LNA input matching inductor, the degeneration inductor, and the LNA/mixer resonator in place, and does not include the IF filter insertion loss.
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315MHz/434MHz Low-Power, 3V/5V ASK/FSK Superheterodyne Receiver
Typical Operating Characteristics
(Typical Application Circuit, AVDD = DVDD = HVIN = +3.0V, fRF = 434MHz, TA = |