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Part Number |
MAS9560 |
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Manufacturer |
MAS |
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Semiconductor DataSheet |
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DataSheet View |
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www.DataSheet4U.com
DA9560.001 20 January, 2005
MAS9560
This is preliminary information on a new product under development. Micro Analog Systems Oy reserves the right to make any changes without notice.
Stereo Audio Driver DAC
• • • • • • • 16-Bit Stereo Audio DAC Stereo Headphone Drivers Mono Earpiece Driver Mono Loudspeaker Driver Mixing of Analog and Digital Audio Signals Integrated LDO Flexible Power Down Control
DESCRIPTION
The MAS9560 Stereo Audio DAC chip is specially intended to audio applications in portable devices. It has both analog and digital inputs for audio data thus enabling the mixing of signals. MAS9560 is equipped with integrated high performance LDO, which ensures high quality of output signal even in noisy power supply environment. MAS9560 has three audio outputs (for headphone, earpiece and loudspeaker) making it an ideal choice for space critical applications. Since current consumption is a critical factor in portable devices, MAS9560 has flexible power down control enabling the shutting down of the parts of the circuit that are not in use.
FEATURES
• • • • • • • • • • • • • • • • 16-Bit Stereo Audio DAC Stereo Headphone Drivers (25 mW) Mono Earpiece Driver (100 mW) Mono Loudspeaker Driver (410 mW) -50 dB to 32 dB Analog Volume Control Mute for All Volume Controls Analog and Digital Signal Mixing Integrated LDO Flexible Power Down Control Audio Sample Rates from 8 kHz to 48 kHz I2C/SPI Compatible Serial Control Port I2S Digital Audio Interface Supply Voltage Range 2.7 V to 5.5 V Digital I/O Voltage Range 1.8 V to 5.5 V Package QFN 6x6 40ld Compatible with DAC3560C
APPLICATIONS
• Portable devices with sophisticated audio functions: • Cell Phones • PDAs • MP3 players with integrated AM/FM radio
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DA9560.001 20 January, 2005
BLOCK DIAGRAM
VBAT
VLDO
CBP
Reference Generator
LDO
SREF
LSVDD LSP LSN
AUXL
LSVSS1 LSVSS2 EPVDD
AUXR
AIN
stereo/ mono
EPP EPN EPVSS1 EPVSS2
Σ
IOVDD XRES DAI WSI CLI SDO SDI XCS SCLK I C/SPI Control Interface
2
Σ
stereo/ mono
HPVDD
I2S Digital Audio Interface
DAC
Σ Σ
stereo/ mono
HPL
DAC
HPR
1 Temperature Protection
HPCM HPVSS
MODE
DVSS
Figure 1. Block diagram of MAS9560
AVSS
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DA9560.001 20 January, 2005
DETAILED BLOCK DESCRIPTION ◆ DAC
MAS9560 contains two digital-to-analog converters (DACs), which values are set through I2S bus (see I2S section for further description). The sampling rate of DACs is defined by WSI or CLI. In over sampling mode the sampling frequency is the frequency of CLI pin divided by four (fCLI/4). WSI is used as a sampling clock in default mode. The reference block, which provides reference level for analog audio signals, has two modes: LDO mode: Audio reference level = VLDO/2. (SREF pin). This is half of integrated voltage regulator's output voltage. Non-LDO mode: Audio reference level = VLDO/2. VLDO should be connected to VBAT in Non-LDO mode. ◆ I2C/SPI Control Interface MAS9560 has many user selectable options. These selections are mainly made by using registers, which are programmed via one of the two standard control interface protocols: I2C or SPI. The used control interface type is selected with MODE pin. ◆ Registers MAS9560 has 11 on-chip registers, which byte length is 8 bits. Reset register is write-only, all other registers permit read and write access. ◆ Power Management MAS9560 has Block Control Register, which allows separate blocks to be turned on and off independently. This can be used to reduce power consumption, since typically all the blocks are not needed at the same time. If, for example, only loudspeaker is used as an output, the drivers for earpiece and headphone can be disabled. Additionally MAS9560 has Mode Control Register, which can be used to select operating mode for MAS9560. These four modes are as follows: Zero Power, where all digital and analog blocks are in power down mode. This is a default mode after startup. Analog stand-by, which is intended to be used as a wait state when starting the device. The purpose of this operating mode is to suppress audible plops caused by abrupt amplification changes when blocks in audio chain are waking up. Aux to Line, where DACs are disabled and only analog signaling is used. Full Power, where all blocks are active. ◆ Temperature Protection MAS9560 is equipped with over temperature protection.
◆ Audio Drivers
MAS9560 contains three audio drivers, all of which can be used simultaneously or separately. One driver is for loudspeaker, one for earpiece and one for headphone. The two latter ones have analog volume control from –30 dB gain to +6 dB gain in 1.5 dB steps, whereas the control range for loudspeaker driver is from –30 dB to +12 dB in 1.5 dB steps (see Control Register section p.18) The main features of each driver is as follows: Loudspeaker Driver: mono, differential output, output power: 410 mW @ VDD = 2.7 V, 1100 mW @ VDD = 5.0 V Earpiece Driver: mono, differential output, output power: 100 mW @ VDD = 2.7 V, 300 mW @ VDD = 5.0 V Headphone Driver: stereo, single-ended output, output power: 25 mW @ VDD = 2.7 V, 80 mW @ VDD = 5.0 V All the drivers are short-circuit protected. ◆ Digital Audio Interface Inter-IC Sound (I2S) bus is a 3-wire serial interface for transmission of 2-channel (stereo) Pulse Code Modulation digital data between MAS9560 and external digital audio source, for example MP3 player. ◆ LDO Voltage Regulator MAS9560 has integrated low dropout voltage regulator, which output voltage is fixed 2.86 V. In power supply noisy environments the usage of this LDO in powering headphone and earpiece drivers improves the PSRR of these drivers to 100 dB and over. 10 nF bypass capacitor can be connected to CBP pin further improving the performance. In case LDO is not used (non-LDO mode) its output pin (VLDO) must be connected to external voltage source since it is supplying power for analog frontend. The integrated LDO can also be disabled by using Mode-Control-Register. ◆ Reference Block
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DA9560.001 20 January, 2005
PIN CONFIGURATION
QFN 6x6 40ld
39 40
MAS 9560A1 YYWW XXXXX.X
2 1 EXPOSED PAD
12 TOP VIEW
40 39 BOTTOM VIEW
Top Marking Information: YYWW = Year, Week XXXXX.X = Lot Number
PIN DESCRIPTION
G = Ground, I = Input, O = Output, P = Power
Pin Name VBAT LSVSS1 LSP LSVDD LSN LSVSS2 N/C DVSS MODE IOVDD SDI SCLK SDO XCS DAI WSI CLI XRES N/C N/C AIN
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
Type P G O P O G G I P I/O I O I I I I I I
Function Power Supply Voltage GND for Loudspeaker Driver Loudspeaker Differential Output (Positive) Power Supply Voltage for Loudspeaker Driver Loudspeaker Differential Output (Negative) GND for Loudspeaker Driver Not Connected Digital GND Control Interface (I2C / SPI) Selection Digital I/O Power Supply Voltage SPI Data In or I2C Data In/Out SPI or I2C Clock Signal SPI Data Out SPI Chip Select I2S Data In I2S Word Strobe Input I2S Clock Signal Reset Input Not Connected Not Connected Analog Input (Mono)
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DA9560.001 20 January, 2005 Pin Name Pin Number Type I I O G O O P O I G O P O G G P Function Analog Auxiliary (AUX) Input Left Channel (Stereo) Analog Auxiliary (AUX) Input Right Channel (Stereo) Headphone Common Output GND for Headphone Driver Headphone Output (Left Channel) Headphone Output (Right Channel) Power Supply Voltage for Headphone Driver Not Connected Audio Signal Reference Level Pin for LDO Bypass Capacitor Earpiece Ground Earpiece Differential Output (Negative) Power Supply for Earpiece Driver Earpiece Differential Output (Positive) GND for Earpiece Driver Analog Ground Not Connected Not Connected LDO Output (Analog Power Supply) Exposed pad should be soldered to GND layer to improve heat dissipation
AUXL 22 AUXR 23 HPCM 24 HPVSS 25 HPL 26 HPR 27 HPVDD 28 N/C 29 SREF 30 CBP 31 EPVSS2 32 EPN 33 EPVDD 34 EPP 35 EPVSS1 36 AVSS 37 N/C 38 N/C 39 VLDO (AVDD) 40 Exposed Pad
Note: Pins EPVDD and HPVDD have to be connected to VLDO pin.
DETAILED PIN DESCRIPTIONS
◆ Power supply pins The power supply of MAS9560 is divided into functional sections so that: DVSS is connected internally with all digital parts IOVDD and DVSS are connected internally with all digital inputs and outputs DVSS is ground connection for all digital parts All GND pins are internally connected together LSVDD and VBAT are internally connected together Other power supply pins should be connected as follows: VLDO should be connected to VBAT in nonLDO mode. If LDO mode is selected, VLDO is the output of LDO. HPVDD and EPVDD can be driven by VLDO in LDO mode to reduce power supply noise HPVSS, EPVSS, LSVSS must be connected to analog ground (AVSS). The pins are internally connected together.
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DA9560.001 20 January, 2005
ABSOLUTE MAXIMUM RATINGS
All voltages with respect to ground. Parameter Supply Voltage (VBAT and LSVDD are internally connected together) Voltage Range for Other Pins ESD Rating (HBM) Junction Temperature Storage Temperature Symbol VBAT Pin Name VBAT, LSVDD Min -0.3 -0.3 TJmax TS -55 Max 6 VBAT + 0.3 2 +175 (limited) +150 1.2 Unit V V kV °C °C W
Power Dissipation (TA = +85°C) (Exposed pad soldered to PCB) Stresses beyond those listed may cause permanent damage to the device. The device may not operate under these conditions, but it will not be destroyed.
RECOMMENDED OPERATING CONDITIONS
All voltages with respect to ground. Parameter Operating Junction Temperature Operating Ambient Temperature Master Supply Voltage Master Supply Voltage Symbol TJ TA VBAT, LSVDD VBAT, LSVDD, VLDO, EPVDD, HPVDD VBAT, LSVDD VLDO, HPVDD, EPVDD IOVDD EPVDD HPVDD LDO mode, VBAT and LSVDD internally connected Non-LDO mode, VBAT and LSVDD internally connected Internally connected together Pin Name Conditions Min -40 -40 3.0 2.7 3.6 3.6 Nom Max +125 +85 5.5 5.5 Unit °C °C V V
Analog Operating Supply Voltage
VBAT
2.7 2.7 1.5 2.7 2.7
5.5 VBAT VBAT VBAT VBAT V V V V
Digital Interface V |