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Part Number |
MAC4DLM |
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Manufacturer |
ON Semiconductor |
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Semiconductor DataSheet |
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DataSheet View |
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MAC4DLM
Preferred Device
Sensitive Gate Triacs
Silicon Bidirectional Thyristors
Designed for high volume, low cost, industrial and consumer applications such as motor control; process control; temperature, light and speed control.
Features
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• • • • • • • •
Small Size Surface Mount DPAK Package Passivated Die for Reliability and Uniformity Four−Quadrant Triggering Blocking Voltage to 600 V On−State Current Rating of 4.0 Amperes RMS at 93°C Low Level Triggering and Holding Characteristics Epoxy Meets UL 94 V−0 @ 0.125 in ESD Ratings: Human Body Model, 3B u 8000 V Machine Model, C u 400 V • Pb−Free Packages are Available
TRIACS 4.0 AMPERES RMS 600 − 800 VOLTS
MT2 G
MT1
MARKING DIAGRAMS
4 DPAK CASE 369C STYLE 6 YWW AC 4DLMG
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating Peak Repetitive Off−State Voltage (Note 1) (TJ = −40 to 110°C, Sine Wave, 50 to 60 Hz, Gate Open) On−State RMS Current (Full Cycle Sine Wave, 60 Hz, TC = 93°C) Peak Non-Repetitive Surge Current (One Full Cycle, 60 Hz, TJ = 110°C) Circuit Fusing Consideration (t = 8.3 msec) Peak Gate Power (Pulse Width ≤ 10 msec, TC = 93°C) Average Gate Power (t = 8.3 msec, TC = 93°C) Peak Gate Current (Pulse Width ≤ 10 msec, TC = 93°C) Peak Gate Voltage (Pulse Width ≤ 10 msec, TC = 93°C) Operating Junction Temperature Range Storage Temperature Range Symbol VDRM, VRRM IT(RMS) ITSM I2t PGM PG(AV) IGM VGM TJ Tstg Value 600 Unit V
12 3
4 4.0 40 6.6 0.5 0.1 0.2 5.0 −40 to 110 −40 to 150 A A A2sec W W A DPAK−3 CASE 369D STYLE 6 2 3 Y WW AC4DLM G = = = = Year Work Week Device Code Pb−Free Package YWW AC 4DLMG
1
PIN ASSIGNMENT
V °C °C 1 2 3 4 Main Terminal 1 Main Terminal 2 Gate Main Terminal 2
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the device are exceeded.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Preferred devices are recommended choices for future use and best overall value.
© Semiconductor Components Industries, LLC, 2005
1
November, 2005 − Rev. 3
Publication Order Number: MAC4DLM/D
MAC4DLM
THERMAL CHARACTERISTICS
Characteristic Thermal Resistance − Junction−to−Case − Junction−to−Ambient − Junction−to−Ambient (Note 2) Maximum Lead Temperature for Soldering Purposes (Note 3) Symbol RqJC RqJA RqJA TL Max 3.5 88 80 260 Unit °C/W
°C
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted; Electricals apply in both directions)
Characteristic OFF CHARACTERISTICS Peak Repetitive Blocking Current (VD = Rated VDRM, VRRM; Gate Open) ON CHARACTERISTICS Peak On−State Voltage (Note 4) − (ITM = ± 6.0 A) Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 100 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) MT2(−), G(+) Gate Trigger Voltage (Continuous dc) (VD = 12 V, RL = 100 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) MT2(−), G(+) Gate Non−Trigger Voltage (VD = 12 V, RL = 100 W, TJ = 110°C) MT2(+), G(+); MT2(+), G(−); MT2(−), G(−); MT2(−), G(+) Holding Current (VD = 12 V, Gate Open, Initiating Current = ± 200 mA) Latching Current MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) MT2(−), G(+) (VD = 12 V, IG = 5.0 mA) (VD = 12 V, IG = 5.0 mA) (VD = 12 V, IG = 5.0 mA) (VD = 12 V, IG = 10 mA) VTM IGT − − − − VGT 0.5 0.5 0.5 0.5 VGD 0.1 IH − IL − − − − 1.75 5.2 2.1 2.2 10 10 10 10 1.5 15 mA 0.4 − mA 0.62 0.57 0.65 0.74 1.3 1.3 1.3 1.3 V 1.8 2.1 2.4 4.2 3.0 3.0 3.0 5.0 V − 1.3 1.6 V mA TJ = 25°C TJ = 110°C IDRM, IRRM mA − − − − 0.01 2.0 Symbol Min Typ Max Unit
DYNAMIC CHARACTERISTICS
Rate of Change of Commutating Current (VD = 200 V, ITM = 1.8 A, Commutating dv/dt = 1.0 V/msec, TJ = 110°C, f = 250 Hz, CL = 5.0 mfd, LL = 80 mH, RS = 56 W, CS = 0.03 mfd) With snubber see Figure 11 Critical Rate of Rise of Off−State Voltage (VD = 0.67 X Rated VDRM, Exponential Waveform, Gate Open, TJ = 110°C) di/dt(c) − 3.0 − A/ms
dv/dt 10 − −
V/ms
2. These ratings are applicable when surface mounted on the minimum pad sizes recommended. 3. 1/8″ from case for 10 seconds. 4. Pulse Test: Pulse Width ≤ 2.0 msec, Duty Cycle ≤ 2%.
ORDERING INFORMATION
Device MAC4DLM−001 MAC4DLM−001G MAC4DLMT4 MAC4DLMT4G Package Type DPAK−3 DPAK−3 (Pb−Free) DPAK DPAK (Pb−Free) Package 369D 369D 369C 369C Shipping † 75 Units / Rail 75 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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MAC4DLM
Voltage Current Characteristic of Triacs (Bidirectional Device)
+ Current Quadrant 1 MainTerminal 2 +
Symbol
VDRM IDRM VRRM IRRM VTM IH
Parameter
Peak Repetitive Forward Off−State Voltage Peak Forward Blocking Current Peak Repetitive Reverse Off−State Voltage Peak Reverse Blocking Current Maximum On−State Voltage Holding Current Quadrant 3 MainTerminal 2 − IH VTM IRRM at VRRM on state IH
VTM
off state
+ Voltage IDRM at VDRM
Quadrant Definitions for a Triac
MT2 POSITIVE (Positive Half Cycle) +
(+) MT2
(+) MT2
Quadrant II
(−) IGT GATE MT1 REF
(+) IGT GATE MT1 REF
Quadrant I
IGT − (−) MT2 (−) MT2
+ IGT
Quadrant III
(−) IGT GATE MT1 REF
(+) IGT GATE MT1 REF
Quadrant IV
− MT2 NEGATIVE (Negative Half Cycle) All polarities are referenced to MT1. With in−phase signals (using standard AC lines) quadrants I and III are used.
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MAC4DLM
° TC , MAXIMUM ALLOWABLE CASE TEMPERATURE ( C) 110 P(AV) , AVERAGE POWER DISSIPATION (WATTS) 6.0 180° 5.0 α 4.0 3.0 2.0 a = 30° 1.0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 IT(RMS), RMS ON−STATE CURRENT (AMPS) 60° α 90° 120° dc
105
a = 30° 60° 90°
a = CONDUCTION ANGLE
100 α 95 α 120° 180° 90 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 IT(RMS), RMS ON−STATE CURRENT (AMPS)
a = CONDUCTION ANGLE dc 4.0
Figure 1. RMS Current Derating
Figure 2. On−State Power Dissipation
I T, INSTANTANEOUS ON−STATE CURRENT (AMPS)
TYPICAL @ TJ = 25°C 10 MAXIMUM @ TJ = 110°C
r(t) , TRANSIENT RESISTANCE (NORMALIZED)
100
1.0
0.1 ZqJC(t) = RqJC(t)Sr(t)
1.0
MAXIMUM @ TJ = 25°C 0.1 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 VT, INSTANTANEOUS ON−STATE VOLTAGE (VOLTS)
0.01 0.1 1.0 10 100 1000 10 K t, TIME (ms)
Figure 3. On−State Characteristics
Figure 4. Transient Thermal Response
8.0 VGT, GATE TRIGGER VOLTAGE (VOLTS) I GT, GATE TRIGGER CURRENT (mA) 7.0 6.0 5.0 4.0 Q2 3.0 Q1 2.0 1.0 0 −40 −25 −10 5.0 20 35 50 65 80 95 110 Q3 Q4
1.0 Q4 Q1 0.8 Q2 0.6 Q3
0.4
0.2 −40 −25 −10 5.0 20 35 50 65 80 95 110 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)
Figure 5. Typical Gate Trigger Current versus Junction Temperature
Figure 6. Typical Gate Trigger Voltage versus Junction Temperature
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MAC4DLM
5.0 IH , HOLDING CURRENT (mA) IL, LATCHING CURRENT (mA) 12 10 8.0 6.0 4.0
4.0
3.0 MT2 NEGATIVE 2.0 MT2 POSITIVE 1.0 0 −40 −25
Q2
Q4 Q3 −10 5.0 20 35 50 65 80 95 110
2.0 Q1 0
−10
5.0
20
35
50
65
80
95
110
−40 −25
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Typical Holding Current versus Junction Temperature
Figure 8. Typical Latching Current versus Junction Temperature
40 35 STATIC dv/dt (V/ m s) 30 25 20 15 10 5.0 100 1000 RGK, GATE−MT1 RESISTANCE (OHMS) 10 K MAC4DLM dv/dt(c), CRITICAL RATE OF RISE OF COMMUTATING VOLTAGE (V/m s) VD = 400 V TJ = 110°C
10 VPK = 400 V
TJ = 110°C
100°C
90°C
1.0
tw VDRM
f=
1 2 tw 6f ITM 1000
(di/dt)c =
0.1 0 1.0 2.0 3.0 4.0 5.0 6.0 di/dt(c), RATE OF CHANGE OF COMMUTATING CURRENT (A/ms)
Figure 9. Minimum Exponential Static dv/dt versus Gate−MT1 Resistance
Figure 10. Critical Rate of Rise of Commutating Voltage
LL 200 VRMS ADJUST FOR ITM, 60 Hz VAC TRIGGER CHARGE CONTROL TRIGGER CONTROL MEASURE I RS
1N4007
CHARGE
− CS MT2 1N914 51 W G MT1 ADJUST FOR + di/dt(c)
200 V
NON-POLAR CL
Note: Component values are for verification of rated (di/dt)c. See AN1048 for additional information.
Figure 11. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)c
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MAC4DLM
PACKAGE DIMENSIONS
DPAK CASE 369C ISSUE O
−T− B V R
4
SEATING PLANE
C E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.090 BSC 0.180 0.215 0.025 0.040 0.020 −−− 0.035 0.050 0.155 −−− MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 4.58 BSC 0.87 1.01 0.46 0.58 2.60 2.89 2.29 BSC 4.57 5.45 0.63 1.01 0.51 −−− 0.89 1.27 3.93 −−−
A S
1 2 3
Z U
K F L D G
2 PL
J H 0.13 (0.005) T
DIM A B C D E F G H J K L R S U V Z
M
STYLE 6: PIN 1. MT1 2. MT2 3. GATE 4. MT2
SOLDERING FOOTPRINT*
6.20 0.244 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 3.0 0.118
SCALE 3:1
mm inches
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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MAC4DLM
PACKAGE DIMENSIONS
DPAK−3 CASE 369D−01 ISSUE B
B V R
4
C E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0. |