RADIATION HARD MICROPROGRAM CONTROLLER

www.DataSheet4U.com APRIL 1995 DS3578-2.5 MA2910 MA2910 RADIATION HARD MICROPROGRAM CONTROLLER The industry standard MA2910 Microprogram Controller forms part of the MA2900 family of devices. Offering a building block approach to microcomputer and controller design, each device in the range is expandable permitting efficient emulation of any microcode-controlled machine. The family has been designed for operation in severe environments such as space, and is qualified to the highest levels of reliability. The MA2910 Micro-program Controller is an address sequencer intended for sequence control of microinstructions stored in microprogram memory in high speed microprocessor applications. All internal elements are full 12 bits wide and address up to 4096 words with one chip. The device has an integral settable 12 bit internal loop counter for repeating instructions and counting loop iterations. The MA2910 has four address sources which allow Microprogram Address to be selected from the microgram counter, branch address bus, 9 level push/pop stack, or internal holding register. The MA2910 supports 100ns cycle times and has an integral decoder function to enable external devices onto branch address bus which eliminates the requirement for an external decoder. FEATURES I Fully Compatible with Industry Standard 2910A I CMOS SOS Technology I Radiation Hard and High SEU Immunity I High Speed / Low Power I Fully TTL Compatible Figure 1: Block Diagram 1 MA2910 OPERATION The MA2910 is a SOS microprogram controller intended for use in high speed microprocessor applications. Besides the capability of sequential access, it provides conditional branching to any microinstruction within its 4096-microword range. A last-in, first-out stack provides microsubroutine return linkage and looping capability; there are nine nesting levels of microsubroutines. Microinstruction loop count control is provided with a count capacity of 4096. The device is controlled by 16, 4-bit microinstructions. The PLA decodes the microinstructions on I(3:P) and produces select control codes for the multiplexer, register/counter, microprogram counter register, and stack. The 4-bit microinstructions also generate three active low enable signals (PL, VECT, and MAP) for external use. The operation of each device block is detailed below: MULTIPLEXER The MA2910 contains a four-input multiplexer that is used to select either the register/counter, direct input, microprogram counter, or stack as the source of the next microinstruction address. REGISTER/COUNTER The register/counter consists of 12 D-type, edgetriggered flip-flops, with a common clock enable. It is operated during microinstructions (8,9,15) as a 12-bit down counter, with result = zero available as a microinstruction branch test criterion. This provides efficient iteration of microinstructions. The register/ counter is arranged such that if it is preloaded with a number N and is then used as a loop termination counter, the sequence will be executed exactly N+1 times. During instruction 15, a three way branch under combined control of the loop counter and the condition code is available. When its load control, RLD, is LOW, new data is loaded on the next positive control transition. The output of the register/counter is available to the multiplexer as a source for the next microinstruction address. The direct input furnishes a source of data for loading the register /counter. MICROPROGRAM COUNTER-REGISTER The Microprogram Counter Register (µPC) is composed of a 12-bit incrementer followed by a 12-bit register. The (µPC) can be used in one of two ways: When the carry-in to the incrementer is HIGH, the microprogram register is loaded onto the next clock cycle with the current Y output word plus one (Y + 1 ¨ µPC). Sequential microinstructions are thus executed. When the carry-in is LOW, the incrementer passes the Y output unmodified so that the µPC is reloaded with the same Y word on the next clock cycle (Y ¨ µPC). The same microinstruction is thus executed any number of times. STACK AND STACK POINTER The third source available at the multiplexer input is a 9-word by 12-bit stack. The stack is used to provide return address linkage when executing microsubroutines or loops. The stack contains a built-in stack pointer (SP) which always points to the last file word written. This allows stack reference operations (looping) to be performed without a POP. Explicit control of the stack pointer occurs during instruction 0 (RESET), which makes the stack empty by resetting the SP to zero. After a RESET, and whenever the stack is empty, the contents of the top of the stack are undefined until a push occurs. Any POPs performed while the stack is empty put undefined data on the outputs and leave the stack at zero. The stack pointer operates as an up/down counter. During microinstructions 1,4, and 5, the PUSH operation may occur. This causes the stack pointer to increment and the file to be written with the required return linkage. On the cycle following the PUSH, the return data is at the new location pointed to by the stack pointer. During five microinstructions, a POP operation may occur. The stack pointer decrements at the next rising clock edge following a POP, effectively removing old information from the top of the stack. The stack pointer linkage is such that any sequence of pushes, pops, or stack references can be achieved. At RESET (instruction 0), the depth of nesting becomes zero. For each PUSH, the nesting depth increases by one; for each POP, the depth decreases by one. PIN DESCRIPTIONS VDD and GND (Power and Ground) The MA2910 operates from a single supply voltage of 5V + 10% D (0 to 11) (Direct input) These connections provide direct input to the register/ counter, and the multiplexer. D0 is the least significant bit and D1 the most significant I (0 to 3) (instruction bus) The data on these inputs is read on the rising edge of CP. It determlnes the instruction to be executed in accordance with table 1. CC (Condition Code) This active low input is used to determine the result of conditional instructlon. LOW indicates a TRUE conditlon. CCEN (Condition code enable) This active low input enables the CC input. When CCEN is HIGH, CC is ignored and a conditional operation executed as though CC were LOW (TRUE). CI (Carry input) When HIGH this input causes the microprogramme counter register to increment on the rising edge of CP. When LOW the counter remains unchanged. RLD (Register load) This active low input loads the register/counter from the D bus on the rising edge of CP. It will override any HOLD or DEC instruction specified by data on the I bus. 2 MA2910 Y (0 to 11) (Microcode address) This is a 12 bit wide tristate output bus. It carries the microcode address generated according to the instruction read in from the I bus. OE can be used to put the bus in a high impedance state. This allows another to take control of the microcode address bus. OE (Output enable) This active low input is used to enable the 12 lines of the Y bus. CP (Clock Pulse) A LOW-to-HlGH transition on this input is used to trigger all state changes within the device. FULL (stack full) The active low output FULL indicates that 9 items have been loaded onto the stack . PL, MAP & VECT (pipeline, map and vector) These active low outputs are set according to the instruction being executed. At any time only one is active. They may be used to select from one of three possible external sources for microprogramme jumps, being used directly as three-state enables for these sources. Typically: PL enables the primary source of microprogramme jumps, usually part of a pipeline register; MAP enables a PROM which maps an instruction to a microcode starting location; VECT enables an optional third source, after a vector from DMA or interrupt source. I3 - I0 MNEMONIC NAME REGISTER /CONTROL FAIL CCEN = LOW & CC = HIGH Y STACK 0 PC D PC PC R PC R F PC D PC PC PC PC F PC F D CLEAR HOLD HOLD HOLD PUSH PUSH HOLD HOLD HOLD POP HOLD HOLD HOLD HOLD HOLD HOLD HOLD HOLD PO P PASS CCEN = HIGH & CC = LOW Y STACK O D D D PC D D D F PC D PC F D PC PC PC PC PC CLEAR PUSH HOLD HOLD PUSH PUSH HOLD HOLD HOLD POP HOLD HOLD POP POP HOLD POP HOLD POP POP REGISTER/ CONTROL ENABLE 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 JZ CJS JMAP CJP PUSH JSRP CJV JRP RFCT RPCT CRTN CJPP LDCT LOOP CONT TWB JUMP ZERO COND JS P PL JUMP MAP COND JUMP PL PUSH/COND LD CNTR COND JSB R/PL VECTOR COND JUMP COND JUMP R/PL REPEAT LOOP CNTR ≠ 0 REPEAT PL, CNTR ≠ 0 COND RTN COND JUMP PL & POP LD CNTR & CONTINUE TEST END LOOP CONTINUE THREE-WAY BRANCH . X X X X X X X X ≠0 =0 ≠0 =0 X X X X X ≠0 =0 HOLD HOLD HOLD HOLD Note 1 HOLD HOLD HOLD DEC HOLD DEC HOLD HOLD HOLD LOAD HOLD HOLD DEC HOLD PL PL MAP PL PL PL VECT PL PL PL PL PL PL PL PL PL PL PL PL Note 1: If CCEN = LOW & CC = HIGH, hold, else load. Figure 2: Table of Instructions 3 MA2910 INSTRUCTION SET The MA2910 provides 16 instructions which select the address of the next microinstruction to be executed. 4 of the instructions are unconditional and their effect depends only on the instruction. 10 of the instructions have an effect which is partially controlled by external conditions. 3 of the instructions have an effect which is partially controlled by the contents of the internal register/counter. In this discussion it is assumed the Cl is tied HIGH. In the 10 conditional instructions, the result of the datadependent test is applied to CC. If the CC input is LOW, the test is considered passed, and the action specified in the name occurs; otherwise, the test has failed and an alternate (often simply the execution of the next sequential microinstruction) occurs. Testing of CC may be disabled for a specific microinstruction by setting CCEN HIGH, which unconditionally forces the action specified in the name; that is it forces a pass.Other ways of using CCEN include; (1) tying it HIGH, which is useful if no mi