4ch Electronic Volume

www.DataSheet4U.com M61530FP 4ch Electronic Volume with 5.1ch Analog Input REJ03F0058-0100Z Rev.1.0 Sep.19.2003 Description The M61530FP is a four-channel volume IC which is optimal for combination with the M61519FP two-channel electronic volume. A multi-channel system is easily configured with the aid of these two chips. Features Function names Main volume control Low pass filter (LPF) AGC Bass boost Output gain control Input gain control Microcomputer I/F Features 0 to −87 dB in 1-dB steps, −∞ Four independently controlled volumes (SL, SR, C, LFE) On-chip operational amplifiers for configuration of post-filters through the addition of external C and R elements AGC circuit is included to prevent clipping HPF type, with on/off switch 0, +6, +9, or +12 dB (four steps) 0, +5, +10 dB (three steps) Two-line serial data control Application Mini-component systems, micro-component systems, etc. Recommended Operating Conditions Power-supply voltage range: Vcc = 8 to 10 V Rated power-supply voltage: Vcc = 9 V Rev.1.0, Sep.19.2003, page 1 of 18 www.DataSheet4U.com M61530FP System Block Diagram M 61530FP LI N RIN FLIN FRIN SLIN SL_EXTIN M61519FP Input selector L-LPF R-LPF 0,+5,+10dB Input selector Surround or DPL buffer Tone VOL Bass booster LOUT ROUT Tone VOL Bass booster FL-LPF 0,+5,+10dB FR-LPF SL-LPF SR-LPF +6dB SLchVOL +6dB Bass booster SLOUT SRchVOL Bass booster SRIN SR_EXTIN SROUT C-LPF +6dB CchVOL CIN LFEIN SWIN COUT LFEchVOL AGC SW-LPF 0,+6, +9,+12dB SWOUT Rev.1.0, Sep.19.2003, page 2 of 18 www.DataSheet4U.com M61530FP Block diagram with pin connections FR_LPFOUT FR_LPFIN SL_EXTIN SL_VOLIN SL_LPFOUT SL_LPFIN SR_EXTIN SR_VOLIN SR_LPFOUT 1 2 3 FRch LPF amp FR input gain control 0,+5,+10dB FL input gain control 0,+5,+10dB FLch LPF amp 42 FL_LPFOUT 41 FL_LPFIN 40 R_LPFIN SLVOLXY input SW SL ch volume Rch LPF amp 4 5 6 +6dB 0 to -87dB,-∞ 39 R_LPFOUT 38 L_LPFOUT 37 L_LPFIN SLch LPF amp Lch LPF amp 7 SRVOL input SW SRch volume VREF amp 36 REFIN 35 REFOUT 34 FL_OUT 8 9 0 to -87dB,-∞ SRch LPF amp FL output SW SR_LPFIN 10 +6dB 33 FR_IN Cch volume 0 to -87dB ,-∞ OFF FR output SW ON C_VOLIN 11 C_LPFOUT 12 C_LPFIN 13 +6dB 32 FR_OUT 31 SL_BB1 Cch LPF amp Bass booster ON/OFF 30 SL_BB2 29 SL_OUT LFEch volume 0 to -87dB,-∞ Bass booster LFE_VOLIN 14 SW_IN 15 VCC 16 28 SR_BB1 Bass booster ON/OFF 27 SR_BB2 26 SR_OUT DATA 17 Microcomputer I/F SW MIX SW LFEMIX SW Bass booster CLOCK 18 GND 19 TEST 20 AGC 21 25 C_OUT AGC SW output-gain control 0,+6,+9,+12dB 24 SW_OUT 23 SW_LPFIN 22 SW_LPFOUT SWch LPF amp Rev.1.0, Sep.19.2003, page 3 of 18 www.DataSheet4U.com M61530FP Pin description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 Pin Name FR_LPFOUT FR_LPFIN SL_EXTIN SL_VOLIN SL_LPFOUT SL_LPFIN SR_EXTIN SR_VOLIN SR_LPFOUT SR_LPFIN C_VOLIN C_LPFOUT C_LPFIN LFE_VOLIN SW_IN VCC DATA CLOCK GND TEST AGC SW_LPFOUT SW_LPFIN SW_OUT C_OUT SR_OUT SR_BB2 SR_BB1 SL_OUT SL_BB2 SL_BB1 FR_OUT FR_IN FL_OUT REFOUT REFIN L_LPFI N L_LPFOUT R_LPFOUT R_LPFIN FL_LPFIN FL_LPFOUT Description Configure a low-pass filter by adding external C and R elements to the input of the FR channel SL channel external input pin SL channel volume input pin Configure a low-pass filter by adding external C and R elements to the input of the SL channel SR channel external input pin SR channel volume input pin Configure a low-pass filter by adding external C and R elements to the input of SR channel C channel volume input pin Configure a low-pass filter by adding external C and R elements to the input of the C channel LFE channel volume input pin SW channel input pin Power-supply pin for internal analog and digital circuitry (VCC = 9 V) DATA input pin for serial data transfer CLOCK input pin for serial data transfer GND pin for internal analog and digital circuitry Pin for setting the test mode (normally fixed low) C connection pin for setting attack/recovery time for AGC Configure a low-pass filter by adding external C and R elements to the input of the SW channel SW channel output pin C channel output pin SR channel output pin Pin for connecting external components that set bass-boost frequency characteristics for the SR channel SL channel output pin Pin for connecting external components that set bass-boost frequency characteristics for the SL channel FR channel output pin Pin for interfacing with the M61519FP surround circuit FL channel output pin Internal reference output pin Internal reference input pin Configure a low-pass filter by adding external C and R elements to the input of the L channel Configure a low-pass filter by adding external C and R elements to the input of the R channel Configure a low-pass filter by adding external C and R elements to the input the of FL channel Rev.1.0, Sep.19.2003, page 4 of 18 www.DataSheet4U.com M61530FP Absolute Maximum Ratings Parameter Power-supply voltage Internal power dissipation Thermal reduction rate Ambient operating temperature Storage temperature Symbol VCC Pd Kθ Topr Tstg Ratings 10.5 850 8.6 -20 to +75 -40 to +125 Unit V mW mW/°C °C °C Ta≤25°C Ta>25°C Conditions Thermal derating curve 1.0 0.85W Internal power dissipation pd [W] 0.75 0.5 0.42 0.25 0 25 50 75 100 125 150 Ambient temperature Ta [°C] Recommended Operating Condition (Unless otherwise noted, Ta = 25°C) Limits Item Power-supply voltage Logical high level input voltage Logical low level input voltage Symbol VCC VIH VIL Min. 8 2.2 0 Typ. 9   Max. 10 5.5 0.6 Unit V V V VCC=9V VCC=9V Condition Rev.1.0, Sep.19.2003, page 5 of 18 www.DataSheet4U.com M61530FP Relation between DATA and CLOCK Latch condition CLOCK D0 D1 D2 D3 D13 D14 D15 DATA The data signal is read on the rising edges of the CLOCK signal The DATA line is driven high to latch D0 to D15 at this time 1. Data transmission The DATA signal is read on the rising edges of the CLOCK signal. The DATA line must always be low on the falling edge of the CLOCK signal during transmission of the DATA signal. 2. Data Latch Data for this IC is in 16-bits (D0 to D15) words. Latch the transmitted data by driving the DATA line high on the falling edge of the CLOCK signal after the transmission of D15. CLOCK and DATA timing (D0 to D15) (D15) L ATCH signal tcr DATA tSLD 75% tHLD tSHD tHHD tSLD tHLD CLOCK 25% tr tWHC tf tWLC Rev.1.0, Sep.19.2003, page 6 of 18 www.DataSheet4U.com M61530FP Digital module timing Limits Item Clock: Cycle time Clock: Pulse width (high) Clock: Pulse width (low) Clock: Rising time Clock: Falling time Data: Setup time (high), clock rising Data: Setup time (low), clock falling Data: Hold time (high) Data: Hold time (low) Symbol tcr tWHC tWLC tr tf tSHD tSLD tHHD tHLD Min. 4 1.6 1.6   0.8 0.8 0.8 0.8 Typ.          Max.    0.4 0.4     Unit µS Rev.1.0, Sep.19.2003, page 7 of 18 www.DataSheet4U.com M61530FP Data input format (Set all data shown below to the initial values every time power is turned on.) (1) D0a D1a D2a (8) SLch trim potentiometer D3a D4a D5a D6a (8) D7a D8a D9a (1) D10a D11a D12a D13a D14 (2) (3) (4) (5) FL/FR Input LFEMIX SWMIX output SW for SW SW SW SL/SR volume D15 0 SRch trim potentiometer FL/FR input gain control 0 (2) D0b D1b D2b (8) Cch trim potentiometer D3b D4b D5b D6b (8) D7b D8b (6) D9b D10b D11b D12b D13b D14 (7) D15 1 LFEch trim volume Bass SW output gain control boost 0 0 0 0 (3) D0c D1c D2c (9) SLch master volume D3c D4c D5c D6c D7c (9) D8c D9c D10c D11c D12c D13c D14 0 0 0 0 1 D15 0 SRch master volume (4) D0d D1d D2d (9) Cch master volume D3d D4d D5d D6d D7d (9) D8d D9d D10d D11d D12d D13d D14 0 0 0 0 1 D15 1 LFEch master volume Code settings (1) FL/FR input gain control Setting 0dB +5dB +10dB D8a 0 0 1 D9a 0 1 0 (3) Input switch for SL/SR volume (5) SW MIX SW Setting SL/SRch input External input D11a 0 1 Setting ON OFF D13a 0 1 : Initial setting (6) Bass boost Setting OFF ON D8b 0 1 (2) FL/FR output SW Setting ON OFF D10a 0 1 (4) LFE MIX SW Setting ON OFF D12a 0 1 (7) SW output gain control Setting 0dB +6dB +9dB +12dB D9b 0 0 1 1 D10b 0 1 0 1 Note: Do not use data codes other than those specified above. Rev.1.0, Sep.19.2003, page 8 of 18 www.DataSheet4U.com M61530FP (8) SL/SR/C/LFEch trim volume SLch Attenu ation SRch Cch D0a D4a D0b D4b 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D1a D5a D1b D5b 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D2a D6a D2b D6b 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D3a D7a D3b D7b 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 (9) SL/SR/C/LFEch master volume SLch Attenu ation SRch Cch D0c D5c D0d D5d 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D1c D6c D1d D6d 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2c D7c D2d D7d 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D3c D8c D3d D8d 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D4c D9c D4d D9d 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 LFEch 0dB -1dB -2dB -3dB -4dB -5dB -6dB -7dB -8dB -9dB -10dB -11dB -12dB -13dB -14dB -15dB LFEch 0dB -2dB -4dB -6dB -8dB -10dB -12dB -14dB -16dB -18dB -20dB -22dB -24dB -26dB -28dB -30dB -32dB -34dB -36dB -38dB -40dB -42dB -44dB -48dB -52dB -56dB -60dB -64dB -68dB -72dB -76dB -∞dB Note: When the sum of the trim potentiometer and master volume settings is –87 dB or less, the overall level is –87 dB (e.g. when the trim potentiometer is –15 dB and master volume is -76 dB, the total level becomes -87 dB). Note: Do not use data codes other than those specified above. Rev.1.0, Sep.19.2003, page 9 of 18 www.DataSheet4U.com M61530FP Electrical characteristics Unless otherwise noted, Ta = 25°C, Vcc = 9 V, f = 1 kHz, input gain control = 0 dB, bass boost = off, trim/master volume = 0 dB, FL/FR output SW = on, SL/SR VOL input SW = SL/SR input