Micropower 150 mA Low-Noise Low-Dropout Regulator in SOT-23 and micro SMD packages for Applications

LP2985LV Micropower 150 mA Low-Noise Low-Dropout Regulator in SOT-23 and micro SMD packages for Applications with Output Voltages ≤ 2.3V May 2004 LP2985LV Micropower 150 mA Low-Noise Low-Dropout Regulator in SOT-23 and micro SMD packages for Applications with Output Voltages ≤ 2.3V Designed for Use with Very Low ESR Output Capacitors General Description The LP2985LV is a 150 mA, fixed-output voltage regulator designed to providehigh performance and low noise in applications requiring output voltages < 2.3V. Using an optimized VIP™ (Vertically Integrated PNP) process, the LP2985LV delivers unequalled performance in all specifications critical to battery-powered designs: Ground Pin Current: Typically 825 µA @ 150 mA load, and 75 µA @ 1 mA load. Enhanced Stability: The LP2985LV is stable with output capacitor ESR as low as 5 mΩ, which allows the use of ceramic capacitors on the output. Sleep Mode: Less than 1 µA quiescent current when ON/ OFF pin is pulled low. Smallest Possible Size: micro SMD package uses absolute minimum board space. Precision Output: 1% tolerance output voltages available (A grade). Low Noise: By adding a 10 nF bypass capacitor, output noise can be reduced to 30 µV (typical). Features n n n n n n n n n n n n n Guaranteed 150 mA output current Smallest possible size (micro SMD) Requires minimum external components Stable with low-ESR output capacitor < 1 µA quiescent current when shut down Low ground pin current at all loads Output voltage accuracy 1% (A Grade) High peak current capability Wide supply voltage range (16V max) Low ZOUT: 0.3Ω typical (10 Hz to 1 MHz) Overtemperature/overcurrent protection −40˚C to +125˚C junction temperature range Custom voltages available Applications n n n n Cellular Phone Palmtop/Laptop Computer Personal Digital Assistant (PDA) Camcorder, Personal Stereo, Camera Block Diagram 10129501 VIP™ is a trademark of National Semiconductor Corporation. © 2004 National Semiconductor Corporation DS101295 www.national.com LP2985LV Basic Application Circuit 10129502 *ON/OFF input must be actively terminated. Tie to VIN if this function is not to be used. **Minimum capacitance is shown to ensure stability (may be increased without limit). Ceramic capacitor required for output (see Application Hints). ***Reduces output noise (may be omitted if application is not noise critical). Use ceramic or film type with very low leakage current (see Application Hints). Connection Diagrams 5-Lead Small Outline Package (M5) micro SMD, 5 Bump Package (BPA05 & BLA05) 10129503 Top View See NS Package Number MF05A For ordering information see Table 1 10129523 Note: The actual physical placement of the package marking will vary from part to part. Package marking contains date code and lot traceability information, and will vary considerably. Package marking does not correlate to device type. Top View See NS Package Number BPA05 & BLA05 Pin Descrption Name SOT-23 VIN GND ON/OFF BYPASS VOUT 1 2 3 4 5 Pin Number micro SMD C3 A1 A3 B2 C1 Input Voltage Common Ground (device substrate) Logic high enable input Bypass capacitor for low noise operation Regulated output voltage Function www.national.com 2 LP2985LV Ordering Information TABLE 1. Package Marking and Ordering Information Output Voltage (V) Grade Order Information Package Marking LF7A LF7A LF7B LF7B LCHA LCHA LCHB LCHB LAYA LAYA LAYB LAYB LCDA LCDA LCDB LCDB Supplied as: 5-Lead Small Outline Package (M5) 1.35 1.35 1.35 1.35 1.5 1.5 1.5 1.5 1.8 1.8 1.8 1.8 2.0 2.0 2.0 2.0 1.5 1.5 1.5 1.5 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 1.8 A A STD STD A A STD STD A A STD STD A A STD STD A A STD STD A A STD STD A A STD STD A A STD STD LP2985AIM5X-135 LP2985AIM5-135 LP2985IM5X-135 LP2985IM5-135 LP2985AIM5X-1.5 LP2985AIM5-1.5 LP2985IM5X-1.5 LP2985IM5-1.5 LP2985AIM5X-1.8 LP2985AIM5-1.8 LP2985IM5X-1.8 LP2985IM5-1.8 LP2985AIM5X-2.0 LP2985AIM5-2.0 LP2985IM5X-2.0 LP2985IM5-2.0 LP2985AIBP-1.5 LP2985AIBPX-1.5 LP2985IBP-1.5 LP2985IBPX-1.5 LP2985AIBP-1.8 LP2985AIBPX-1.8 LP2985IBP-1.8 LP2985IBPX-1.8 LP2985AIBL-1.8 LP2985AIBLX-1.8 LP2985IBL-1.8 LP2985IBLX-1.8 LP2985AITP-1.8 LP2985AITPX-1.8 LP2985ITP-1.8 LP2985ITPX-1.8 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 3000 Units on Tape and Reel 1000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel 250 Units on Tape and Reel 3000 Units on Tape and Reel micro SMD, 5 Bump Package (BPA05 - 170 µm ball) micro SMD, 5 Bump Package (BLA05 - 300 µm ball) micro SMD, 5 Bump Package (TPA05 - 170 µm ball) 3 www.national.com LP2985LV Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Storage Temperature Range Operating Junction Temperature Range Lead Temp. (Soldering, 5 sec.) ESD Rating (Note 2) Power Dissipation (Note 3) −65˚C to +150˚C −40˚C to +125˚C 260˚C 2 kV Internally Limited Input Supply Voltage (Survival) Input Supply Voltage (Operating) Shutdown Input Voltage (Survival) Output Voltage (Survival, (Note 4)) IOUT (Survival) Input-Output Voltage (Survival, (Note 5)) −0.3V to +16V 2.2V to +16V −0.3V to +16V −0.3V to +9V Short Circuit Protected −0.3V to +16V Electrical Characteristics (Note 10) Limits in standard typeface are for TJ = 25˚C. and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 1 mA, CIN = 1 µF, COUT = 4.7 µF, VON/OFF = 2V. LP2985AI-X.X Symbol ∆VO Parameter Output Voltage Tolerance Conditions IL = 1 mA 1 mA ≤ IL ≤ 50 mA 1 mA ≤ IL ≤ 150 mA Output Voltage Line Regulation IGND Ground Pin Current IL = 0 IL = 1 mA IL = 10 mA IL = 50 mA IL = 150 mA VON/OFF < 0.3V VON/OFF < 0.15V VIN(min) Minimum Input Voltage Required To maintain Output Regulation (Note 9) IL = 50mA VIN - VOUT Dropout Voltage (Note 9) ON/OFF Input Voltage (Note 7) ON/OFF Input Current Output Noise Voltage (RMS) IL = 150mA High = O/P ON Low = O/P OFF VON/OFF = 0 VON/OFF = 5V en BW = 300 Hz to 50 kHz, COUT = 10 µF CBYPASS = 10 nF VOUT = 1.8V 30 µV 65 75 120 300 825 0.01 0.05 2.05 VO(NOM)+1V ≤ VIN ≤ 16V 0.007 Typ (Note 6) Min −1.0 −1.5 −2.5 −2.5 −3.5 Max 1.0 1.5 2.5 2.5 3.5 0.014 0.032 95 125 110 170 220 400 500 900 1200 2000 0.8 2 2.20 LP2985I-X.X (Note 6) Min −1.5 −2.5 −3.5 −3.0 −4.0 Max 1.5 2.5 3.5 3.0 4.0 0.014 0.032 95 125 110 170 220 400 500 900 1200 2000 0.8 2 2.20 V µA %/V %VNOM Units 120 280 1.4 0.55 0.01 5 1.6 150 250 350 600 1.6 0.15 −2 15 150 250 350 600 0.15 −2 15 mV VON/OFF ION/OFF V µA www.national.com 4 LP2985LV Electrical Characteristics (Note 10) (Continued) Limits in standard typeface are for TJ = 25˚C. and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 1 mA, CIN = 1 µF, COUT = 4.7 µF, VON/OFF = 2V. LP2985AI-X.X Symbol Parameter Ripple Rejection Conditions f = 1 kHz, CBYPASS = 10 nF COUT = 10 µF 45 dB Typ (Note 6) Min Max LP2985I-X.X (Note 6) Min Max Units IO(SC) IO(PK) Short Circuit Current Peak Output Current RL = 0 (Steady State) (Note 8) VOUT ≥ Vo(NOM) −5% 400 350 mA mA Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device outside of its rated operating conditions. Note 2: The ESD rating of pins 3 and 4 for the SOT-23 package, or pins 5 and 2 for the micro SMD package, is 1 kV. Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, θJ-A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperture is calculated using: Where the value of θJ-A for the SOT-23 package is 220˚C/W in a typical PC board mounting. Exceeding the maximum allowable dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Note 4: If used in a dual-supply system where the regulator load is returned to a negative supply, the LP2985LV output must be diode-clamped to ground. Note 5: The output PNP structure contains a diode between the VIN to VOUT terminals that is normally reverse-biased. Reversing the polarity from VIN to VOUT will turn on this diode, and possibly damage the device (See Application Hints). Note 6: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL). Note 7: The ON/OFF input must be properly driven to prevent possible misoperation. For details, refer to Application Hints. Note 8: The LP2985LV has foldback current limiting which allows a high peak current when VOUT > 0.5V, and then reduces the maximum output current as VOUT is forced to ground (see Typical Performance Characteristics curves). Note 9: VIN must be the greater of 2.2V or VOUT(nom) + Dropout Voltage to maintain output regulation. Dropout Voltage is defined as the input to output differential at which the output voltage drops 2% below ther value measured with a 1V