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Part Number |
LMH0346 |
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Manufacturer |
National Semiconductor |
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Semiconductor DataSheet |
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DataSheet View |
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LMH0346 3Gbps HD/SD SDI Reclocker with Dual Differential Outputs
PRELIMINARY
April 2007
LMH0346 3Gbps HD/SD SDI Reclocker with Dual Differential Outputs
General Description
The LMH0346 3Gbps HD/SD SDI Reclocker retimes serial digital video data conforming to the SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) standards. The LMH0346 operates at serial data rates of 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps. The LMH0346 supports DVB-ASI operation at 270 Mbps. The LMH0346 automatically detects the incoming data rate and adjusts itself to retime the incoming data to suppress accumulated jitter. The LMH0346 recovers the serial data-rate clock and optionally provides it as an output. The LMH0346 has two differential serial data outputs; the second output may be selected as a low-jitter, data-rate clock output (DDR clock at 3Gbps). Controls and indicators are: serial clock or second serial data output select, manual rate select input, SD/HD rate indicator output, lock detect output, auto/manual data bypass and output mute. The serial data inputs, outputs, and serial clock outputs are differential LVPECL compatible. The CML serial data and serial clock outputs are suitable for driving 100Ω differentially terminated networks. The control logic inputs and outputs are LVCMOS compatible. The LMH0346 is powered from a single 3.3V supply. Power dissipation is typically 370 mW. The device is housed in a 20pin e-TSSOP package.
Features
■ Supports SMPTE 424M, SMPTE 292M, and SMPTE
259M (C) serial digital video standards
■ Supports 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
Gbps, and 2.97 Gbps serial data rate operation Supports DVB-ASI at 270 Mbps Single 3.3V supply operation 370 mW typical power consumption Two differential, reclocked outputs Choice of second reclocked output or low-jitter, differential, data-rate clock output (DDR clock at 3Gbps) Single 27 MHz external crystal or reference clock input Manual rate select input SD/HD operating rate indicator output Lock Detect indicator output Output mute function for data and clock Auto/Manual reclocker bypass Differential LVPECL compatible serial data inputs and outputs LVCMOS control inputs and indicator outputs 20-Pin e-TSSOP package Industrial temperature range: -40°C to +85°C Footprint compatible with the LMH0046
Applications
■ SDTV/HDTV and 3Gbps serial digital video interfaces for:
— — — — Digital video routers and switchers Digital video processing and editing equipment DVB-ASI equipment Video standards and format converters
Typical Application
20215001
© 2007 National Semiconductor Corporation
202150
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LMH0346
Block Diagram
20215003
Connection Diagram
20215002
The exposed die attach pad is the negative electrical terminal for this device. It must be connected to the negative power supply voltage.
20-Pin e-TSSOP Order Number LMH0346MH See NS Package Number MXA20A
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LMH0346
Pin Descriptions
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 DAP LF1 LF2 RATE 0 RATE 1 SDI SDI VCC BYPASS/AUTO BYPASS OUTPUT MUTE XTAL IN/EXT CLK XTAL OUT LOCK DETECT SCO/SDO2 SCO/SDO2 VCCO SDO SDO VCCO SD/HD SCO_EN VEE Name Loop Filter Loop Filter Data Rate Select Input Data Rate Select Input Data Input True Data Input Complement Positive power supply input Bypass/Auto Bypass mode select Data and Clock Output Mute Input (active low) Crystal or External Oscillator Input Crystal Oscillator Output PLL Lock Detect Output (active high) Serial Clock or Serial Data Output 2 Complement Serial Clock or Serial Data Output 2 True Positive power supply input (Output Driver) Data Output Complement Data Output True Positive power supply input (Output Driver) Data Rate Range Output Serial Clock or Serial Data 2 Output select (active high enables serial clock output) Connect exposed DAP to negative power supply (ground) Description
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LMH0346
Absolute Maximum Ratings (Note 1)
It is anticipated that this device will not be offered in a military qualified version. If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VCC–VEE) Logic Supply Voltage (Vi) Logic Input Current (single input): Vi = VEE−0.15V Vi = VCC+0.15V Logic Output Voltage (Vo) Logic Output Source/Sink Current Serial Data Input Voltage (VSDI) Serial Data Output Sink Current (ISDO) 4.0V VEE−0.15V to VCC +0.15V −5 mA +5 mA VEE−0.15V to VCC +0.15V ±8 mA VCC to VCC−2.0V 24 mA
Package Thermal Resistance, TSSOP θJA θJC Storage Temp. Range Junction Temperature Lead Temperature (Soldering 4 Sec) ESD Rating (HBM) ESD Rating (MM) 26.6°C/W 2.4°C/W −65°C to +150°C +150°C +260°C (Pb-free) 8 kV 350V
Recommended Operating Conditions
Supply Voltage (VCC–VEE) Logic Input Voltage Differential Serial Input Voltage Serial Data or Clock Output Sink Current (ISO) Operating Free Air Temperature (TA) 3.3V ±5% VEE to VCC 800 mV ±10% 16 mA max. −40°C to +85°C
DC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (Notes 2, 3) Symbol VIH VIL IIH IIL VOH VOL VSDID VCMI VSDOD VCMO ICC Parameter Input Voltage High Level Input Voltage Low Level Input Current High Level Input Current Low Level VIH = VCC VIL = VEE Logic outputs SDI 2 VEE + 0.6 200 VCC−1.6 100Ω differential load 100Ω differential load 1485 Mbps, NTSC color bar pattern SDO, SCO 720 800 VCC− VSDOD 111 1600 VCC−0.2 880 Conditions Reference Logic inputs Min 2 VEE 1 −1 Typ Max VCC 0.8 65 −25 Units V V µA µA V V mVP-P V mVP-P V mA
Output Voltage High Level IOH = −2 mA Output Voltage Low Level IOL = +2 mA Serial Input Voltage, Differential Input Common Mode Voltage Serial Output Voltage, Differential Output Common Mode Voltage Power Supply Current, 3.3V supply, Total
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LMH0346
AC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (Note 3) Symbol BRSD BRSD BRSD TOLJIT TOLJIT TOLJIT TOLJIT TOLJIT TOLJIT tJIT tJIT tJIT BWLOOP Parameter Serial Data Rate Serial Data Rate Serial Data Rate Serial Input Jitter Tolerance Serial Input Jitter Tolerance Serial Input Jitter Tolerance Serial Input Jitter Tolerance Serial Input Jitter Tolerance Serial Input Jitter Tolerance Serial Data Output Jitter Serial Data Output Jitter Serial Data Output Jitter Loop Bandwidth Conditions SMPTE 259M, C SMPTE 292M SMPTE 424M 270 Mbps, (Notes 7, 9, 11) 270 Mbps, (Notes 7, 8, 10) 1483 or 1485 Mbps, (Notes 7, 8, 9) 1483 or 1485 Mbps, (Notes 7, 8, 10) 2967 or 2970 Mbps, (Notes 7, 8, 9) 2967 or 2970 Mbps, (Notes 7, 8, 10) 270 Mbps, (Note 8) 1483 or 1485 Mbps, (Note 8) 2967 or 2970 Mbps, (Note 8) 270 Mbps, <0.1dB Peaking 1485 Mbps, <0.1dB Peaking 2970 Mbps, <0.1dB Peaking FCO FCO FCO FCO FCO tJIT Serial Clock Output Frequency Serial Clock Output Frequency Serial Clock Output Frequency Serial Clock Output Frequency Serial Clock Output Frequency Serial Clock Output Jitter Serial Clock Output Alignment with respect to Data Interval Serial Clock Output Duty Cycle TACQ Acquisition Time Auto-Rate Detect Mode, (Notes 4, 6) Fixed Rate Mode, (Notes 4, 6) tr, tf Input rise/fall time 10%–90% Logic inputs SDO, SCO 40 SCO 60 % 270 Mbps data rate 1483 Mbps data rate 1485 Mbps data rate 2967 Mbps data rate 2970 Mbps data rate SCO SDO SDI Reference SDI, SDO Min Typ 270 1483, 1485 2967, 2970 >6 >0.6 >6 >0.6 >6 >0.6 0.01 0.03 0.09 300 2.0 4.0 270 1483 1485 1483 1485 2 3 0.06 0.08 0.15 Max Units Mbps Mbps Mbps UIP-P UIP-P UIP-P UIP-P UIP-P UIP-P UIP-P UIP-P UIP-P kHz MHz MHz MHz MHz MHz MHz MHz psRMS
45 10 1 1.5
55 16 6 3
% ms ms ns
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LMH0346
Symbol tr, tf tr, tf tr, tf tr, tf tr, tf FREF FTOL
Parameter Input rise/fall time Input rise/fall time Input rise/fall time Output rise/fall time Output rise/fall time Reference Clock Frequency Reference Clock Frequency Tolerance
Conditions 20%–80%, 270 Mbps 20%–80%, 1483 or 1485 Mbps 20%–80%, 2967 or 2970 Mbps 10%–90% 20%–80%, (Note 5)
Reference SDI
Min
Typ
Max 1500 270 135
Units ps ps ps ns ps MHz ppm
Logic outputs SDO, SCO
1.5 90 27 ±50
3 130
Note 1: “Absolute Maximum Ratings” are those parameter values beyond which the life and operation of the device cannot be guaranteed. The stating herein of these maximums shall not be construed to imply that the device can or should be operated at or beyond these values. The table of “Electrical Characteristics” specifies acceptable device operating conditions. Note 2: Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are referenced to VEE (equal to zero volts). Note 3: Typical values are stated for: VCC = +3.3V, TA = +25°C. Note 4: Spec is guaranteed by design. Note 5: RL = 100Ω differential. Note 6: Measured from first SDI transition until Lock Detect (LD) output goes high (true). Note 7: Peak-to-peak amplitude with sinusoidal modulation per SMPTE RP 184-1996 paragraph 4.1. The test data signal shall be color bars. Note 8: This parameter is guaranteed by characterization over voltage and temperature limits. Note 9: Refer to “A1” in Figure 1 of SMPTE RP 184-1996. Note 10: Refer to “A2” in Figure 1 of SMPTE RP 184-1996. Note 11: Characterized to the limitations of SDI test equipment.
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LMH0346
Device Description
The LMH0346 3Gbps HD/SD SDI Reclocker is used in many types of digital video signal processing equipment. Supported serial digital video standards are SMPTE 259M (C), SMPTE 292M, and SMPTE 424M. Corresponding serial data rates are 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps. DVB-ASI data at 270 Mbps may also be retimed. The LMH0346 retimes the serial data stream to suppress accumulated jitter. It provides two low-jitter, differenti |