100V Power Over Ethernet PD Interface

LM5073 100V Power Over Ethernet PD Interface with Aux Support March 2007 LM5073 100V Power Over Ethernet PD Interface with Aux Support General Description The LM5073 Powered Device (PD) interface provides a high performance solution that is fully compliant to IEEE 802.3af for a PD connecting into Power over Ethernet (PoE) networks. The LM5073 provides the flexibility for the PD to also accept power from unregulated auxiliary sources such as AC adapters and solar cells in a variety of configurations. The low RDS(ON) PD interface hot swap MOSFET and programmable DC current limit extend the range of LM5073 applications up to twice the power level of IEEE 802.3af compliant devices. The 100V maximum voltage rating simplifies selection of the transient voltage suppressor that protects the PD from network transients. Control outputs for a separate DC-DC converter are provided to allow freedom to select the best DC-DC converter topology for the particular application. ■ ■ ■ ■ ■ ■ ■ ■ ■ Programmable DC Current Limit up to 800 mA 100V, 0.7Ω Hot Swap MOSFET Integrated PD Signature Resistor Integrated PoE Input UVLO Inrush Current Limit PD Classification Capability Thermal Shutdown Protection Line Over Voltage Protection Complementary Open Drain Outputs for Controlling a DCDC Converter ■ Power Good Indicator Applications ■ IEEE 802.3af Compliant PoE Powered Devices ■ Non-Compliant, Application Specific Devices ■ Higher Power Ethernet Powered Devices Features PD Interface ■ Fully Compliant IEEE 802.3af PD Interface ■ Versatile Auxiliary Power Options ■ 13V Minimum Front Auxiliary Power Range ■ 9V Minimum Rear Auxiliary Power Range Packages ■ TSSOP-14 EP (Exposed Pad) Simplified Application Diagram 30000201 © 2007 National Semiconductor Corporation 300002 www.national.com LM5073 Connection Diagram 30000202 14 Lead TSSOP-EP Ordering Information Order Number LM5073MH LM5073MHX Package Type TSSOP-14EP TSSOP-14EP NSC Package Drawing MXA14A MXA14A Supplied As 94 Units per Rail 2500 Units on Tape and Reel Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Name UVLORTN UVLO VIN RCLASS FAUX DCCL VEE NC RTN NC nPGOOD nSD SD RAUX EP Description Return for the external UVLO programming resistor divider. Line under-voltage lockout programming pin. Positive supply pin for the PD interface and the DC-DC converter interface. PD Classification programming pin. Front auxiliary power enable pin. PD interface DC current limit programming pin. Negative supply pin for the PD interface; connected to PoE and/or front auxiliary power return path. No internal connection. DC-DC converter power return; connected to the drain of the internal PD interface hot swap MOSFET. No internal connection. PD interface power good delay and indicator. nPGOOD is low when the hot swap MOSFET drain to source voltage is less than 1.5V. Open drain, active low shut down signal to the DC-DC converter. The nSD pin switches to the high impedance state when nPGOOD is less than 2.5V. Open drain, active high shut down signal to the DC-DC converter. The SD pin switches to the low state when nPGOOD is less than 2.5V. Rear auxiliary power enable pin, and dominant/non-dominant selection. Exposed metal pad on the underside of the device. It is recommended to connect this pad to a PC Board plane connected to the VEE pin to improve heat dissipation. www.national.com 2 LM5073 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN, FAUX, UVLO, RTN to VEE (Note 6) UVLORTN to VEE DCCL, RCLASS to VEE nPGOOD, nSD, SD to RTN RAUX to RTN       -0.3V to 100V -0.3V to 16V -0.3V to 7V -0.3V to 16V -0.3V to 100V         ESD Rating Human Body Model (Note 2) Lead Soldering Temp. (Note 3) Wave (4 seconds) Infrared (10 seconds) Vapor Phase (75 seconds) Storage Temperature Junction Temperature   2000V 260°C 240°C 219°C -55°C to 150°C 150°C Operating Ratings VIN voltage Operating Junction Temperature 9V to 70V -40°C to 125°C Electrical Characteristics (Note 4) Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. VIN = 48V unless otherwise indicated. (Note 3) SYMBOL Supply Current VIN Supply Current Detection and Classification VIN Signature Startup Voltage Signature Resistance Signature Resistor Disengage / Classification Engage Hysteresis Classification Current Turn Off RCLASS Voltage Supply Current During Classification Line Under Voltage Lock-Out Default UVLO Release Default UVLO Lock out Default UVLO Hysteresis Programmed UVLO Reference Voltage Programmed UVLO Hysteresis Current UVLORTN Pull Down Resistance UVLO Filter Power Good VDS Required for Power Good Status VDS Hysteresis of Power Good Status VGS Required for Power Good Status Default Delay Time of Loss-of Power Good Status nPGOOD Current Source nPGOOD Open circuit Voltage nPGOOD Pull Down Resistance nPGOOD Threshold Shutdown Outputs nSD/SD Pull Down Resistance Leakage nSD/SD = 16V 180 300 1 Ω µA 2 40 3.5 1.3 0.8 4.5 1.5 1 5.5 30 55 4 180 2.5 70 5.5 300 3 1.7 1.2 6.5 V V V µs µA V Ω V VIN > 12.5V VIN > UVLO VIN > 12.5V VIN Rising VIN Falling 36 29.5 6 1.2 16 1.24 20 55 300 1.28 24 150 38.5 31 40 32.5 V V V V µA Ω µs VIN = 17V VIN Rising 22 1.213 VIN Rising 23.25 11.0 24.5 12 1.9 23.5 1.25 0.7 25 1.287 1.1 1.5 26 12.8 V kΩ V V V V mA Normal Operation 2 3 mA PARAMETER CONDITIONS MIN TYP MAX UNITS 3 www.national.com LM5073 SYMBOL Hot Swap RDS(ON) PARAMETER Hot Swap MOSFET Resistance Hot Swap MOSFET Leakage Inrush Current Limit Default DC Current Limit High DC Current Limit Current Limit Programming Accuracy CONDITIONS MIN TYP 0.7 MAX 1.5 100 180 510 930 12 UNITS Ω µA mA mA mA % V V VDS = 4.0V VDS = 4.0V VDS = 4.0V VDS = 4.0V 120 380 690 -12 60 150 440 800 Hot Swap Over-Voltage Protection VIN OVP Threshold VIN OVP Threshold, Hysteresis Auxiliary Power Option FAUX Threshold FAUX Hysteresis FAUX Pull Down Current RAUX Lower Threshold (I = 22 µA) RAUX Lower Threshold Hysteresis RAUX Upper Threshold (I = 250 µA) RAUX Lower Threshold Current RAUX Upper Threshold Current PDI Thermal Shutdown (Note 5) Thermal Shutdown Temperature Thermal Shutdown Hysteresis Thermal Resistance θJA Junction to Ambient MXA Package 40 °C/W 165 20 °C °C RAUX Pin Rising 5.4 14 170 RAUX Pin Rising 2.3 8.1 8.7 0.5 50 2.7 0.8 6.2 22 250 7.4 30 330 3.4 9.5 V V µA V V V µA µA 65 3 70 Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. Note 3: For detailed information on soldering the plastic TSSOP package, refer to the Packaging Databook available from National Semiconductor. Note 4: Minimum and Maximum limits are guaranteed through test, design, or statistical correlation using Statistical Quality Control (SQC) methods. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purpose only. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL). Note 5: Device thermal limitations may limit usable range. Note 6: During rear auxiliary operation, the RTN pin can be approximately -0.4V with respect to VEE. This is caused by normal internal bias currents, and will not harm the device. Application of external voltage or current must not cause the absolute maximum rating to be exceeded. www.national.com 4 LM5073 Typical Performance Characteristics Default UVLO Threshold vs Temperature DC Current Limit vs. DCCL Resistor 30000203 30000204 Inrush Current Limit vs Temperature Programmed DC Current Limit vs Temperature 30000205 30000206 Default DC Current Limit vs Temperature Input Current vs Input Voltage 30000207 30000208 5 www.national.com LM5073 Block Diagram 30000209 FIGURE 1. LM5073 Top Level Block Diagram Description of Operation and Applications Information The LM5073 integrates a fully IEEE 802.3af compliant PD interface with versatile auxiliary power support. When combined with a separate DC-DC converter, it provides a complete power solution for Powered Devices (PD) that connect to PoE systems. The LM5073 provides the following features: 1. The input voltage rating up to 100V allows greater flexibility when selecting a transient surge suppressor to protect the PD from voltage transients encountered in PoE applications. 2. 3. 4. 5. The integration of the PD signature resistor, inrush current limit, programmable input voltage under-voltage lock-out (UVLO), PD classification, and thermal shutdown simplifies PD implementation. The PD interface accepts power from auxiliary sources including AC adapters and solar cells in various configurations over a wide range of input voltages. Auxiliary power input can be programmed to be either non-dominant or dominant over PoE power. Programmable DC current limit to support PD applications requiring input currents up to 800 mA. Complementary open drain outputs for controlling a DCDC converter. www.national.com 6 LM5073 6. 7. A power good flag pin allows an accurate power good delay to be programmed and provides the option of driving a power good indicator LED. Input line over voltage protection for downstream circuits, including the DC-DC converter. converter should be started slowly enough such that the input current does not exceed the PD interface h