500kHz Wide Input Range Buck Regulator

LM26400Y Dual 2A, 500kHz Wide Input Range Buck Regulator February 2007 LM26400Y Dual 2A, 500kHz Wide Input Range Buck Regulator General Description The LM26400Y is a monolithic, two-output fixed frequency PWM step-down DC/DC regulator in a 16-pin LLP or thermally enhanced ETSSOP package. With a minimum number of external components and internal loop compensation, the LM26400Y is easy to use. The ability to drive 2A loads with an internal 175mΩ NMOS switch using state-of-the-art 0.5µm BiCMOS technology results in a high-power density design. The world class control circuitry allows for an ON-time as low as 40 ns, thus supporting high-frequency conversion over the entire input range of 3V to 20V and down to an output voltage of only 0.6V. The LM26400Y utilizes peak current-mode control and internal compensation to provide high-performance regulation over a wide range of line and load conditions. Switching frequency is internally set to 500kHz, optimal for a broad range of applications in terms of size versus thermal tradeoffs. Given a non-synchronous architecture, efficiencies above 90% are easy to achieve. External shutdown is included, enabling separate turn-on and turn-off of the two channels. Additional features include programmable soft-start circuitry to reduce inrush current, pulse-by-pulse current limit and frequency foldback, integrated bootstrap structure and thermal shutdown. Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Input voltage range of 3-20V Dual 2A output Output voltage down to 0.6V Internal compensation 500kHz PWM frequency Separate enable pins Separate soft start pins Frequency foldback protection 175mΩ NMOS switch Integrated bootstrap diodes Over-current protection ETSSOP and LLP packages Thermal shutdown Applications ■ ■ ■ ■ ■ ■ ■ DTV-LCD Set-Top Box XDSL Automotive Computing Peripherals Industrial Controls Point of Load Typical Application 20200252 © 2007 National Semiconductor Corporation 202002 www.national.com LM26400Y Connection Diagrams 16-Lead ETSSOP (top view) 16-Lead LLP (top view) 20200202 20200203 NS Package Drawing MXA16A NS Package Drawing SDA16A Ordering Information Order Number LM26400YMH LM26400YMHX LM26400YSD LM26400YSDX Package Type ETSSOP-16 ETSSOP-16 LLP-16 LLP-16 NSC Package Supplied As Drawing MXA16A MXA16A SDA16A SDA16A Rail of 92 Units 2500 Units on Tape and Reel 1000 Units on Tape and Reel 4500 Units on Tape and Reel www.national.com 2 LM26400Y Pin Descriptions Pin 1 2 3 4 5 6 7 8 9 10 11, 12, 13,14 15 16 DAP Name FB1 SS1 EN1 AVIN GND EN2 SS2 FB2 BST2 SW2 PVIN SW1 BST1 Die Attach Pad Description Feedback pin of Channel 1. Connect FB1 to an external voltage divider to set the output voltage of Channel 1. Soft start pin of Channel 1. Connect a capacitor between this pin and ground to program the start up speed. Enable control input for Channel 1. Logic high enables operation. Do not allow this pin to float or be greater than VIN + 0.3V. Input supply for generating the internal bias used by the entire IC and for generating the internal bootstrap bias. Needs to be locally bypassed. Signal and Power ground pin. Kelvin connect the lower resistor of the feedback voltage divider to this pin for good load regulation. Enable control input for Channel 2. Logic high enables operation. Do not allow this pin to float or be greater than VIN + 0.3V. Soft start pin of Channel 2. Connect a capacitor between this pin and ground to program the start up speed. Feedback pin of Channel 2. Connect FB2 to an external voltage divider to set the output voltage of Channel 2. Supply rail for the gate drive of Channel 2's NMOS switch. A bootstrap capacitor should be placed between the BST2 and SW2 pins. Switch node of Channel 2. Connects to the inductor, catch diode, and bootstrap capacitor. Input voltage of the power supply. Directly connected to the drain of the internal NMOS switch. Tie these pins together and connect to a local bypass capacitor. Switch node of Channel 1. Connects to the inductor, catch diode, and bootstrap capacitor. Supply rail for the gate drive of Channel 1's NMOS switch. A bootstrap capacitor should be placed between the BST1 and SW1 pins. Must be connected to system ground for low thermal impedance and low grounding inductance. 3 www.national.com LM26400Y Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. AVIN, PVIN SWx Voltage BSTx Voltage BSTx to SW Voltage FBx Voltage ENx Voltage (Note 2) −0.5V to 22V −0.5V to 22V −0.5V to 26V −0.5V to 6V −0.5V to 3V −0.5V to 22V SSx Voltage Junction Temperature ESD Susceptibility Human Body Model (Note 3) Storage Temperature Range −0.5V to 3V +150°C 2kV -65°C to 150°C (Note 1) 3V to 20V −40°C to +125°C Operating Ratings VIN Junction Temperature Electrical Characteristics Unless otherwise stated, the following conditions apply: AVIN = PVIN = VIN = 5V. Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C to 125°C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Symbol VFB Parameter Conditions Min 0.591 0.585 0.6 Typ Max 0.611 0.617 V Units 0°C to 85°C. Feedback Loop Closed. Voltages at FB1 and FB2 Pins -40°C to 125°C. Feedback Loop Closed. Line Regulation of FB1 and FB2 Voltages, Expressed as PPM VIN = 3V to 20V Change Per Volt of VIN Variation Current in FB1 and FB2 Pins Under Voltage Lockout Threshold Hysteresis of UVLO Threshold Switching Frequency Maximum Duty Cycle Minimum Duty Cycle ON Resistance of Internal Power MOSFET Peak Current Limit of Internal MOSFET Shutdown Current of AVIN Pin EN1 = EN2 = 0V Quiescent Current of AVIN Pin (both channels are enabled but EN1 = EN2 = 5V, FB1 = FB2 = 0.7V not switching) Input Logic High of EN1 and EN2 Pins Input Logic Low of EN1 and EN2 Pins EN1 and EN2 Currents (sink or source) Switch Leakage Current Measured at SW1 and SW2 Pins EN1 = EN2 = SWx = 0 5 2.5 0.4 ETSSOP, 2A Drain Current LLP, 2A Drain Current 2.5 VFB = 0.6V VIN Rises From 0V VIN Falls From 3.3V 2.0 0.2 0.39 90 ΔVFB_LINE IFB VUVLO VUVLO_HYS fSW DMAX DMIN RDS_ON ICL ISD IQ VEN_IH VEN_IL IEN ISW_LEAK ΔΦ ISS 66 ppm/V 0.4 2.7 2.3 0.36 0.52 96 2 175 194 3 2 250 2.9 0.55 0.65 nA V V MHz % % 320 350 4.5 mΩ A nA 4 mA V V nA 1 µA Phase Shift Between SW1 and Feedback Loop Closed. Continuous SW2 Rising Edges Conduction Mode. SSx Pin Current 170 11 180 16 190 21 deg µA www.national.com 4 LM26400Y Symbol ΔISS VFB_F Parameter Difference Between SS1 and SS2 Currents FB1 and FB2 Frequency Foldback Threshold Conditions Min Typ Max 3 Units µA V 0.35 Thermal Characteristics Symbol θJA θJC TSD TSD_HYS Description Conditions Typical Value TSSOP 28 3 Junction temperature rises. Junction temperature falls from above TSD. 165 °C 15 LLP 26 °C/W 2.8 Unit Junction-to-Ambient Thermal Mount package on a standard board (Note 5) and Resistance (Note 4) test per JESD51-7 standard. Junction-to-Case-Bottom Thermal Resistance Thermal Shutdown Threshold Thermal Shutdown Hysteresis Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed performance limits and associated test conditions, see Electrical Characteristics table. Note 2: EN1 and EN2 pins should never be higher than VIN + 0.3V. Note 3: The human body model is a 100pF capacitor discharged through a 1.5 kΩ resistor into each pin. Test method is per JESD-22-A114. Note 4: Value is highly board-dependent. For comparison of package thermal performance only. Not recommended for prediction of junction temperature in real applications. See THERMAL CONSIDERATIONS for more information. Note 5: A standard board refers to a four-layer PCB with the size 4.5”x3”x0.063”. Top and bottom copper is 2 oz. Internal plane copper is 1 oz. For details refer to JESD51-7 standard. 5 www.national.com LM26400Y Typical Performance Characteristics Efficiency, VOUT = 5V Unless otherwise specified or thermal-shutdown related, TA = 25° C for efficiency curves, loop gain plots and waveforms, and TJ = 25°C for all others. Efficiency, VOUT = 3.3V 20200237 20200216 Efficiency, VOUT = 2.5V Efficiency, VOUT = 1.2V 20200217 20200218 AVIN Shutdown Current vs. Temperature VIN Shutdown Current vs. VIN 20200206 20200238 www.national.com 6 LM26400Y Switching Frequency vs. Temperature Feedback Voltage vs. Temperature 20200207 20200208 Feedback Voltage vs. VIN Frequency Foldback 20200209 20200210 SS-Pin Current vs. Temperature FET RDS_ON vs. Temperature 20200278 20200221 7 www.national.com LM26400Y Switch Current Limit vs. Temperature Loop Gain, CCM 20200234 20200219 Loop Gain, DCM Loop Gain, CCM 20200220 20200236 Loop Gain, DCM Load Step Response 20200222 20200223 www.national.com 8 LM26400Y Load Step Response Line Transient Response 20200224 20200227 Start-Up (No Load) Start-Up (No Load) 20200228 20200239 Shutdown Thermal Shutdown 20200229 20200230 9 www.national.com LM26400Y Recovery from Thermal Shutdown Short-circuit Triggering 20200240 20200231 Short-circuit Release 20200232 www.national.com 10 LM26400Y Block Diagram 20200204 11 www.national.com LM26400Y Application Hints GENERAL The LM26400Y is a dual PWM peak-current mode buck regulator with two integrated power MOSFET switches. The part is designed to be easy to use. The two regulators are mostly identical and share the same input voltage and the same reference voltage (0.6V). The two PWM clocks are of the same frequenc