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Part Number |
LM20242 |
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Manufacturer |
National Semiconductor |
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Semiconductor DataSheet |
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DataSheet View |
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LM20242 36V, 2A PowerWise® Adjustable Frequency Synchronous Buck Regulator
November 1, 2007
LM20242 36V, 2A PowerWise® Adjustable Frequency Synchronous Buck Regulator
General Description
The LM20242 is a full featured 1MHz capable synchronous buck regulator capable of delivering up to 2A of load current. The current mode control loop is externally compensated with only two external components, offering both high performance and ease of use. The device is optimized to work over the input voltage range of 4.5V to 36V making it well suited for high voltage systems. The device features internal Over Voltage Protection (OVP) and Over Current Protection (OCP) circuits for increased system reliability. A precision Enable pin and integrated UVLO allows the turn on of the device to be tightly controlled and sequenced. Startup inrush currents are limited by both an internally fixed and externally adjustable soft-start circuit. Fault detection and supply sequencing are possible with the integrated PGOOD circuit. The LM20242 is designed to work well in multi-rail power supply architectures. The output voltage of the device can be configured to track a higher voltage rail using the SS/TRK pin. If the output of the LM20242 is pre-biased at startup it will not sink current to pull the output low until the internal soft-start ramp exceeds the voltage at the feedback pin. The LM20242 is offered in an exposed pad 20 pin TSSOP package that can be soldered to the PCB, eliminating the need for bulky heatsinks.
Features
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
2A Output Current, 3.7A peak current 130 mΩ/110 mΩ integrated power MOSFETs 1.5% output voltage accuracy Current Mode Control, selectable compensation Resistor programmed, 1MHz capable oscillator Synchronous rectifier with diode emulation Adjustable output voltage down to 0.8V Compatible with pre-biased loads Programmable soft-start with external capacitor Precision enable pin with hysteresis OVP, UVLO inputs and PGOOD output Internally protected with peak current limit, thermal shutdown and restart ■ Accurate current limit with frequency foldback ■ Non-linear current mode slope compensation ■ eTSSOP-20 exposed pad package
Applications
■ Simple to design, high efficiency point of load regulation
from a 4.5V to 36V bus Microprocessors
■ High Performance DSPs, FPGAs, ASICs and ■ Communications Infrastructure, Automotive
Simplified Application Circuit
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PowerWise® is a registered trademark of National Semiconductor Corporation.
© 2007 National Semiconductor Corporation
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Connection Diagram
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Top View eTSSOP-20 Package
Ordering Information
Order Number LM20242MH LM20242MHE LM20242MHX Package Type eTSSOP-20 NSC Package Drawing MXA20A Package Marking 20242MH Supplied As 73 Units per Rail 250 Units per Tape and Reel 2500 Units per Tape and Reel
Pin Descriptions
Pin(s) 1 Name SS/TRK Description Soft-Start or Tracking control input Application Information An internal 5 µA current source charges an external capacitor to set the soft-start rate. The PWM can Track to an external voltage ramp with a low impedance source. If left open, an internal 1 ms SS ramp is activated. This pin is connected to the inverting input of the internal transconductance error amplifier. An 800 mV reference is internally connected to the non-inverting input of the error amplifier. Open drain output indicating the output voltage is regulating within tolerance. A pull-up resistor of 10 kΩ to 100 kΩ is recommended if this function is used.
2
FB
Feedback input to the error amplifier from the regulated output Power good output signal
3
PGOOD
4 5,6,15,16 7,8,13,14
COMP VIN SW
Output of the internal error amplifier and The loop compensation network should be connected between the input to the Pulse Width Modulator COMP pin and the AGND pin. Input supply voltage Switch pin Nominal operating range: 4.5V to 36V. The drain terminal of the internal Synchronous Rectifier power NMOSFET and the source terminal of the internal Control power NMOSFET. Internal reference for the power MOSFETs. Internal reference for the regulator control functions. An internal diode from VCC to BOOT charges an external capacitor required from SW to BOOT to power the Control MOSFET gate driver.
9,10,11 12 17 18
GND AGND BOOT VCC
Ground Analog ground Boost input for bootstrap capacitor
Output of the high voltage linear VCC tracks VIN up to about 7.2V. Above VIN = 7.2V, VCC is regulated regulator. The VCC voltage is regulated to approximately 5.5 Volts. A 0.1 µF to 1 µF ceramic decoupling to approximately 5.5V. capacitor is required. The VCC pin is an output only. Enable or UVLO input An external voltage divider can be used to set the line undervoltage lockout threshold. If the EN pin is left unconnected, a 2 µA pull-up current source pulls the EN pin high to enable the regulator.
19
EN
20 EP
RT
Internal oscillator frequency adjust input Normally biased at 550 mV. An external resistor connected between RT and AGND sets the internal oscillator frequency. Exposed metal pad on the underside of the package with a weak electrical connection to GND. Connect this pad to the PC board ground plane in order to improve heat dissipation.
2
Exposed Exposed pad Pad
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LM20242
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN to GND BOOT to GND BOOT to SW SW to GND SW to GND (Transient) FB, EN, SS/TRK, PGOOD to GND -0.3V to +38V -0.3V to +43V -0.3V to +7V -0.5V to +38V -1.5V (< 20 ns) -0.3V to +6V
VCC to GND Storage Temperature ESD Rating Human Body Model (Note 2)
-0.3V to +8V -65°C to 150°C 2kV
Operating Ratings
VIN to GND Junction Temperature +4.5V to +36V −40°C to + 125°C
Unless otherwise stated, the following conditions apply: VVIN = 12V. Limits in standard type are for TJ = 25°C only, limits in bold face type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Symbol VFB RHSW-DS(ON) RLSW-DS(ON) IQ ISD VUVLO VUVLO(HYS) VVCC ISS IBOOT VF-BOOT Powergood VFB(OVP) VFB(OVP-HYS) VFB(PG) VFB(PG-HYS) TPGOOD IPGOOD(SNK) IPGOOD(SRC) Oscillator FSW1 FSW2 TOFF-TIME VRT Error Amplifier IFB ICOMP(SRC) ICOMP(SNK) gm AVOL GBW Feedback pin bias current COMP Output Source Current COMP Output Sink Current Error Amplifier DC Transconductance Error Amplifier Voltage Gain Error Amplifier Gain-Bandwidth Product VFB = 1V VFB = 0V VCOMP = 0V VFB = 1V VCOMP = 0.5V ICOMP = -50 µA to +50 µA COMP pin open COMP pin open 200 200 400 50 400 350 515 2000 7 600 nA µA µA µmho V/V MHz Switching Frequency 1 Switching Frequency 2 Minimum Off Time RT pin voltage RRT = 250 kΩ RRT = 49.9 kΩ RRT = 249 kΩ 675 225 750 250 50 550 825 325 kHz kHz ns mV Over Voltage Protection Rising Threshold Over Voltage Protection Hysteresis PGOOD Rising Threshold PGOOD Hysteresis PGOOD delay PGOOD Low Sink Current PGOOD High Leakage Current VPGOOD = 0.5V VPGOOD = 5V 0.6 VFB(OVP) / VFB ΔVFB(OVP) / VFB VFB(PG) / VFB ΔVFB(PG) / VFB 93 107 110 2 95 2 20 1 5 200 112 3 97 3 % % % % µs mA nA Parameter Feedback pin voltage High-Side MOSFET On-Resistance Low-Side MOSFET On-Resistance Operating Quiescent Current Shutdown Quiescent current VIN Under Voltage Lockout VIN Under Voltage Lockout Hysteresis VCC Voltage Soft-Start Pin Source Current BOOT Diode Leakage BOOT Diode Forward Voltage IVCC = -5 mA, VEN = 5V VSS = 0V VBOOT = 4V IBOOT = -100 mA 3 Conditions VVIN = 4.5V to 36V VCOMP = 500 mV to 700 mV ISW = 200 mA ISW = 200 mA VVIN = 4.5V to 36V VEN = 0V Rising VVIN 3.65 Min 0.788 Typ 0.8 130 110 2 150 3.9 200 5.5 5 10 0.9 1.1 7 Max 0.812 225 190 3 180 4.2 400 Units V mΩ mΩ mA µA V mV V µA nA V
Electrical Characteristics
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Symbol Current Limit ILIM TILIM Enable VEN(RISING) VEN(HYS) IEN TSD TSD(HYS) θJC θJA
Parameter Cycle By Cycle Current Limit Cycle By Cycle Current Limit Delay EN Pin Rising Threshold EN Pin Hysteresis EN Source Current Thermal Shutdown Thermal Shutdown Hysteresis Junction to Case Junction to Ambient
Conditions
Min 3.1
Typ 3.7 150
Max 4.65
Units A ns
1.2 VEN = 0V, VVIN = 12V
1.25 50 2 170 20 5.6
1.3
V mV µA °C °C °C/W °C/W
Thermal Shutdown
Thermal Resistance 0 LFM airflow 30
Note 1: Absolute Maximum Ratings indicate limits beyond witch damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor to each pin. Note 3: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Typical Performance Characteristics
Efficiency vs. Load Current fSW = 350 kHz
Unless otherwise specified: TJ = 25°C, VVIN = 12V Efficiency vs. Load Current fSW = 500 kHz
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Error Amplifier Gain
Error Amplifier Phase
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Line Regulation
VCC vs. VIN
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Non-Switching IQ vs. VIN
Shutdown IQ vs. VIN
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PGOOD VOL vs. IPGOOD
EN Threshold and Hysteresis vs. Temperature
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EN Current vs. Temperature
Oscillator Fr |