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LCD Module Specification
Model: LG240641-SFLYH6V
Table of Contents
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COVER & CONTENTS ······················· 1 BASIC SPECIFICATIONS ····················· 2 ABSOLUTE MAXIMUM RATINGS ················· 3 ELECTRICAL CHARACTERISTICS ··············· 4 COMMUNICATION WITH MPU ················· 7 COMMAND DEFINITIONS ···················· 11 INITIALIZATION ·························· 23 CHARACTER GENERATOR···················· 24 ELECTRO—OPTICAL CHARACTERISTICS ·········· 26 DIMENSIONAL OUTLINE ····················· 28 LCD MODULE NUMBERING SYSTEM ············· 29 PRECAUTIONS FOR USE OF LCD MODULE ········· 30
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1. BASIC SPECIFICATIONS
1.1 Features Display Format LCD Mode : 240 X 64 Dots : STN-Yellow green-Positive-Transflective 1/64 Duty, 1/9 Bias 6:00 LED, yellow green color 180.0(W) X 65.0(H) X 16.5(T) mm 132.0(W) X 39.0(H) mm 0.49 X 0.49 mm 0.53 X 0.53 mm 150 g T6963C 32K Bytes 128 words character generator ROM 256 words (max.) character generator RAM 6x8 or 8x8 font selectable Text, graphic and combination of text/graphic display
Driving Method : Viewing Direction : Backlight : Outline Dimension : Viewing Area : Dot Size : Dot Pitch : Weight : Controller : Display RAM : Others :
1.2 Block Diagram
/WR /RD /CE C/D DB0 I DB7 /RST FS FG VSS VDD VO VOUT
LCD Controller LSI T6963C
Common Driver x1
64
LCD PANEL 240 x 64 dots
240 32K RAM Segment Driver x3
Power Circuit
To LSI
LEDA LEDK
LED Backlight
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1.3 Terminal Functions
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 Symbol FG VSS VDD VO /WR /RD /CE C/D NC /RST DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 FS VOUT LEDA NC LEDK Level -0V +5V -L L L H/L -L H/L H/L H/L H/L H/L H/L H/L H/L H/L -10V +5V -0V Function Frame ground (connected to Vss) Ground Power supply for logic Operating voltage for LCD (Contrast adjusting) Write signal, active “L” Read signal, active “L” Chip enable signal, active “L” Write mode H: Command write L: Data write Read mode H: Status read L: Data read No connection Reset signal, active “L” Data bit0 Data bit1 Data bit2 Data bit3 Data bit4 Data bit5 Data bit6 Data bit7 Font selection H: 6x8 dots L: 8x8 dots Output voltage for LCD driving Power supply for LED backlight No connection Power supply for LED backlight
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2. ABSOLUTE MAXIMUM RATINGS
Item Supply Voltage(Logic) Supply Voltage(LCD) Input Voltage Operating Temp. Storage Temp. Symbol VDD-VSS VDD-VO VI Topr Tstg Min. -0.3 -0.3 -0.3 -20 -30 Max. 7.0 28.0 VDD+0.3 70 80 Unit V V V ℃ ℃
3. ELECTRICAL CHARACTERISTICS
3.1 DC Characteristics Item Supply Voltage (Logic) Supply Voltage (LCD Drive) Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Supply Current (Logic) Symbol VDD VDD-VO VIH VIL VOH VOL IDD IOH=-0.75mA IOL=0.75mA VDD=5.0V Condition Min. 4.5 -VDD-2.2 0 VDD-0.3 0 -(VDD=5.0V±10%, Ta=25℃) Typ. 5.0 12.7 ----16.0 Max. 5.5 -VDD 0.8 VDD 0.3 20.0 Unit V V V V V V mA
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3.2 Interface Timing Chart Characteristic C/D Setup Time C/D Hold Time /CE, /RD, /WR Pulse Width Data Setup Time Data Hold Time Access Time Output Hold Time Symbol Min. 100 10 80 80 40 -10
(VDD=5.0V±10%, Ta=25℃) Max. -----150 50 Unit ns ns ns ns ns ns ns
tCDS tCDH tCE, tRD, tWR, tDS tDH tACC tOH
C/D t CDS t CDH
/CE
t CE, t RD, t WR /WR, /RD t DS DB0~DB7 ( Write ) t DH
DB0~DB7 ( Read ) t ACC t OH
Fig.1 Bus Read/Write Timing
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3.3 LED Backlight Characteristics (Ta=25℃)
Item Forward Voltage Forward Current Peak Wave Length
Symbol Vf If λp
Condition
Min. 3.9
Typ. 4.1 550 568
Max. 4.3 ---
Unit V mA nm
Vf=4.1V If=550mA
---
3.4 Power Supply
VDD +5V VSS VR 20 k Ω
LCM
VO VOUT LEDA
+5V LEDK
Note: 5V voltage for the LED backlight should be supplied to Pin21 (LEDA) and Pin23 (LEDK) terminal of the interface, it should not be supplied to the Anode/Cathode terminal of the LED backlight directly.
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4. COMMUNICATION WITH MPU
4.1 RAM Map The Display RAM is built in the module, and display data (text, graphic and CG data) is written to this display RAM. The built-in controller T6963C automatically reads the display RAM and sends the appropriate data to LCD drivers. The “Control Word Set” command (text home set, text area set, etc.) defines the RAM area which is read by the controller T6963C making the RAM map programmable by the user. If more than 1 screen can be stored in the RAM. Vertical scrolling and paging is easily performed by resetting text home and/or graphic home address. The 32K bytes built-in RAM is located at address 0000H ~ 7FFFH, and the following is an example of RAM mapping.
0000H Graphic RAM Area (0000H ~ 3BFFH) 3C00H Attribute RAM Area (3C00H ~ 3FFFH) 4000H Text RAM Area (4000H ~ 7BFFH) 7C00H CG RAM Area (7C00H ~ 7FFFH) 7FFFH CG RAM Offset register For 128 words, set data=”0FH” TH=1000H * 6 x 8 Font=48 screen * 8 x 8 Font=64 screen Text for 1024 characters GH=0000H * 6 x 8 Font=6 screen * 8 x 8 Font=8 screen
4.2 Status Read Status of the T6963C should be checked between all command and data in order to complete a communication cycle with the MPU. The status can be read from 8 bits data lines (D0 to D7) by setting C/D=“H”, /RD=“L”, /WR=“H” and /CE=“L”. The T6963C status word format is as follows: MSB STA7 D7 STA6 D6 STA5 D5 STA4 D4 STA3 D3 STA2 D2 STA1 D1 LSB STA0 D0
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STA0 STA1 STA2 STA3 STA4 STA5 STA6 STA7
Check command execution capability Check data read/write capability Check Auto mode data read capability Check Auto mode data write capability Not used Check controller operation capability Error flag. Used for Screen Peek and Screen Copy commands. Check the blink condition
0 : Disable 1 : Enable 0 : Disable 1 : Enable 0 : Disable 1 : Enable 0 : Disable 1 : Enable
0 : Disable 1 : Enable 0 : No error 1 : Error 0 : Display off 1 : Normal display
(Note 1) It is necessary to check STA0 and STA1 at the same time. (Note 2) For most modes STA0/STA1 are used as a status check. (Note 3) STA2 and STA3 are used in Auto mode. Status checking flow
a) Status check 1
b) Status check 2
STATUS
AUTO MODE STATUS (*1) STA2=1(Read) or STA3=(Write) NO YES RETURN
STA0=1 STA1=1 YES RETURN
(*1) NO
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4.3 Setting data When using a command with operand data, first send the data, then send the command. Procedure for sending a command
1) Commnad with 1 byte data
2) Commnad with 2 bytes data
Send Command
Send Command
Status check1
STA0,1
Status check1
STA0,1
Data write
Data write
Status check1
Status check1
Command write
Data write
END
Status check1
Command write 3) Commnad with no data END Send Command
Status check1
STA0,1
Command write
END
(Note) When sending more than two data, the last datum (or last two data) is valid.
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4.4 Connection with 8051 Family MPU
8051 P0.0~P0.7 8 74LS373 8 A0
LG240641 DB0~DB7 C/D
P2.5~P2.7
3 74LS138
Y0
/CE
/RD /WR RST
/RD /WR /RST
a. Application Circuit 1
8051 P1.0~P1.7 P3.0 P3.1 P3.2 P3.3 RST 8
LG240641 DB0~DB7 C/D /WR /RD /CE /RST
b. Application Circuit 2
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5. COMMAND DEFINITIONS
COMMAND REGISTERS SETTING SET CONTROL WORD CODE 00100001 00100010 00100100 01000000 01000001 01000010 01000011 1000X000 1000X001 1000X011 1000X100 10000XXX 10001XXX 10010000 1001XX10 1001XX11 100101XX 100110XX 100111XX 10100000 10100001 10100010 10100011 10100100 10100101 10100110 10100111 10110000 10110001 10110010 11000000 11000001 11000010 11000011 11000100 11000101 11100000 11101000 11110XXX 11111XXX 1111X000 1111X001 1111X010 1111X011 1111X100 1111X101 1111X110 1111X111 D1 X address Data Low address Low address Columns Low address Columns -----------------------Data -Data -Data ---D2 Y address 00H High address High address 00H High address 00H -------------------------------FUNCTION Set Cursor Pointer Set Offset Register Set Address Pointer Set Text Home Address Set Text Area Set Graphic Home Address Set Graphic Area OR mode EXOR mode AND mode Text Attribute mode CG ROM mode CG RAM mode Display off Cursor on, blink off Cursor on, blink on Text on, graphic off Text off, graphic on Text on, graphic on 1-line cursor 2-line cursor 3-line cursor 4-line cursor 5-line cursor 6-line cursor 7-line cursor 8-line cursor Set Data Auto Write Set Data Auto Read Auto Reset Data Write and Increment ADP Data Read and Increment ADP Data Write and Decrement ADP Data Read and Decrement ADP Data Write and Nonvariable ADP Data Read and Nonvariable ADP Screen Peek Screen Copy Bit Reset Bit Set Bit 0 (LSB) Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 (MSB)
MODE SET
DISPLAY MODE
CURSOR PATTERN SELECT
DATA AUTO READ/ WRITE DATA READ/WRITE
SCREEN PEEK SCREEN COPY BIT SET/RESET
X : Don’t care
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5.1 Set Registers CODE 00100001 00100010 00100100 HEX. 21H 22H 24H FUNCTION SET CURSOR POINTER SET OFFSET REGISTER SET ADDRESS POINTER D1 X ADRS DATA LOW ADRS D2 Y ADRS 00H HIGH ADRS
5.1.1 Set Cursor Pointer The position of the cursor is specified by X ADRS AND Y ADRS. The cursor position can only be moved by this command. Data read/write from the MPU never changes the cursor pointer. X ADRS and Y ADRS are specified as follows. X ADRS: 00H to 4FH, Horizontal cursor position counted by “character”, 6 or 8 dots width. Y ADRS: 00H to 1FH, Vertical cursor position counted by “character”, 8 dots height. Note: Please note that the cursor position should be within actual display area. 5.1.2 Set Offset Register The Set Offset Register command is used to determine the character generator RAM area. The upper 5 bits in start address of CG area is set as the lower 5 bits of D1, and the uppe