1/5 Optical Size CCIR B/W Solid-State Image Sensor



Part  Number LC9948G
Manufacturer Sanyo
Semiconductor DataSheet

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Ordering number : EN*5218 CMOS LSI LC9948G 1/5" Optical Size CCIR B/W Solid-State Image Sensor Preliminary Overview The LC9948G is a 1/5" optical size frame transfer type CCD (charge-coupled device) solid-state image sensor developed for use in B/W video cameras. Package Dimensions unit: mm 3217 [LC9948G] Features • Effective number of pixels (total pixels): 499 H × 582 V (532 H × 600 V) • Number of optical black pixels: Horizontal direction: Front: 7 pixels Back: 26 pixels Vertical direction: Front: 14 pixels Back: 4 pixels • Dummy bits: Horizontal direction: 4 pixels • Horizontal resolution: 380 TV lines • Supports miniature, compact camera designs. • Package: 20-pin half-pitch transparent DIP • Horizontal shift register: 5 V operation • Supports variable-speed electronic shutter operation Device Structure • • • • • 1/5" type frame transfer CCD image sensor Unit cell size: 5.8 µm (H) × 3.75 µm (V) Chip size: 4.18 mm (H) × 5.10 mm (V) Parallel gate CCD sensor Built-in high-sensitivity output amplifier Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V Parameter Symbol VDD VGG Maximum supply voltage NSUB-PW NSUB - ø1 to ø4, øS1 to øS4: Horizontal clock pin Other clock pins Other pins Operating temperature Storage temperature Topr Tstg øR VPW = 0 V VPW = 0 V VPW = 0 V VPW = 0 V VPW = 0 V Conditions Ratings –0.3 to +18 –0.3 to +5 –0.3 to +50 –0.3 to +55 –0.3 to +18 –15 to +18 –0.3 to +10 –10 to +60 –30 to +80 Unit V V V V V V V °C °C SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 22896HA (OT) No.5218-1/10 LC9948G Block Diagram No.5218-2/10 LC9948G Pin Assignment Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 10 Symbol NSUB VPW ø4 ø3 ø2 ø1 øR VDD VOUT NSUB Reset gate Supply voltage CCD output N-substrate Image area clock N-substrate P-well Function Pin No. 20 19 18 17 16 15 14 13 12 11 Symbol NSUB øS4 øS1 øS2 øS3 øH1 øH2 VOG VGG NSUB Horizontal area clock CCD output gate Load gate N-substrate Storage area clock N-substrate Function No.5218-3/10 LC9948G Specifications Clock Voltage Conditions at frame frequency = 3.55 MHz Parameter Image area clock ø1, ø2, ø3, ø4 Storage area clock øS1, øS2 Storage area clock øS3, øS4 Horizontal register øH1, øH2 Reset gate clock øR N-Substrate clock Pulse amplitude Low level Pulse amplitude Low level Pulse amplitude Low level Pulse amplitude Low level Pulse amplitude Low level High level Low level Symbol VPIF VLIF VPSL VLSL VPSL VLSL VPH VLH VPR VLR VHSUB*2 VLSUB See Figure 1 *1 Conditions min 14.0 –10.0 14.0 –7.0 14.0 –8.0 4.5 0 4.5 3.6 30.0 17.5 18.0 typ 14.5 –9.5 14.5 –6.5 14.5 –7.5 5.0 0 5.0 4.0 max 15.0 –9.0 15.0 –6.0 15.0 –7.0 5.5 0.5 5.5 4.4 40.0 18.5 Unit V V V V V V V V V V V V Note: 1. Insert 47 pF capacitors as shown in Figure 2. 2. Adjust VHSUB within the range where image degradation does not occur so that the saturated output level is maximized. Figure 1 Figure 2 No.5218-4/10 LC9948G Bias Conditions Parameter P-well Output circuit voltage OG bias Symbol VPW VDD VGG VOG *1 *2 *2 14.5 0.5 4.5 Conditions min typ 0 15.0 0.8 5.0 15.5 1.1 5.5 max Unit V V V V Note: 1. Design applications so that this level never exceeds the substrate pulse low level VLSUB. 2. These are high-impedance inputs. DC Characteristics Parameter DC operating current Symbol IDD Conditions min 2.5 typ 4.5 max 6.5 Unit mA Drive Pulse Waveform Standards Note: VP: pulse amplitude VL: low level Figure 3 Pulse Waveform tWH typ 167 143 167 143 143 143 143 143 1.4 1.4 62.5 62.5 10 50 50 9.9 4.2 tWL typ 102 117 102 117 117 117 117 117 62.5 62.5 1.4 1.4 88 50 50 19.99* 19.99* tr typ 6.5 11 6.5 11 11 11 11 11 30 30 30 30 4 3 3 0.07 0.07 tf typ 6.5 11 6.5 11 11 11 11 11 30 30 30 30 4 3 3 1 1 Reset pulse During horizontal transfers Slice pulse* value is in ms units. Shutter pulse* value is in ms units. ns The values enclosed in dark lines are in µs units and apply during 1H line transfers. ns During frame drive When the frame shift frequency is 3.55 MHz ns During frame drive When the frame shift frequency is 3.55 MHz ns Symbol ø1 ø2 ø3 ø4 øS1 øS2 øS3 øS4 øS1 øS2 øS3 øS4 øR øH1 øH2 øNSUB øNSUB Conditions Unit µs µs No.5218-5/10 LC9948G Imaging Characteristics Parameter Sensitivity Video signal imbalance Saturated signal Smear Dark signal Gamma characteristics Symbol S VF Vsat SM Vdrk γ Test method 1 2 3 4 5 *1 Ta = 55°C 1 500 0.04 7 Conditions min 110 15 typ max Unit mV % mV % mV — Note: 1. When the frame shift frequency is 3.55 MHz and the storage time is 1/50 second. Test Procedures The Sanyo evaluation board must be used for the following tests. 1. Sensitivity Use a CCV31F pattern box (manufactured by Dai Nippon Printing Co., Ltd.) set up at a brightness of 1320 NT and color temperature of 3100°K with no pattern. Image the pattern box with an HF16A lens (manufactured by Fujinon) with a 1 mm thick C-500 IR cut filter in front of that lens. Set the lens f-stop to f11 and set the lens to be 50 cm from the pattern box. Measure the CCD output signal from the center of the image with this setup. 2. Video Signal Imbalance Measure under the following conditions. • Standard drive conditions (See the specifications document.) • Use a 3200°K color temperature halogen lamp as the light source. • Use a 1 mm thick C-500 IR cut filter. Set the CCD surface illumination to 7 lux, and divide the image into 45 areas as shown in Figure 4. Measure the average value for each block, and determine the maximum, minimum, and mean of those values. Determine the ratio of the range of the block average values to the mean of the block average values. VF = maximum block average value – minimum block average value mean block average value Figure 4 No.5218-6/10 LC9948G 3. Saturated Signal Saturate the output signal by removing the lens in the test setup for item 1. Measure the CCD output signal from the center of the image in this state. 4. Smear • Place a 1/10 V chart in front of the halogen light source as shown in the figure and image that chart. • Adjust the amount of light entering the CCD with ND filters so that the CCD output signal at point A becomes 250 mV. • Remove the ND filter(s) and measure the output value of the CCD output signal from the first line (point B). SM = (VB · TND) × 100 [%] 250 VB: The amount of smear at point B [mV] TND: The ND filter transmissivity Figure 5 5. Dark Signal Completely block all light from falling on the CCD element surface and measure the CCD output signal at the center of the image. Here, do not measure the difference between this signal and the optical black section level, but rather measure the difference between this signal and the no signal level that has no pixel information. (See Figure 6.) Figure 6 Structure of a Single Horizontal Period No.5218-7/10 LC9948G CCD B/W Camera Block Diagram Figure 7 CCD B/W Camera Block Diagram CCD B/W Camera Blocks OSC Generates the reference frequency for synchronization signal and timing pulse generation: 28.375 MHz Generates the pulses required for video signal processing (SYNC, blanking, and other signals) and the pulses required for CCD drive. Includes a built-in CCD horizontal driver circuit. Provides an electronic iris function Amplifies the above pulses to their stipulated amplitudes to drive the CCD element. Drive pulse level shifting Video signal processing, including sample and hold, clamp, AGC, gamma correction, white clipping, and pedestal addition. Timing pulse generation IC Driver IC Level shifting circuit Signal-processing IC No.5218-8/10 LC9948G Notes on Mounting and Handling 1. Preventing Electrostatic Discharge (ESD) Since CCD sensors are easily destroyed by ESD, the antistatic measures described below should be employed when handling this device. • All tools and personnel must be grounded when handling CCDs. Note that a 1 MΩ resistor should be inserted in series between personnel and ground for safety. (We recommend using wrist straps for personnel grounding.) • Personnel should handle CCD devices with either bare hands or antistatic gloves. Use antistatic materials for work garments. Personnel should wear conductive shoes. • Lay conductive mats on the floor and benches in the workplace so that static charges do not accumulate. • We recommend using ionized air blowers (or other static removal techniques) when mounting CCD sensors. • Use antistatic boxes when transporting boards that have CCD sensors mounted on them. • Do not leave packing materials or fittings made from plastic materials (such as Styrofoam) that easily collect static charges on or near workplace tables. • Ground all tools, test equipment, conveyors, soldering irons, and other objects used in the workplace. Inspect grounding regularly to assure that it is complete. • Do not handle this IC in the vicinity of TV monitors or other equipment that generates high static voltages. If unavoidable, install antistatic filters in front of monitor screens and take all other possible antistatic measures. • Static charges accumulate easily in workplaces with a low relative humidity. Manufacturing operations should be carried out in an environment with a relative humidity of at least 50%. 2. Soldering • This IC’s package temperature must not exceed 80°C. • Since CCD sensors are sensitive to thermal stress as well as ESD, the soldering iron temperature should be under 300°C. Aim for a soldering time of 2 seconds per pin. • Use soldering irons that include an adjustable temperature control function that holds the soldering iron tip at a constant temperature. • Be especially careful to assure that the device package temperature does not exceed 80°C when repairing or redoing solder joints or removing a CCD sensor from a printed circuit board. 3. Soiling and Contamination Preventio



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