Write CD-R/RW Encoder/Decoder IC

www.DataSheet4U.com Ordering number : ENN*6495 CMOS IC LC898093 40× Playback/12× Write CD-R/RW Encoder/Decoder IC with Built-in ATAPI Interface Preliminary Functions • • • • • • • • CD-ROM decoder/encoder functions CD decoder/encoder functions Pit and wobble CLV servo CAV audio functions ATAPI interface (include the register block) Subcode encoder/decoder functions ATIP demodulator/ATIP decoder Write strategy function (CD-R/RW) • From 1 to 64 Mbits of buffer RAM can be used. (16-bit data bus EDO DRAM) • The user can freely set up the CD main channel, C2 flag, and subcode areas in buffer RAM. • Batch transfer function (Function for transferring the CD main channel, C2 flag, subcode, and other data in a single operation) • Multi-transfer function (Function for automatically transferring multiple block to the host in a single operation) • CAV audio functions • Supports Ultra DMA modes 0, 1, and 2. Features • ECC and EDC correction/addition (decoding/encoding) for CD-ROM data. • ECC error correction/addition (decoding/encoding) for subcode data • Servo control implemented in a digital servo system (decoding/encoding) • CLV servo control using ATIP data (encoding) • ATIP decoding function and CRC check function (decoding/encoding) • CIRC code generation and addition and EFM modulation (encoding) • CAV audio functions • Provides high-precision CD-R/RW write strategy signal output • Built-in ATAPI interface (with Ultra DMA 33 support) • Supports 40× decoding and 12× encoding. Clock frequency: 33.8688 MHz • Transfer rates: Up to 16.6 MB/s (when 32× IORDY used), up to 33 MB/s when Ultra DMA used. These values apply when 16-bit 45 ns EDO DRAM is used. “BURN-Proof” stands for Proof against Buffer Under RuN error, not for proof against burning. “BURN-Proof” is a trademark of SANYO Electric Co., Ltd. Package Dimensions unit: mm 3210-SQFP208 [LC898093] 0.5 30.6 28.0 156 157 105 104 208 1 (1.25) (3.2) (0.5) 0.2 53 52 0.15 3.8max 0.35 Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 83100RM (OT) No. 6495-1/14 28.0 SANYO: SQFP208 30.6 www.DataSheet4U.com LC898093 Specifications Absolute Maximum Ratings at VSS = 0 V Parameter Supply voltage Symbol VDD5 max VDD3 max VI5, VO5 VI3, VO3 Pd max Topr Tstg 10 seconds Ta ≤ 25°C Ta ≤ 25°C Ta ≤ 25°C Ta ≤ 25°C Ta ≤ 70°C Conditions Ratings –0.3 to +6.0 –0.3 to +4.6 –0.3 to VDD5 + 0.3 –0.3 to VDD3 + 0.3 750 –30 to +70 –55 to +125 260 Unit V V V V mW °C °C °C I/O voltages Allowable power dissipation Operating temperature Storage temperature Soldering conditions (pins only) Allowable Operating Ranges at Ta = –30 to +70°C, VSS = 0 V Parameter [I/O cells, 5.0 V power supply] Supply voltage Input voltage range [Internal cells, 3.3 V power supply] Supply voltage Input voltage range VDD3 VIN 3.0 0 3.3 3.6 VDD3 V V VDD5 VIN 4.5 0 5.0 5.5 VDD5 V V Symbol Conditions Ratings min typ max Unit Electrical Characteristics at Ta = –30 to +70°C, VSS = 0 V, VDD = 4.5 to 5.5 V Parameter High-level input voltage Low-level input voltage High-level input voltage Low-level input voltage High-level input voltage Low-level input voltage High-level input voltage Low-level input voltage High-level input voltage Low-level input voltage Analog input voltage High-level output voltage Low-level output voltage High-level output voltage Low-level output voltage Low-level output voltage High-level output voltage Low-level output voltage Input leakage current Output leakage current Pull-up resistance Pull-up resistance Pull-up resistance Pull-up resistance Symbol VIH VIL VIH VIL VIH VIL VIH VIL VIH VIL VANI VOH VOL VOH VOL VOL VOH VOL IIL IOZ RUP RUP RUP RUP Conditions Ratings min 2.2 0.8 2.2 0.8 2.4 0.8 2.4 0.8 0.7 VDD 0.3 VDD 1/4 VDD VDD – 2.1 0.4 VDD – 2.1 0.4 0.4 VDD – 2.1 0.4 –10 –10 50 40 7 7 100 80 10 10 +10 +10 200 160 13 13 3/4 VDD typ max Unit V V V V V V V V V V V V V V V V V V µA µA kΩ kΩ kΩ kΩ TTL level inputs: (1) TTL level inputs with built-in pull-up resistors: (4) TTL level Schmitt trigger inputs: (0), (7) TTL level Schmitt trigger inputs Built-in pull-up resistors: (9), (14) CMOS level inputs with built-in pull-up resistors: (10) (11) IOH = –8 mA: (3), (8) IOL = 8 mA: (3), (8) IOH = –2 mA: (2), (4), (6) IOL = 2 mA: (2), (4), (6) IOL = 2 mA: (5) IOH = –8 mA: (7), (12), (14), (15) IOL = 24 mA: (7), (12), (14), (15) VI = VSS, VDD: (0), (1), (7), (9) In the high-impedance output state: (2), (7), (8), (12), (13) (14), (15) (10) (4), (5) (9), (13), (14) (15) The applicable pin groups are listed on the following page. No. 6495-2/14 www.DataSheet4U.com LC898093 Applicable Pins [INPUT] (0) · · · · · · CS, RD, WR, WRITE, SUA0 to SUA7, RESET, WOBBLE, CS1FX, CS3FX, DIOR, DIOW, HRST (9) · · · · · · DMACK (1) · · · · · · TEST0 to TEST4 (10) · · · · · FG (11) · · · · · AD0, AD1, RREC, FE, TE, VREF, AD2, TES [OUTPUT] (2) · · · · · · PDS1 to PDS3, DSLB (3) · · · · · · RA0 to RA9, CAS0 and CAS1, RAS0 to RAS2, LWE, UWE, OE, SSP2/1, RAPC, WAPC, H11T0, LDH, ATEST3/1, WDAT, NWDAT, EFMG, SHOCK, LOCK, EFMO, ATIPSYNC, ACRCNG, PCK2 (6) · · · · · · LDON (12) · · · · · INTRQ, IOCS16 (13) · · · · · IORDY (15) · · · · · DMARQ [INOUT] (4) · · · · · · D0 to D7, IO0 to IO15 (5) · · · · · · INT0 and INT1, SWAIT (7) · · · · · · DD0 to DD15 (8) · · · · · · BIDATA, BICLK (14) · · · · · DASP, PDIAG Note: The XTAL0 pin is not specified in the DC characteristics. The pull-up and pull-down resistors on pins (9), (13), (14), and (15) are disabled after a reset. No. 6495-3/14 www.DataSheet4U.com LC898093 External Circuit for the PLL Circuit 1. Internal Reference Clock Oscillator Block PD R2 R3 VCNT C2 R1 R C1 Symbol R1 R2 R3 C1 C2 Value (typ) 5.6 k 10 k 200 0.1 µ 0.1 µ Unit Ω Ω Ω F F A13192 2. Write Strategy Block C5 MDC1 Symbol R4 Value (typ) 5.6 k 15 k 220 0.1 µ 0.1 µ 0.1 µ Unit Ω Ω Ω F F F R5 PD1 R5 R6 C3 C4 R6 VCNT1 C3 C5 C4 R4 R1 A13193 The analog VDD and VSS pins (pins 52, 53, 90, and 91) must be completely isolated from the logic system power supply and must not be influenced by fluctuations in the logic system power supply. No. 6495-4/14 www.DataSheet4U.com LC898093 Block Diagram Data bus[0:7] Write Strategy & Link-position ATIP/CLV servo ATIPSYNC Sub-code I/F de-interleve/interleve Digital Servo & CIRC EnDec Address generator Sub-code ECC Address generator LC898093 RAM Data bus[0:15] Address bus[0:21] *12 *11 *10 *1 CAV-Audio DAC *13 CD-DSP I/F & SYNC Detector De-scramble & Buffering Address generator ECC & EDC Address generator HOST *3 *4 *5 INT0, INT1 *6 Micro controller *7 ZSWAIT XTALCK0 XTAL0 PLL & Clock generator Each Block Each Block Register R0-R255 decoder Address generator Each Block Bus control signal External Bus Arbiter & DRAM controller *8 *9 Buffer IDE I/F Block based HISIDE DRAM Data output input I/F Microcontroller RAM access Address generator *1 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 *13 **1 DSLB (pin96) to SUBSYNC (pin145), SHOCK (pin147) to PCK2 (pin155) DD0 to DD15, DASP, PDIAG CS1FX, CS3FX, DA0 to DA2, DIOR, DIOW, DMACK DMARQ, HINTRQ, IOCS16, IORDY RD, WR, SUA0 to SUA7, CS D0 to D7 IO0 to IO15 RA0 to RA9, RAS0, RAS1, RAS2, CAS0, CAS1, OE, UWE, LWE WOBBLE ATIPSYNC, BIDATA, BICLK WRITE, SSP2/1, RAPC, WAPC, H11T0, LDH, ATEST3, ATEST1, WDAT, NWDAT, EFMG LOUT, ROUT HISIDE (WD25C32) is made by WESTERN DIGITAL. A13194 No. 6495-5/14 www.DataSheet4U.com LC898093 Pin Functions Pin type I O Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 Pin name VSS RA4 RA5 RA6 RA7 RA8 RA9 VDD VSS IO0 IO1 IO2 IO3 IO4 IO5 VDD VSS IO6 IO7 IO8 IO9 IO10 VSS VDD IO11 IO12 IO13 IO14 IO15 ATIPSYNC BIDATA BICLK WOBBLE VDD VSS ACRCNG WRITE SSP2 SSP1 RAPC WAPC H11T0 Type P O O O O O O P P B B B B B B P P B B B B B P P B B B B B O B B I P P O I O O O O O Digital system power supply (5 V) Digital system ground (VSS) ATIP CRC result output signal Write strategy signal control input Servo sampling pulse output Servo sampling pulse output Laser control sampling pulse output Laser control sampling pulse output Running OPC sampling pulse ATIP demodulator signals ATIP SYNC detection signal CD-ROM encoder/decoder buffer RAM data lines These pins have built-in pull-up resistors. Digital system ground (VSS) Digital system power supply (5 V) CD-ROM encoder/decoder buffer RAM data lines These pins have built-in pull-up resistors. Digital system power supply (3.3 V) Digital system ground (VSS) CD-ROM encoder/decoder buffer RAM data lines These pins have built-in pull-up resistors. Digital system power supply (5 V) Digital system ground (VSS) CD-ROM encoder/decoder DRAM address lines Digital system ground (VSS) Input Output Pin function B P Bidirectional pin Power supply NC A Not connected Analog pin Continued on next page. No. 6495-6/14 www.DataSheet4U.com LC898093 Continued from preceding page. Pin No. 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 6