CMOS IC

www.DataSheet4U.com LC78637E Overview CMOS IC for Compact Disc Player Applications The LC78637E combines audio CD RF signal processing, servo control, EFM signal processing, audio signal processing, and a CDTEXT decoder in a single chip, enabling a system to be configured with very few peripheral components. The RF signal processing block performs such functions as EFM signal generation, error signal generation, and laser power control. The servo control block carries out A/D conversion of focus error and tracking error signals from the RF signal processing block, and digitally performs focus, tracking, sled, and spindle servo processing necessary for CD servo operation. The functions of the EFM signal processing block cover EFM signal demodulation and synchronization detection, protection, and interpolation, de-interleaving, and error detection and correction. The audio signal processing block handles data interpolation/mute processing based on the error correction situation, and incorporates an 8X over sampling filter, 1-bit DAC, and secondary LPF (differential amplifier). The status and characteristics of each function block can be set, or ascertained by data reads, via the microcomputer interface. Playback functions — Playback speed: 1X speed, 2X speed — Jitter-free playback (VCEC) — CD-R/W: 1X speed, 2X speed — Simple CLV playback RF processing block — RF system: AGC, CD-R, R/W playback supported, peak hold, bottom hold — Error system: Variable-balance TE signal generation, FE signal generation — Detection: Track counting signal, jitter, flaws (black, mirror) — Laser power control — DC offset voltage cancellation Servo control block — Digital processing of tracking, focus, sled, and spindle servos — Automatic adjustment functions: Focus gain, focus bias, focus offset, tracking gain, tracking offset, tracking balance — Use of Sanyo’s original high-performance servo control technology* to improve playability, covering external vibration and playback of warped or eccentric discs — Shock detection — Interruption detection * Robust control technology developed by Sanyo, offering remarkable ability to suppress vibration and shocks, and to achieve tracking of warped or eccentric discs EFM processing block — Error detection and correction (C1 = twofold, C2 = fourfold/twofold) — Jitter margin: ± 13 frames — DOUT output Audio processing block — Interpolation (4 interpolations) — Digital attenuator — Built-in de-emphasis filter — 1-bit DAC (tertiary ∆ Σ noise shaper system) — Built-in 8X oversampling digital filter — Built-in text decoder — EFM signal synchronization detection, protection, interpolation — — — — Fadeout function Bilingual function Built-in secondary LPF for audio output DF and DAC clocks can be supplied externally www.DataSheet4U.com LC78637E Power supply voltage and package — Package 80-pin flat package — Package Dimensions (unit: mm) — Power supply voltage: 3.3 V (5 V interface to microcomputer possible) SANYO: QFP80 (14×14) 17. 2 ( 0. 83) 60 61 ( 0. 83) 14. 0 0. 65 ( 0. 83) 41 40 0. 15 ( 0. 83) 80 1 0. 25 3. 0max 20 ( 2. 7) 0. 1 14. 0 0. 65 17. 2 21 ( 0. 8) 15. 6 -2- www.DataSheet4U.com LC78637E Block Diagram RFMON MONITOR PH TEIN TEC AIN CIN BIN DIN RF SIGNAL PROCESSOR FOCUS ERROR PROCESSOR FEC LPF TE RF VREF BH LDD APC EIN FIN TRACKING ERROR PROCESSOR LDS AVDD1 AVSS1 DEFECT RAM DEFECT DET AVDD2 AVSS2 A/D SERVO PROCESSEROR TRACK JUMP AUTO ADJUST JITTER DETECT SLICE LEVEL CONTROL JITTC SLCO EFMIN SW DRF D/A S/H FDO TDO SLDO SPDO DRF RUPTURE DEFECT VDD5 PDO1 PDO2 PCKIST VVD VVSS SBCK/FG XIN XOUT 16MOUT XVDD XVSS *RES *WRQ CL CE DI DO VDD5V CONT1, 2, 3 CONT4, 5, SBCK/CONT6 PLL VCEC CLV, CAV CONTROL FRAME SYNC DETECT, PROTECT INSERT, EFM DECODE FSEQ V/*P SUBCODE & TEXT DECODE CLOCK GENERATOR VDD VSS MONI1 to 5 MONITOR SIGNAL SELECTOR RAM COMMAND INTERFACE ERROR CORRECTION AUDIO CD C1-2, C2-2 FSX/16MIN C2F EFLG AUDIO OUT DOUT LRSY DATACK DATA GENERAL-PURPOSE PORTS 8FS DIGTAL FILTER INTERPOLATION MUTE ATTENUATION DEEMPHSIS SERIAL OUT EXTERNAL 1bit DAC LPF AUDIO IN ASLRCK ASDACK ASDFIN TEST LVDD LVSS LCHO RCHO RVDD RVSS -3- www.DataSheet4U.com LC78637E Pin Layout PCKIST CONT1 CONT2 CONT3 EFMIN VVDD *WRQ VDD5 VVSS SLCO PDO2 PDO1 *RES DRF VSS DO CL 62 RF 80 76 75 74 73 72 71 70 69 68 67 66 65 64 63 DI 79 78 77 61 CE LPF AIN CIN BIN DIN AVSS1 AVDD1 FEC RFMON 1 2 3 4 5 6 7 8 9 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 DATA DATACK LRSY ASDFIN ASDACK ASLRCK 16MOUT EFLG C2F XVSS FSX/16MIN XIN XOUT XVDD RVDD RCHO RVSS LVSS LCHO LVDD LC78637 VREF 10 JITTC 11 EIN 12 FIN 13 TEC 14 TE 15 TEIN 16 AVSS2 17 AVDD2 18 LDD 19 LDS 20 FDO 21 TDO 22 SLDO 23 SPDO 24 CONT4 25 CONT5 26 SBCK/CONT6 27 SBCK/FG 28 DEFECT 29 V/*P 30 FSEQ 31 MONI1 32 MONI2 33 MONI3 34 MONI4 35 MONI5 36 VSS 37 VDD 38 DOUT 39 TEST 40 -4- www.DataSheet4U.com LC78637E Absolute Maximum Ratings/Ta = 25 °C, Vss = 0 V Item Maximum power supply voltage Input voltage Output voltage Allowable power dissipation Operating ambient temperature Storage ambient temperature Symbol VDD3max VDD5max VIN3 VIN5 VOUT3 VOUT5 Pdmax Topg Tstg Conditions Rating VSS–0.3 to VSS+4.0 VSS–0.3 to VSS+6.0 VSS–0.3 to VDD3+0.3 VSS–0.3 to VDD5+0.3 VSS–0.3 to VDD3+0.3 VSS–0.3 to VDD5+0.3 540 –20 to +75 –40 to +125 Unit V V V V V V mW °C °C Allowable Operating Ranges/Ta = 25 °C, Vss = 0 V Item Power supply voltage Symbol VDD3 VDD5 VIH3(1) Pin Name VDD, XVDD, LVDD, RVDD, VVDD, AVDD1, AVDD2 VDD5 SBCK/FG, CONT4 to 5, SBCK/CONT6, TEST, ASLRCK, ASDATA, ASDFIN EFMIN CE, CL, DI, *RES CONT1 to 3 SBCK/FG, CONT4 to 5, SBCK/CONT6, TEST, ASLRCK, ASDATA, ASDFIN EFMIN CE, CL, DI, *RES CONT1 to 3 CL, DI, CE CL, DI, CE SBCK/FG, SBCK/CONT6, CL SBCK/FG, SBCK/CONT6, CL DO, MONI5 (PW signal) CE CE MONI3 (SFSY signal) MONI3 (SFSY signal) CONT1 to CONT5, SBCK/CONT6, CL CONT1 to CONT5, SBCK/CONT6, CL CONT1 to CONT5, SBCK/CONT6, CE EFMIN XIN, XOUT Conditions Min. 3.0 3.0 0.7VDD3 Typ. 3.3 Max. 3.6 5.5 VDD3 Unit V V V “H” level input voltage “L” level input voltage VIH3(2) VIH5(1) VIH5(2) VIL3(1) 0.6VDD3 0.8VDD5 0.7VDD5 0 VDD3 VDD5 VDD5 0.2VDD3 V V V V Data/CE setup time Data/CE hold time “H” level clock pulse width “L” level clock pulse width Data read access time Command sending time RAM read command sending time Subcode read cycle time Subcode read enable time Port input data setup time Port input data hold time Port output data delay time Operating frequency range Crystal oscillation frequency VIL3(2) VIL5(1) VIL5(2) tSU tHD tWH tWL tRAC tCE tCERAM tSC tSE tCSU tCHD tCDD fOP fX Fig. 1, 2 Fig. 1, 2 Fig. 1, 2, 3 Fig. 1, 2, 3 Fig. 1, 2, 3, 4 Fig. 1, 2 Fig. 2 Fig. 3 Fig. 3 Fig. 4 Fig. 4 Fig. 5 0 0 0 400 400 400 400 0 1 12 136 400 400 400 0.4VDD3 0.2VDD5 0.3VDD5 400 V V V ns ns ns ns ns µs µs µs ns ns ns 1200 10 16.9344 ns MHz MHz -5- www.DataSheet4U.com LC78637E Electrical Characteristics/Ta = 25 °C, VDD = 3.3 V, Vss = 0 V Item Current dissipation Symbol Pin Name Conditions Min. Typ. IDD VDD, XVDD, LVDD, RVDD, 75 VVDD, AVDD1, RFVDD2 VIN = 3.6 V IIH3 SBCK/FG, CONT4 to 5, SBCK/CONT6, TEST, ASLRCK, ASDATA, ASDFIN IIH5 CE, CL, DI, *RES, CONT1 to VIN = VDD5V = 3 5.5 V IIL3 SBCK/FG, CONT4 to 5, VIN = 0 V –10 SBCK/CONT6, TEST, ASLRCK, ASDATA, ASDFIN VIL5 CE, CL, DI, *RES, CONT1 to VIN = 0 V –10 3 VOH3a CONT4 to 5, SBCK/CONT6, IOH = –2 mA VDD3 – 0.4 C2F, EFLG, FSX/16MIN, MONI1 to 5, LRSY, DATA, DATACK, 16MOUT, V/*P, FSEQ, DEFECT, VOH3b DOUT IOH = – 4 mA VDD3 – 0.4 VOH5 DO, *WRQ, DRF, CONT1 to 3 IOH = –1.5 mA VDD5 – 0.4 VOL3a CONT4 to 5, SBCK/CONT6, IOL = 2 mA C2F, EFLG, FSX/16MIN, MONI1 to 5, LRSY, DATA, DATACK, 16MOUT, V/*P, FSEQ, DEFECT, VOL3b DOUT IOL = 4 mA VOL5 DO, *WRQ, DRF, CONT1 to 3 IOL = 1.5 mA IOFF3 CONT4 to 5, SBCK/CONT6 High–10 impedance output IOFF5 CONT1 to 3 High–10 impedance output IPDOH PDO1, 2 RISET = 120 kΩ 48 60 –72 –60 IPDOL Charge pump current setting = 1× Max. Unit 100 mA 10 µA “H” level input current 10 µA µA “L” level input current µA V “H” level output voltage 0.4 V V V “L” level output voltage 0.4 0.4 10 V V µA Output leakage current 10 µA Charge pump output current 72 –48 µA µA -6- www.DataSheet4U.com LC78637E 1-Bit DAC Block Analog Characteristics/Ta = 25 °C, VDD = LVDD = RVDD = 3.3 V, VSS = LVSS = RVSS = 0 V Item Output level Total harmonic distortion factor D range Signal-to-noise ratio Crosstalk Symbol Pin Name Conditions 1 kHz: 0 dB data input 1 kHz: 0 dB data input, 20 kHz-LPF used (incorporated in AD725D) 1 kHz: –60 dB data input, 20 kHz-LPF, A filter used (incorporated in AD725D) 1 kHz: 0 dB data input, 20 kHz-LPF, A filter used (incorporated in AD725D) 1 kHz: 0 dB data input, 20 kHz-LPF used (incorporated in AD725D) Min. Typ. Max. Unit 0.63 0.012 0.015 92 96 Vrms % dB LEVEL LCHO, RCHO THD+N LCHO, RCHO DR LCHO, RCHO S/N CT LCHO, RCHO LCHO, RCHO 95 82 98 85 dB dB * Measurements in normal-speed playback mode in Sanyo 1-bit DAC block reference circuit 1-Bit DAC Block Reference Circuit LC78637E LVDD (RVDD) 10 µF LCHO (RCHO) LVss (RVss) 1500 pF 100 kΩ 2.2 kΩ Analog output LCH (RCH) LPF AD725D (Shibasoku Corp.) XIN XOU Resonator: 16.9344 MHz Resonator C C -7- www.DataSheet4U.com LC78637E Data Transmission/Reception Figure 1 tSU CE tWH CL tWL DI tSU DO tRAC tHD tCE Command Input / Data Output tHD Figure 2 tSU CE RAM Read Command Input / Data Output tHD tWH CL tWL DI tSU DO tRAC tHD tCERAM -8- www.DataSheet4U.com LC78637E Figure 3 tSE SFSY Subcode Output tSC tWH SBCK tWL PW P Q tRAC R S T U V W “O” P Figure 4 General-Purpose Port Input Timing CL tCSU tCHD CONT1 CONT2 CONT6 Input data Input data tRAC DO CONT1 CONT2 CONT3 CONT4 CONT5 CONT6 Figure 5 General-Purpose Port Output Timing CE tCDD CONT1 to 6 -9- w