Five-Channel CD Actuator Driver

Ordering number : ENN7817 SANYO Semiconductors DATA SHEET Monolithic Linear IC LA6565 Overview Five-Channel CD Actuator Driver (BTL: 4 channels, H bridge: 1 channel) The LA6565 is a four-channel BTL plus one-channel H bridge actuator driver developed for use in CD and DVD drives. The BTL driver channels 1 and 2 include built-in operational amplifiers allowing the LA6565 to support a wide range of applications. Application • Five-channel (BTL: 4 channels, H bridge: 1 channel) CD motor driver Features and Functions • • • • • • • • Five power amplifier channels on a single chip (Bridge connection (BTL): 4 channels, H bridge: 1 channel) IO max: 1 A Built-in level shifters (except for the H bridge channel) Muting circuits (output on/off, two systems) (The muting circuits operate for the BTL amplifiers. They do not apply to the H bridge or regulator circuits.) Built-in regulator (Uses an external pnp transistor and is set with an external resistor.) Output voltage setting function (loading driver) Built-in independent operational amplifiers Thermal shutdown circuit Specifications Maximum Ratings at Ta = 25°C Parameter Supply voltage Allowable power dissipation Maximum output current Maximum input voltage MUTE pin voltage Operating temperature Storage temperature Symbol VCC max Pd max IO max VINB VMUTE Topr Tstg Independent IC Specified PCB* For each of the channel 1 to 4 and H bridge outputs Conditions Ratings 14 0.8 2 1 13 13 –30 to +85 –55 to +150 Unit V W W A V V °C °C Note *:Specified PCB (76.1mm × 114.3mm × 1.6mm), PCB meterial : glass epoxy Recommended Operating Conditions at Ta = 25°C Parameter Supply voltage Symbol VCC Conditions Ratings 5.6 to 13 Unit V Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 52404TN (OT) No.7817-1/8 LA6565 Electrical Characteristics at Ta = 25°C, VCC1 = VCC2 = 8 V, VREF = 2.5 V Parameter [Overall] Quiescent current when on Quiescent current when off Thermal shutdown circuit operating temperature [VREF Amplifier] VREF amplifier offset voltage VREF input voltage range VREF-OUT output current [Operational Amplifier] (Independent) Input voltage range Output current (sink) Output current (source) Output offset voltage Residual current (sink) [BTL Amplifier Block] (Channels 1 to 4) Output offset voltage Input voltage range Output voltage Closed circuit voltage gain Slew rate Muting on voltage Muting off voltage [Input Amplifier Block] (Channels 1 and 2) Input voltage range Output current (sink) Output current (source) Output offset voltage [Loading Block] (Channel 5, H bridge circuit) Output voltage Braking output saturation voltage Low-level input voltage High-level input voltage Power supply output REG-IN sink current Line regulation Load regulation *2: The input amplifier is a buffer amplifier. *3: The voltage difference between the two sides of the load (12 Ω). *4: When the MUTE pin is high, the output will be on, and when low, the output will be off (high-impedance state). *5: The input operational amplifier source is constant current. Since the 11 kΩ resistor between this and the next stage functions as the load, the input operational amplifier gain must be set carefully. *6: The braking operation is a short (to ground) braking operation. The sink side output is on at this time. *7: Design guarantee. VO-LOAD For forward/reverse operation, Io = 0.5 A, VCONT = VCC * 5.7 6.5 0.3 1 2 IO = 200 mA 6 V ≤ VCC ≤ 12 V, IO = 200 mA 5 mA ≤ IO ≤ 200 mA 1.260 5 1.285 10 10 10 100 100 1.310 V V V V V mA mV mV VIN-OP SINK-OP SOURCE-OP *5 VOFF-OP 0 2 300 –10 500 +10 VCC – 1.5 V mA µA mV VOFF VIN VO VG SR The voltage difference between each channel outputs*2, *3 Input voltage range of the input operational amplifiers Io = 0.5 A, the voltage between VO+ and VO– in each channel The gain from the input to the output with the input amplifier set to 0 dB*2, *3 For the independent amplifier. Times 2 when between outputs.*7 2.5 0.5 –50 0 5.7 7.2 6.2 8 0.5 9 +50 VCC – 1.5 mV V V times V/µs V V VIN (OP) SINK (OP) SOURCE (OP) VOFF (OP) VCE-SINK (OP) IO (sink side) = 1 mA 0 2 300 –10 500 +10 0.6 VCC – 1.5 V mA µA mV V VREF-OFFSET VREF-IN I-VREF-OUT –10 1 1 +10 VCC – 1.5 mV V mA ICC-ON ICC-OFF TSD BTL amplifier output on, loading block off*1 All outputs off*1 *7 150 30 10 175 50 15 200 mA mA °C Symbol Conditions Ratings min typ max Unit VMUTE-ON The output on voltage, for each mute function*4 VMUTE-OFF The output off voltage, for each mute function*4 VCE-BREAK The output voltage during braking*6 VIN-L VIN-H VOUT ∆VOLN ∆VOLD [Power Supply Block] (Uses an external 2SB632K pnp transistor) REG-IN-SINK External pnp transistor base current *1: The total current dissipation for VCCP1, VCCP2, and VCCS with no load. No.7817-2/8 LA6565 Package Dimensions unit : mm 3251 17.8 (6.2) 2.5 Pd max —Ta Specified PCB: 76.1mm × 114.3mm × 1.6mm PCB material: glass epoxy 36 19 Allowable power dissipation, Pd max — W 2.0 (4.9) 7.9 10.5 Mounted on the specified printed circuit board. 1.5 0.65 1 (0.5) 0.8 2.0 0.3 18 0.25 2.25 1.0 0.8 1.04 Independent IC 2.45max 0.5 0.42 2.7 0 --20 0.1 0 20 40 60 80 100 Ambient temperature, Ta — °C SANYO : HSOP36R (375mil) ILA06754 No.7817-3/8 LA6565 Internal Block Diagram Signal system ground FWD 1 Thermal shutdown circuit (Load output voltage setting) 36 SGND REV 2 35 VCONT VCCP2 3 VLO– 4 MUTE Turns the corresponding channel on/off. High: output on, low: output off 44 kΩ CH1 34 MUTE1 CH2,3,4 33 MUTE234 VLO+ 5 11 kΩ – + – + To VREFOUT 32 VIN4– VO4+ 6 31 VIN4 VO4– 7 – + 30 VREF_IN VO3+ 8 29 VREF_OUT VO3– 9 (VCC) Power system ground FR – + REG_IN Power system ground 28 REG_OUT – + REG_OUT FR VO2+ 10 + – 27 REG_IN VO2– 11 + – VO1– 12 26 VIN+OP 25 VIN-OP VO1+ 13 24 VO_OP VCCP1 14 44 kΩ 23 VIN3 VCCS 15 Signal system power supply 11 kΩ – + – + To VREFOUT 22 VIN3– VIN1+ 16 + – 11 kΩ 44 kΩ – + 21 VIN2 VIN1– 17 44 kΩ 11 kΩ – + 20 – + 19 VIN2– VIN1 18 VIN2+ No.7817-4/8 LA6565 Sample Application Circuit MUTE234 MUTE1 1 LOADING 2 3 0.1µF LOADING MOTOR M 2.2 Ω 0.1 µF TRACKING COIL 2.2 Ω 0.1 µF FOCUS COIL 2.2 Ω 9 VO3REG-OUT 28 7 8 VO4VO3+ VREF-IN VREF-OUT 30 29 5 6 VLO+ VO4+ VIN4VIN4 32 31 4 REV VCC2 VLOVCONT MUTE1 MUTE234 35 34 33 FWD S-GND 36 FR FR FR FR REG 0.1 µF SLED MOTOR M 2.2 Ω 0.1 µF SPINDLE MOTOR M 2.2 Ω VCC 14 15 16 17 18 VCCP1 VCCS VIN1+ VIN1VIN1 VIN3 VIN3VIN2 VIN2VIN2+ 23 22 21 20 19 TRACKING FOCUS SLED SPINDLE VREF 13 VO1+ VO-OP 24 11 12 VO2VO1VIN+OP VIN-OP 26 25 10 VO2+ REG-IN 27 VCC No.7817-5/8 LA6565 Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Pin Name FWD REV VCC2 VLO– VLO+ VO4+ VO4– VO3+ VO3– VO2+ VO2– VO1– VO1+ VCCP1 VCCS VIN1+ VIN1– VIN1 VIN2+ VIN2– VIN2 VIN3– VIN3 VO_OP VIN-OP VIN+OP REG_IN REG_OUT VREF_OUT VREF_IN VIN4 VIN4– MUTE234 MUTE1 VCONT S_GND Pin Descriptions Loading output direction switching (FWD). Loading system logic input. Loading output direction switching (REV). Loading system logic input. Channels 3, 4, and loading power stage power supply Loading output (–) Loading output (+) Channel 4 output (+) Channel 4 output (–) Channel 3 output (+) Channel 3 output (–) Channel 2 output (+) Channel 2 output (–) Channel 1 output (–) Channel 1 output (+) Channels 1 and 2 power stage power supply Signal system power supply Channel 1 input. Input operational amplifier + input. Channel 1 input. Input operational amplifier – input. Channel 1 input. Input operational amplifier output. Channel 2 input. Input operational amplifier + input. Channel 2 input. Input operational amplifier – input. Channel 2 input. Input operational amplifier output. Channel 3 input. Input operational amplifier – input. Channel 3 input. Input operational amplifier output. Operational amplifier output Operational amplifier – input Operational amplifier + input Regulator error amplifier output. Connect this pin to the base of the external pnp transistor. Regulator error amplifier input (+). VREF amplifier (voltage follower) output. VREF input. Apply the external reference voltage to this pin. Channel 4 input. Input operational amplifier output. Channel 4 input. Input operational amplifier – input. Controls the on/off state of channels 2, 3, and 4. Channel 1 output on/off control Loading block output high-level voltage setting Signal system ground No.7817-6/8 LA6565 Pin Functions Pin No. 16 17 18 19 20 21 22 23 32 31 26 25 24 Pin Name Symbol VIN1+ VIN1– VIN1 VIN2+ VIN2– VIN2 VIN3– VIN3 VIN4– VIN4 VIN+OP VIN–OP VO_OP Description Equivalent Circuit VIN* VCCS Inputs (channels 1 to 4 and the independent operational amplifier) Input (CH1 to 4) VIN*+ VIN*– 300 Ω 300 Ω 300 Ω SGND 50 kΩ 50 kΩ 50 kΩ 1 kΩ VO* 1 kΩ RF VLO+ VLO– 1kΩ 1kΩ 20 kΩ 10 kΩ 20 kΩ 40 kΩ 1 2 Input (H bridge) FWD REV SGND VCCP* 13 12 10 11 8 9 6 7 VO1+ VO1– VO2+