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www.DataSheet4U.com L4989 LOW POWER VOLTAGE REGULATOR PRODUCT PREVIEW ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ OPERATING DC SUPPLY VOLTAGE RANGE 5.6V TO 31V VERY LOW QUIESCENT CURRENT WITH WATCHDOG DISABLED PRECISION OUTPUT VOLTAGE (3%) LOW-DROP VOLTAGE (180mV typ at Io = 150mA) RESET CIRCUIT SENSING THE OUTPUT VOLTAGE DOWN TO 1V PROGRAMMABLE RESET DELAY WITH EXTERNAL CAPACITOR WATCHDOG DISABLE INPUT PROGRAMMABLE WATCHDOG TIMER WITH EXTERNAL CAPACITOR THERMAL SHUTDOWN AND SHORT CIRCUIT PROTECTION WIDE TEMPERATURE RANGE (Tj = -40°C TO 150°C) SO8 SO20 ORDERING NUMBERS: L4989D (SO8) L4989 (SO20) BLOCK DIAGRAMt Vs Vi Vo Co Start up 1.25V Voltage Reference Wi Vcw Ctw WE watchdog gnd 100mV + _ Res Vcr Ctr Reset March 2004 This is preliminary information on a new product now in development. Details are subject to change without notice. 1/10 www.DataSheet4U.com L4989 PIN DESCRIPTION N. (SO8) 1 2 N. (SO20) 1 4 5,6,15,16 3 7 NAME WEn gnd gnd Res FUNCTION Watchdog enable input. If high it activates the watchdog operation. Ground reference Ground Connected these pins to a heat spreader ground Reset output. It is pulled down when output voltage goes below Vo_th or frequency at Wi is too low. Reset timing adjust. A capacitor between Vcr pin and gnd, sets the reset delay time (trd) Watchdog timer adjust A capacitor between Vcw pin and gnd, sets the time response of the watchdog monitor. Watchdog input. If the frequency at this input pin is too low, the Reset output is activated. Voltage regulator output Block to ground with a capacitor >100nF (needed for regulator stability) Supply voltage Block to ground directly at IC pin with a ceramic capacitor not connected 4 10 Vcr 5 11 Vcw 6 14 Wi 7 17 Vo 8 20 2,3,8,9,12, 13,18,19 Vs N. C. PIN CONNECTIONS VEN VEN GND RES VCR 1 2 3 4 D04AT515 1 2 3 4 5 6 7 8 9 10 D04AT516 20 19 18 17 16 15 14 13 12 11 VS N.C. N.C. VO GND GND WI N.C. N.C. WCW 8 7 6 5 VS VO WI VCW N.C. N.C. GND GND GND RES SO8 N.C. N.C. VCR SO20 2/10 www.DataSheet4U.com L4989 ABSOLUTE MAXIMUM RATINGS Symbol VVsdc IVsdc VVo IVo VWi Vod Iod Vcr Vcw VWEn Tj VESD DC supply voltage Input current DC output voltage DC output current Watchdog input voltage Open drain output voltage (RES) Open drain output current (RES) Reset delay voltage Watchdog delay voltage Watchdog enable input Junction temperature ESD voltage level (HBM-MIL STD 883C) Parameter Value -0.3 to 40 internally limited -0.3 to 6 internally limited -0.3 to VVo + 0.3 -0.3 to VVo + 0.3 internally limited -0.3 to VVo + 0.3 -0.3 to VVo + 0.3 -0.3 to 40 -40 to 150 ±2 V V V °C kV V V V Unit V Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause perma-nent damage to the integrated circuit. THERMAL DATA Symbol Rth-j amb Parameter Thermal Resistance Junction to ambient SO8 130 to 180 SO12+4+4 50(*) Unit °C/W (*) with 6 sq. cm on board heat sink ELECTRICAL CHARACTERISTICS (Vs = 5.6V to 31V, Tj = -40°C to +150°C unless otherwise specified) Pin Symbol Parameter Test Condition Min. Typ. Max. Unit GENERAL Vo Vo Vo Vs, Vo Vo Vs, Vo Vs, Vo Vs, Vo Vo_ref Ishort_13 Ilim Vline Vload Vdp SVR Iqs_1 Output voltage Short circuit current (1) Output current limitation (1) Line regulation voltage Load regulation voltage Drop voltage Ripple rejection Current consumption with watchdog not active Iqs_1 = IVs – Io Vs=5.6 to 31V Io=1 to 150mA Vs=13.5V Vs=13.5V Vs=5.6 to 31V Io=1 to 150mA Io=1 to 150mA Io=150mA fr = 100 Hz Vs=13.5V, Io<1mA, WEn low 55 69 115 180 4.85 160 170 5.00 210 250 5.15 250 290 25 25 400 V mA mA mV mV mV dB µA 3/10 www.DataSheet4U.com L4989 Pin Vs, Vo Symbol Iqs_10 Parameter Current consumption with watchdog not active Iqs_10 = IVs – Io Current consumption with watchdog not active Iqs_50 = IVs – Io Current consumption with watchdog not active Iqs_150 = IVs – Io Current consumption with watchdog active Iqn_1 = IVs – Io Current consumption with watchdog active Iqn_10 = IVs – Io Current consumption with watchdog active Iqn_50 = IVs – Io Current consumption with watchdog active Iqn_150 = IVs – Io Thermal protection temperature Thermal protection temperature hysteresis Test Condition Vs=13.5V, Io=10mA, WEn low Vs=13.5V, Io=50mA, WEn low Vs=13.5V, Io=150mA, WEn low Vs=13.5V, Io<1mA, WEn high Vs=13.5V, Io=10mA, WEn high Vs=13.5V, Io=50mA, WEn high Vs=13.5V, Io=150mA, WEn high 150 10 Min. Typ. 127 Max. 300 Unit µA Vs, Vo Iqs_50 498 900 µA Vs, Vo Iqs_150 1.40 2 mA Vs, Vo Iqn_1 110 170 µA Vs, Vo Iqn_10 168 350 µA Vs, Vo Iqn_50 538 1000 µA Vs, Vo Iqn_150 1.45 2.00 mA Tw Tw_hy 190 °C °C Note: 1. see fig1 (behavior of output current versus regulated voltage Vo) RESET Pin Res Res Res Res Vcr Vcr Vcr Vcr Res Res Symbol Vres_l IRes_lkg RRes Vo_th Vrhth Vrlth Icr Idr trr_2 trd Parameter Reset output low voltage Reset output high leakage current Internal Pull up resistance Reset threshold voltage Reset timing low threshold Reset timing high threshold Charge current Discharge current Reset reaction time (2) Reset delay time Test condition Rext = 5kΩ to Vo, Vo > 1V VRes = 5V versus Vo Vs = 5.6 to 31V Io = 1 to 150mA Vs =13.5V Vs =13.5V Vs =13.5V Vs =13.5V Vo = Vo_th - 100mV Vs =13.5V, Ctr =1nF 10 6% 10% 44% 8 8 100 65 20 8% 13% 47% 15 15 250 115 min typ max 0.4 1 40 10% 16% 50% 30 30 700 165 Unit V µA kΩ below Vo_ref Vo_ref Vo_ref µA µA µs ms 2. When Vo becomes lower than 4V, the reset reaction time decreases down to 2 s assuring a faster reset condition in this particular case. 4/10 www.DataSheet4U.com L4989 WATCHDOG Pin Wi Wi Wi Wi Vcw Vcw Vcw Vcw Vcw Res Symbol Vih Vil Vih Rwi Vwhth Vwlth Icwc Icwd Twop twol Parameter Input high voltage Input low voltage Input hysteresis Pull down resistor Low threshold High threshold Charge current Discharge current Watchdog period Watchdog output low time Test condition Vs=13.5V Vs=13.5V Vs=13.5V Vs=13.5V Vs=13.5V Vs=13.5V Vs=13.5V, Vcw=0.1V Vs=13.5V, Vcw=2.5V Vs=13.5V, Ctw=47nF Vs=13.5V, Ctw=47nF 30 10% 44% 5 1.25 20 4 500 100 13% 47% 10 2.5 40 8 250 16% 50% 20 5 80 16 min 3.5 1.5 typ max Unit V V mV kΩ Vo_ref Vo_ref µA µA ms ms WEn Pin WEn WEn WEn WEn Symbol VWEn_low VWEn_high VWEn_hyst RWEn Parameter WEn input low voltage WEn input high voltage WEn input hysteresis Pull down current Vs=13.5V 3 600 1 920 2.5 1300 5 Test condition min typ max 1 Unit V V mV µA VOLTAGE REGULATOR The voltage regulator uses a p-channel MOS transistor as a regulating element. With this structure a very low dropout voltage at current up to 150mA is obtained. The output voltage is regulated up to transient input supply voltage of 40V. No functional interruption due to over-voltage pulses is generated. The voltage Regulator is always active and not depending on the state of WEn input pin. A short circuit protection to GND is provided. Figure 1. Behavior of output current versus regulated voltage Vo Vo Vo_ref Ishort Ilim Iout 5/10 www.DataSheet4U.com L4989 The reset circuit monitors the output voltage Vo. If the output voltage stays lower than Vo_th for filter time trr, then Res goes low. If the output voltage Vo becomes lower than 2.0V (typ) than Res goes immediately low. The reset low signal is guaranteed for an output voltage Vo greater than 1V. When the output voltage goes back higher than Vo_th then Res goes high with a delay trd. This delay is obtained by 512 period of an oscillator. The oscillator period is given by: ( V rht h – V rlth ) ⋅ Ctr ( V rht h – V rlth ) ⋅ Ctr Tosc = ------------------------------------------------ + -----------------------------------------------Icr Id trd is given by trd = 512 x Tosc where: Icr = 15µA is an internally generated charge current, Idr = 15µA is an internally generated discharge current, Vrhth=2.35V and Vrlth=0.65V are two typ thresholds, Ctr is an external capacitance. The Reset is always active and not depending on the state of WEn input pin. Figure 2. Reset Time Diagram Wi Vout_th trr Tosc Vrhth Vrlth Vo Vcr < trr trd = 512 Tosc Res Watchdog The watchdog input Wi monitors a connected microcontroller. If pulses are missing, the Reset output Res is set to low. The pulse sequence time can be set within a wide range with the external capacitor Ctw. The watchdog circuit discharges the capacitor Ctw with the con-stant current Icwd. If the lower threshold Vwlth is reached, a watchdog reset is generated. To prevent this reset the microcontroller must generate a positive edge during the discharge of the capacitor before the voltage has reached the threshold Vwlth. In order to calculate the minimum time tdis during which the microcontroller must output the positive edge the fol-lowing equation can be used (Vwhth-Vwlth) x Ctw = Icwd x tdis Every Wi positive edge switches the current source from discharging to charging, the same happens when the lower threshold is reached. When the voltage reaches the upper threshold Vwhth the current switches from charging to discharging. The result is a saw toothwaveform at the watchdog timer capacitor Ctw. The Watchdog operation is active only if WEn input pin is set to logic state high. 6/10 www.DataSheet4U.com L4989 Figure 3. Watchdog time diagram Wi Twop Vwhth Vcw twol Res Vwlth 7/10 www.DataSheet4U.com L4989 mm DIM. MIN. A A1 A2 B C D (1) E e H h L k ddd Note: inch MAX. 1.75 0.25 1.65 0.51 0.25 5.00 4.00 MIN. 0.053 0.004 0.043 0.013 0.007 0.189 0.15 0.050 6.20 0.50 1.27 0.228 0.010 0.016 0.244 0.020 0.050 TYP. MAX. 0.069 0.010 0.065 0.020 0.010 0.197 0.157 TYP. OUTLINE AND MECHANICAL DATA 1.35 0.10 1.10 0.33 0.19 4.80 3.80 1.27 5.80 0.25 0.40 0˚ (min.), 8˚ (max.) 0.10 0.004 (1) Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs shall not exceed 0.15mm (.006inch) in total (both side). SO-8 0016023 C 8/10 www.DataSheet4U.com L4989 mm DIM. MIN. A A1 B C D (1) E e H h L k ddd 10.0 0.25 0.40 2.35 0.10 0.33 0.23 12.60 7.40 1.27 10.65 0.7

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