RISC Microcontroller

APPENDIX A KS32C50100 RISC MICROCONTROLLER -Samsung Electronics Co. -- KS32C50100 BSDL --- Version 1.1 01-27-99 -- Revision List: -1) Pin name NC changed to LITTLE -2) 1194 -> 1149 -- Package Type: QFP2828B -entity KS32C50100 is generic (PHYSICAL_PIN_MAP : string := "QFP2828B"); port ( nUADTR1 UATXD1 nUADSR1 nDTRA RXDA nRTSA TXDA nCTSA nDCDA RXCA nSYNCA TXCA nDTRB RXDB nRTSB TXDB nCTSB nDCDB RXCB nSYNCB TXCB : inbit; : outbit; : outbit; : : : : : : : : : : : : : : : : : : outbit; inbit; outbit; outbit; inbit; inbit; inbit; outbit; inoutbit; outbit; inbit; outbit; outbit; inbit; inbit; inbit; outbit; inoutbit; inbit; w w w .D t a S a e h t e U 4 .c m o CRS_CRS_10M: RX_DV_LINK10: RXD RX_ERR RX_CLK_RXCLK_10M: COL_COL_10M: TXD TX_ERR_PCOMP_10M: TX_CLK_TXCLK_10M: TX_EN_TXEN_10M: inbit; : inbit_vector(0 to 3); : inbit; in bit; inbit; : outbit_vector(0 to 3); outbit; in bit; outbit; A-10 w w w .D at Sh a et e 4U . om c KS32C50100 RISC MICROCONTROLLER APPENDIX A MDIO LITTLE MDC : inoutbit; : inbit; : outbit; TCK TMS TDI TDO nTRST TMODE UCLK nECS nEWAIT nOE B0SIZE : : : : : : : inbit; inbit; inbit; outbit; inbit; inbit; inbit; : outbit_vector(0 to 3); : inbit; : outbit; : inbit_vector(0 to 1); CLKOEN MCLKO MCLK nRESET CLKSEL nRCS nRAS nCAS nDWE nWBE ExtMREQ ExtMACK ADDR XDATA P SCL SDA UARXD0 nUADTR0 UATXD0 nUADSR0 UARXD1 VDDP VDDI VSSP VSSI ); : : : : : : : : : : inbit; outbit; inbit; inbit; inbit; outbit_vector(0 to 5); outbit_vector(0 to 3); outbit_vector(0 to 3); outbit; outbit_vector(0 to 3); : inbit; : outbit; : outbit_vector(0 to 21); : inoutbit_vector(0 to 31); : : : : : : : : : : : : inoutbit_vector(0 to 17); inoutbit; inoutbit; inbit; inbit; outbit; outbit; inbit; linkagebit_vector(0 to 10); linkagebit_vector(0 to 10); linkagebit_vector(0 to 11); linkagebit_vector(0 to 10) A-11 APPENDIX A KS32C50100 RISC MICROCONTROLLER use STD_1149_1_1149.all; attribute PIN_MAP of KS32C50100 : entity is PHYSICAL_PIN_MAP; -- QFP2828B Pin Map --- No-connects: 49 -- constant QFP2828B : PIN_MAP_STRING := "nUADTR1 : 3, " & "UATXD1 : 4, " & "nUADSR1 : 5, " & "nDTRA : 6, " & "RXDA : 7, " & "nRTSA : 8, " & "TXDA : 9, " & "nCTSA : 10, " & "nDCDA : 13, " & "RXCA : 14, " & "nSYNCA : 15, " & "TXCA : 16, " & "nDTRB : 17, " & "RXDB : 18, " & "nRTSB : 19, " & "TXDB : 20, " & "nCTSB : 23, " & "nDCDB : 24, " & "RXCB : 25, " & "nSYNCB : 26, " & "TXCB : 27, " & "CRS_CRS_10M : 28, " & "RX_DV_LINK10 : 29, " & "RXD : (30, 33, 34, 35), " & "RX_ERR : 36, " & "RX_CLK_RXCLK_10M : 37, " & "COL_COL_10M : 38, " & "TXD : (39, 40, 43, 44), " & "TX_ERR_PCOMP_10M : 45, " & "TX_CLK_TXCLK_10M : 46, " & "TX_EN_TXEN_10M : 47, " & "MDIO : 48, " & "LITTLE : 49, " & "MDC : 50, " & A-12 KS32C50100 RISC MICROCONTROLLER APPENDIX A "TCK : 58, " & "TMS : 59, " & "TDI : 60, " & "TDO : 61, " & "nTRST : 62, " & "TMODE : 63, " & "UCLK : 64, " & "nECS : (67, 68, 69, 70), " & "nEWAIT : 71, " & "nOE : 72, " & "B0SIZE : (73, 74), " & "CLKOEN : 76, " & "MCLKO : 77, " & "MCLK : 80, " & "nRESET : 82, " & "PCLKSEL : 83, " & "nRCS : "nRAS : "nCAS : "nDWE : "nWBE : (75, 84, 85, 86, 87, 88), " & (89, 90, 91, 94), " & (95, 96, 97, 98), " & 99, " & (100, 101, 102, 107), " & "ExtMREQ : 108, " & "ExtMACK : 109, " & -A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 "ADDR : (110, 111, 112, 113, 114, 115, 116, 117, 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 132, 133, 134, 135), " & -D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 "XDATA : (136, 137, 138, 139, 140, 141, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 159, 160, 161,162, 163, 164, 165, 166, 169, 170, 171, 172, 173, 174, 175), " & -P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 "P : (176, 179, 180, 181, 182, 183, 184, 185, 186, 189, 190, 191, 192, 193, 194, 195, 196, 199), " & "SCL : 200, " & "SDA : 201, " & "UARXD0 : 202, " & "nUADTR0 : 203, " & "UATXD0 : 204, " & "nUADSR0 : 205, " & "UARXD1 : 206, " & "VDDP : 1, 21, 41, 53, 78, 103, 118, 142, 157, 177, 197, " & "VDDI : 11, 31, 51, 65, 92, 105, 130, 155, 167, 187, 207, " & "VSSP : 2, 22, 42, 54, 79, 93, 106, 131, 156, 168, 188, 208, " & "VSSI : 12, 32, 52, 66, 81, 104, 119, 143, 158, 178, 198 "; A-13 APPENDIX A KS32C50100 RISC MICROCONTROLLER attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_RESET of nTRST : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is true; attribute INSTRUCTION_LENGTH of KS32C50100 : entity is 4; attribute INSTRUCTION_OPCODE of KS32C50100 : entity is "EXTEST (0000)," & "SCAN_N (0010)," & "INTEST (1100)," & "IDCODE (1110)," & "BYPASS (1111)," & "CLAMP (0101)," & "HIGHZ (0111)," & "CLAMPZ (1001)," & "SAMPLE (0011)," & "RESTART (0100)"; -- KS32C50100's IDCODE is the ARM7TDMI's IDCODE. attribute REGISTER_ACCESS of KS32C50100 : entity is "0001" & -- version "111100" & -- design center "0011110000" &-- sequence number "11110000111" &-- Samsung "1"; -- required by 1149.1 attribute REGISTER_ACCESS of KS32C50100 : entity is "IDCODE (IDCODE)," & "BOUNDARY (INTEST, SAMPLE, EXTEST)," & "BYPASS (CLAMP, HIGHZ, BYPASS)"; attribute BOUNDARY_CELLS of KS32C50100 : entity is "BC_4, BC_2, BC_1"; attribute BOUNDARY_LENGTH of KS32C50100 : entity is 233; attribute BOUNDARY_REGISTER of KS32C50100 : entity is -- num "0 "1 "2 "3 "4 "5 cell port function safe [ccell disval rslt] input, X) ," & output2, X) ," & output2, X) ," & input, X) ," & input, X) ," & output3, 1, 5, 1, Z) ," & -- Open-drain Output ( BC_2, UARXD1, ( BC_1, nUADSR0, ( BC_1, UATXD0, ( BC_2, nUADTR0, ( BC_2, UARXD0, ( BC_1, SDA, A-14 KS32C50100 RISC MICROCONTROLLER APPENDIX A "6 ( BC_2, SDA, "7 ( BC_1, SCL, "8 ( BC_2, SCL, "9 ( BC_1, *, "10 ( BC_1, P(17), "11 ( BC_2, P(17), "12 ( BC_1, *, "13 ( BC_1, P(16), "14 ( BC_2, P(16), "15 ( BC_1, *, "16 ( BC_1, P(15), "17 ( BC_2, P(15), "18 ( BC_1, *, "19 ( BC_1, P(14), "20 ( BC_2, P(14), "21 ( BC_1, *, "22 ( BC_1, P(13), "23 ( BC_2, P(13), "24 ( BC_1, *, "25 ( BC_1, P(12), "26 ( BC_2, P(12), "27 ( BC_1, *, "28 ( BC_1, P(11), "29 ( BC_2, P(11), "30 "31 "32 "33 "34 "35 ( BC_1, *, ( BC_1, P(10), ( BC_2, P(10), ( BC_1, *, ( BC_1, P(9), ( BC_2, P(9), input, X) ," & output3, 1, 7, 1, Z) ," & -- Open-drain Output input, X) ," & controlr, 1) ," & --P_ENB(17) output3, X, 9, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(16) output3, X, 12, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(15) output3, X, 15, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(14) output3, X, 18, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(13) output3, X, 21, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(12) output3, X, 24, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(11) output3, X, 27, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(10) output3, X, 30, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(9) output3, X, 33, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(8) output3, X, 36, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(7) output3, X, 39, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(6) output3, X, 42, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(5) output3, X, 45, 1, Z) ," & "36 ( BC_1, *, "37 ( BC_1, P(8), "38 ( BC_2, P(8), "39 ( BC_1, *, "40 ( BC_1, P(7), "41 ( BC_2, P(7), "42 ( BC_1, *, "43 ( BC_1, P(6), "44 ( BC_2, P(6), "45 ( BC_1, *, "46 ( BC_1, P(5), A-15 APPENDIX A KS32C50100 RISC MICROCONTROLLER "47 ( BC_2, P(5), "48 ( BC_1, *, "49 ( BC_1, P(4), "50 ( BC_2, P(4), "51 ( BC_1, *, "52 ( BC_1, P(3), "53 ( BC_2, P(3), "54 ( BC_1, *, "55 ( BC_1, P(2), "56 ( BC_2, P(2), "57 ( BC_1, *, "58 ( BC_1, P(1), "59 ( BC_2, P(1), "60 ( BC_1, *, "61 ( BC_1, P(0), "62 ( BC_2, P(0), input, X) ," & controlr, 1) ," & --P_ENB(4) output3, X, 48, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(3) output3, X, 51, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(2) output3, X, 54, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(1) output3, X, 57, 1, Z) ," & input, X) ," & controlr, 1) ," & --P_ENB(0) output3, X, 60, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & "63 ( BC_1, XDATA(31), "64 ( BC_2, XDATA(31), "65 ( BC_1, XDATA(30), "66 ( BC_2, XDATA(30), "67 ( BC_1, XDATA(29), "68 ( BC_2, XDATA(29), "69 ( BC_1, XDATA(28), "70 ( BC_2, XDATA(28), A-16 KS32C50100 RISC MICROCONTROLLER APPENDIX A "71 ( BC_1, XDATA(27), "72 ( BC_2, XDATA(27), "73 ( BC_1, XDATA(26), "74 ( BC_2, XDATA(26), "75 ( BC_1, XDATA(25), "76 ( BC_2, XDATA(25), "77 ( BC_1, XDATA(24), "78 ( BC_2, XDATA(24), "79 ( BC_1, XDATA(23), "80 ( BC_2, XDATA(23), "81 ( BC_1, XDATA(22), "82 ( BC_2, XDATA(22), "83 ( BC_1, XDATA(21), "84 ( BC_2, XDATA(21), "85 ( BC_1, XDATA(20), "86 ( BC_2, XDATA(20), "87 ( BC_1, XDATA(19), "88 ( BC_2, XDATA(19), "89 ( BC_1, XDATA(18), "90 ( BC_2, XDATA(18), "91 ( BC_1, XDATA(17), "92 ( BC_2, XDATA(17), "93 ( BC_1, XDATA(16), "94 ( BC_2, XDATA(16), "95 ( BC_1, XDATA(15), "96 ( BC_2, XDATA(15), "97 ( BC_1, XDATA(14), "98 ( BC_2, XDATA(14), "99 ( BC_1, XDATA(13), "100 ( BC_2, XDATA(13), "101 ( BC_1, XDATA(12), "102 ( BC_2, XDATA(12), "103 ( BC_1, XDATA(11), "104 ( BC_2, XDATA(11), "105 ( BC_1, XDATA(10), "106 ( BC_2, XDATA(10), output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & output3, X, 127, 1, Z) ," & input, X) ," & out