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Part Number |
KM23C32120C |
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Manufacturer |
Samsung Semiconductor |
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Semiconductor DataSheet |
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DataSheet View |
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KM23C32120C
32M-Bit (4Mx8) CMOS MASK ROM
FEATURES
• • • • 4,194,304 x 8 bit organization Fast access time : 100ns(Max.) Supply voltage : single +5V Current consumption Operating : 50mA(Max.) Standby : 50 µA(Max.) • Fully static operation • All inputs and outputs TTL compatible • Three state outputs • Package - . KM23C32120C : 42-DIP-600
CMOS MASK ROM
GENERAL DESCRIPTION
The KM23C32120C is a fully static mask programmable ROM organized 4,194,304 x 8 bit. It is fabricated using silicon-gate CMOS process technology. This device operates with a 5V single power supply, and all inputs and outputs are TTL compatible. Because of its asynchronous operation, it requires no external clock assuring extremely easy operation. It is suitable for use in program memory of microprocessor and data memory, character generator. The KM23C32120C is packaged in a 42-DIP.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
A21 . . . . . . . . A0
X BUFFERS AND DECODER
MEMORY CELL MATRIX (4,194,304x8)
A19 A18 A8 A7 A6
1 2 3 4 5 6 7 8 9
42 A20 41 A9 40 A10 39 A11 38 A12 37 A13 36 A14 35 A15 34 A16
Y BUFFERS AND DECODER
SENSE AMP. BUFFERS
A5 A4 A3 A2
A1 10
. . . Q0 Q7
CE
11
DIP
33 A17 32 A21 31 VSS 30 A0 29 Q7 28 N.C 27 Q6 26 N.C 25 Q5 24 N.C 23 Q4 22 VCC
VSS 12
CE OE
OE 13 Q0 14
CONTROL LOGIC
N.C 15 Q1 16
N.C 17 Q2 N.C 18 19
Pin Name A0 - A21 Q0 - Q 7 CE OE VCC VSS N.C
Pin Function Address Inputs Data Outputs Chip Enable Output Enable Power (+5V) Ground No Connection
Q3 20 N.C 21
KM23C32120C
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KM23C32120C
ABSOLUTE MAXIMUM RATINGS
Item Voltage on Any Pin Relative to VSS Temperature Under Bias Storage Temperature Symbol VIN TBIAS TStg Rating
CMOS MASK ROM
Unit V °C °C
-0.3 to +7.0 -10 to +85 -55 to +150
NOTE : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS(Voltage reference to VSS, TA=0 to 70°C)
Item Supply Voltage Supply Voltage Symbol VCC VSS Min 4.5 0 Typ 5.0 0 Max 5.5 0 Unit V V
DC CHARACTERISTICS
Parameter Operating Current Standby Current(TTL) Standby Current(CMOS) Input Leakage Current Output Leakage Current Input High Voltage, All Inputs Input Low Voltage, All Inputs Output High Voltage Level Output Low Voltage Level Symbol ICC ISB1 ISB2 ILI ILO VIH VIL VOH VOL IOH=-400µA IOL=2.1mA Test Conditions CE=OE=VIL, all outputs open CE=VIH, all outputs open CE=VCC, all outputs open VIN=0 to VCC VOUT=0 to V CC 2.2 -0.3 2.4 Min Max 50 1 50 10 10 VCC+0.3 0.8 0.4 Unit mA mA µA µA µA V V V V
NOTE : Minimum DC Voltage(V IL) is -0.3V an input pins. During transitions, this level may undershoot to -2.0V for periods <20ns. Maximum DC voltage on input pins(VIH) is VCC+0.3V which, during transitions, may overshoot to VCC+2.0V for periods <20ns.
MODE SELECTION
CE H L L OE X H L Mode Standby Operating Operating Data High-Z High-Z Dout Power Standby Active Active
CAPACITANCE(TA=25°C, f=1.0MHz)
Item Output Capacitance Input Capacitance Symbol COUT CIN Test Conditions VOUT=0V VIN=0V Min Max 12 12 Unit pF pF
NOTE : Capacitance is periodically sampled and not 100% tested.
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KM23C32120C
TEST CONDITIONS
Item Input Pulse Levels Input Rise and Fall Times Input and Output timing Levels Output Loads Value
CMOS MASK ROM
AC CHARACTERISTICS(TA=0°C to +70°C, VCC=5V±10%, unless otherwise noted.)
0.6V to 2.4V 10ns 0.8V and 2.0V 1 TTL Gate and CL=100pF
READ CYCLE
Item Read Cycle Time Chip Enable Access Time Address Access Time Output Enable Access Time Output or Chip Disable to Output High-Z Output Hold from Address Change Symbol tRC tACE tAA tOE tDF tOH 0 KM23C32120C-10 Min 100 100 100 50 20 0 Max KM23C32120C-12 Min 120 120 120 60 20 0 Max KM23C32120C-15 Min 150 150 150 70 30 Max Unit ns ns ns ns ns ns
TIMING DIAGRAM
READ
ADD A0~A21
ADD1 tRC
ADD2
tACE
tDF(Note)
CE
tOE
tAA
tDF(Note)
OE
tOH
DOUT D0~D7
VALID DATA
VALID DATA
NOTE : tDF is defined as the time at which the outputs achieve the open circuit condition and is not referenced to VOH or VOL level.
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KM23C32120C
PACKAGE DIMENSIONS
42-DIP-600
CMOS MASK ROM
(Unit : mm/inch)
0.25 +0.10 -0.05 0.010 +0.004 -0.002
#42
#22
#1 52.82 MAX 2.080 52.42±0.20 2.064±0.008
#21 3.91±0.20 0.154±0.008 5.08 0.200MAX
15.24 0.600
13.80±0.20 0.543±0.008
0~15°
( 0.81 ) 0.032
0.46±0.10 0.018±0.004 1.27±.10 0.050±0.004
2.54 0.100
3.1±0.30 0.122±0.012 0.38 MIN 0.015
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