DATA SHEET
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MOS FIELD EFFECT TRANSISTOR
2SK3642
SWITCHING N-CHANNEL POWER MOS FET
DESCRIPTION
The 2SK3642 is N-channel MOS FET device that features a low on-state resistance and excellent switching characteristics, and designed for low voltage high current applications such as DC/DC converter with synchronous rectifier.
ORDERING INFORMATION
PART NUMBER 2SK3642-ZK PACKAGE TO-252 (MP-3ZK)
FEATURES
• Low on-state resistance RDS(on)1 = 9.5 mΩ MAX. (VGS = 10 V, ID = 32 A) RDS(on)2 = 16 mΩ MAX. (VGS = 4.5 V, ID = 18 A) • Low Ciss: Ciss = 1100 pF TYP. • Built-in gate protection diode
(TO-252)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) (TC = 25°C) Drain Current (pulse)
Note1
VDSS VGSS ID(DC) ID(pulse) PT1 PT2 Tch Tstg
30 ±20 ±64 ±190 36 1.0 150 –55 to + 150 25 62
V V A A W W °C °C A mJ
Total Power Dissipation (TC = 25°C) Total Power Dissipation Channel Temperature Storage Temperature Single Avalanche Current Single Avalanche Energy
Note2 Note2
IAS EAS
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1% 2. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, L = 100 µH, VGS = 20 → 0 V
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information.
Document No. D15970EJ4V0DS00 (4th edition) Date Published January 2005 NS CP(K) Printed in Japan
The mark
shows major revised points.
2002
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2SK3642
ELECTRICAL CHARACTERISTICS (TA = 25°C)
CHARACTERISTICS Zero Gate Voltage Drain Current Gate Leakage Current Gate Cut-off Voltage Forward Transfer Admittance
Note Note
SYMBOL IDSS IGSS VGS(off) | yfs | RDS(on)1 RDS(on)2
TEST CONDITIONS VDS = 30 V, VGS = 0 V VGS = ±20 V, VDS = 0 V VDS = 10 V, ID = 1 mA VDS = 10 V, ID = 32 A VGS = 10 V, ID = 32 A VGS = 4.5 V, ID = 18 A VDS = 10 V VGS = 0 V f = 1 MHz VDD = 15 V, ID = 32 A VGS = 10 V RG = 10 Ω
MIN.
TYP.
MAX. 10 ±10
UNIT
µA µA
V S
1.5 13 26 7.6 10.8 1100 410 150 9.6 5.1 38 10
2.5
Drain to Source On-state Resistance
9.5 16
mΩ mΩ pF pF pF ns ns ns ns nC nC nC V ns nC
Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
Note
Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr
VDD = 24 V VGS = 10 V ID = 64 A IF = 64 A, VGS = 0 V IF = 64 A, VGS = 0 V di/dt = 100 A/µs
23 4.3 6 1.0 31 25
Note Pulsed: PW ≤ 350 µs, Duty Cycle ≤ 2%
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V 50 Ω
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L VDD PG. RG
RL VDD
VGS VGS
Wave Form
0
10%
VGS
90%
VDS
90% 90% 10% 10%
BVDSS IAS ID VDD VDS
VGS 0 τ τ = 1 µs Duty Cycle ≤ 1%
VDS VDS
Wave Form
0
td(on) ton
tr
td(off) toff
tf
Starting Tch
TEST CIRCUIT 3 GATE CHARGE
D.U.T. IG = 2 mA PG. 50 Ω
RL VDD
2
Data Sheet D15970EJ4V0DS
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2SK3642
TYPICAL CHARACTERISTICS (TA = 25°C)
DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA dT - Percentage of Rated Power - %
120 100 80 60 40 20 0 0 25 50 75 100 125 150 175
50
TOTAL POWER DISSIPATION vs. CASE TEMPERATURE PT - Total Power Dissipation - W
40
30
20
10
0 0 25 50 75 100 125 150 175
TC - Case Temperature - °C
TC - Case Temperature - °C
FORWARD BIAS SAFE OPERATING AREA
1000 I D (pulse) PW = 100 µs 10 µs
ID - Drain Current - A
100
I D (D C )
10
R D S (on) Lim ited (at V G S = 10 V)
DC
1 ms 10 m s
1
Power D issipation Lim ited T C = 25°C Single pulse
0.1 0.1 1 10 100
VDS - Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
1000
rth(t) - Transient Thermal Resistance - °C/W
R th(ch-A) = 125°C/W 100
10
R th(ch-C) = 3.47°C/W
1
0.1 Single pulse 0.01
10 µ
100 µ
1m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
Data Sheet D15970EJ4V0DS
3
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2SK3642
DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE
250 Pulsed
FORWARD TRANSFER CHARACTERISTICS
1000
V DS = 10 V Pulsed
ID - Drain Current - A
V GS = 10 V
ID - Drain Current - A
200
100 T ch = −55°C 25°C 75°C 150°C
150
10
100
4.5 V
1
50
0.1
0 0 1 2 3
0.01 0 1 2 3 4 5
VDS - Drain to Source Voltage - V
VGS - Gate to Source Voltage - V
GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE
3
FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT | yfs | - Forward Transfer Admittance - S
100 Tch = −55°C 25°C 75°C 150°C
VGS(off) - Gate Cut-off Voltage - V
VDS = 10 V ID = 1 mA 2.5
2
10
1.5
1
1
0.5
VDS = 10 V Pulsed 0.1 0.1 1 10 100
0 -50 0 50 100 150
Tch - Channel Temperature - °C
ID - Drain Current - A
RDS(on) - Drain to Source On-state Resistance - mΩ
RDS(on) - Drain to Source On-state Resistance - mΩ
DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT
30 Pulsed 25 20 15 V GS = 4.5 V 10 5 0 1 10 100 1000 10V
DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE
30 Pulsed 25 20 15 10 5 0 0 5 10 15 20 ID = 32 A
ID - Drain Current - A
VGS - Gate to Source Voltage - V
4
Data Sheet D15970EJ4V0DS
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2SK3642
RDS(on) - Drain to Source On-state Resistance - mΩ
DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE
25
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
1 00 0 0
20 VGS = 4.5 V 15
Ciss, Coss, Crss - Capacitance - pF
C iss 10 0 0 C o ss 100 C rss VGS = 0 V f = 1 MHz 0 .1 1 10 10 0
10
10 V
5 ID = 32 A Pulsed 0 -50 0 50 100 150
10 0 .0 1
Tch - Channel Temperature - °C
VDS - Drain to Source Voltage - V
SWITCHING CHARACTERISTICS
1000
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
30 12 10 V D D = 24 V 15 V VGS 8 6 4 2 V DS 0 0 5 10 15 I D = 64 A 0 20 25
VDS - Drain to Source Voltage - V
25 20 15 10 5
100 td(off) tf 10 t d(on)
tr 1 0.1 1 10 100
ID - Drain Current - A
QG - Gate Charge - nC
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
1000
REVERSE RECOVERY TIME vs. DIODE FORWARD CURRENT
1000
100
trr - Reverse Recovery Time - ns
IF - Diode Forward Current - A
di/dt = 100 A/µs VGS = 0 V
10
VGS = 10 V
100
1
0V
10
0.1 Pulsed 0.01 0 0.5 1 1.5
1 0.1 1 10 100
VF(S-D) - Source to Drain Voltage - V
IF - Diode Forward Current - A
Data Sheet D15970EJ4V0DS
5
VGS - Gate to Source Voltage - V
td(on), tr, td(off), tf - Switching Time - ns
V DD = 15 V V GS = 10 V R G = 10 Ω
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2SK3642
SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD
100
SINGLE AVALANCHE ENERGY DERATING FACTOR
120 V DD = 15 V V GS = 20 → 0 V R G = 25 Ω IAS ≤ 25 A
IAS - Single Avalanche Current - A
Energy Derating Factor - %
I AS = 25 A 10 E AS = 62 m J
100 80 60 40 20 0
1 V D D = 15 V V G S = 20 → 0 V R G = 25 Ω Starting T ch = 25°C 0.1 1 10
0.1 0.01
25
50
75
100
125
150
L - Inductive Load - mH
Starting Tch - Starting Channel Temperature - °C
6
Data Sheet D15970EJ4V0DS
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2SK3642
PACKAGE DRAWING (Unit: mm)
TO-252 (MP-3ZK)
1.0 TYP.
6.5±0.2 5.1 TYP. 4.3 MIN. 4
2.3±0.1 0.5±0.1 No Plating
6.1±0.2 10.4 MAX. (9.8 TYP.)
4.0 MIN.
1
0.8
2
3
No Plating 0 to 0.25 0.5±0.1 1.0
1.14 MAX. 2.3 2.3
0.76±0.12
1. Gate 2. Drain 3. Source 4. Fin (Drain)
EQUIVALENT CIRCUIT
Drain
Gate
Body Diode
Gate Protection Diode
Source
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device.
0.51 MIN.
Data Sheet D15970EJ4V0DS
7
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2SK3642
• The information in this document is current as of January, 2005. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. • No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may appear in this document. • NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others. • Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. • While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC Electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. • NEC Electronics products ar
