4-Channel Integrated LCD Supply

® ISL97652 Data Sheet December 21, 2006 FN9287.0 4-Channel Integrated LCD Supply with Dual VCOM Amplifiers The ISL97652 represents a high power, integrated LCD supply IC targeted at large panel LCD displays. The ISL97652 integrates a high power, boost converter for AVDD generation, delay switch, regulated VON and VOFF charge pumps, VON slicing circuitry, a buck regulator for logic supply generation and dual high power VCOM amplifiers. Operating at 650kHz or 1.3MHz, the AVDD boost converter features a 2.8A boost FET. A short circuit protected AVDD delay switch is integrated to provide sequencing of the AVDD output. Feedback is taken from the far side of the delay FET for improved regulation and an OVP circuit protects output side components. The boost features programmable soft-start. The asynchronous buck converter features an integrated 2.5A FET. It also operates from the 650kHz or 1.3MHz internal clock and features separate enable and soft-start control. The dual charge pump controllers used for VON and VOFF generation uses the full FOSC switching frequency to allow the use of small output components for board space efficiency. VON is further processed through an integrated VON-SLICE circuit for reduced flicker. The integrated amplifiers feature high slew-rate and high output current capability. They are permanently enabled when AVIN is present. Available in the 48 Ld 7mmx7mm QFN package, the ISL97652 is specified for ambient operation over the -40°C to +85°C temperature range. Features • 8V to 15V input supply • AVDD boost up to 19.5V (OVP threshold), with integrated 2.8APEAK FET • Overvoltage protection (OVP) • 2A integrated AVDD delay FET, with short circuit protection • Dual charge pump controllers for VON and VOFF • VLOGIC buck with integrated 2.5APEAK FET • VON slicing • Dual high speed VCOM amplifiers • 650kHz/1.3MHz switching frequency • Integrated sequencing • UVLO and OTP protection • Thermally enhanced 7x7 QFN package • Pb-free plus anneal available (RoHS compliant) Applications • LCD-TVs (up to 40”) • Industrial/medical LCD displays Pinout ISL97652 (48 LD QFN) TOP VIEW 47 OGND 48 NEG1 46 OUT2 44 NEG2 45 POS2 42 SWO 43 AVIN 38 SW2 37 SW1 36 PGND3 35 PGND2 34 PGND1 33 EN1 32 EN2 THERMAL PAD 31 VC 30 SS 29 DLY2 28 FREQ 27 VDC 26 PVIN2 25 PVIN1 SUP 13 DRVN 14 AGND 15 FBN 16 REF 17 DLY1 18 SSB 19 VCB 20 FBB 21 CBOOT 22 SWB1 23 SWB2 24 39 SWI Ordering Information PART NUMBER (Note) ISL97652IRZ ISL97652IRZ-T PART MARKING ISL97652IRZ ISL97652IRZ TAPE & REEL PACKAGE (Pb-Free) PKG. DWG. # POS1 1 OUT1 2 VGL 3 CE 4 VFLK 5 VDPM 6 RE 7 VGHM 8 VGH 9 FBP 10 GND 11 DRVP 12 48 Ld 7x7 QFN L48.7x7 13” 48 Ld 7x7 QFN L48.7x7 (4k pcs) 13” 48 Ld 7x7 QFN L48.7x7 (1k pcs) ISL97652IRZ-TK ISL97652IRZ NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. 40 SUI 41 FB ISL97652 Absolute Maximum Ratings (TA = +25°C) Maximum Pin Voltages, All Pins Except Below . . . . . . . -0.3 to 6.5V SW, SUP, DRVP, DRVN, SUI, SWO, AVIN, POS1, NEG1, OUT1, POS2, NEG2, OUT2, VGL . . . . . . . . . . . . . . . . . . -0.3 to 22V SWI,SW2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 24V SUI . . . . . . . . . . . . . . . . . . . . . . . V(SWI) - 6.5V to V(SWI) +0.3V PVIN, SWB, VFLK, VDPM, EN1, EN2, FREQ . . . . . -0.3 to 15.5V VGH, VGHM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 36V Thermal Information Thermal Resistance θJA (°C/W) θJC (°C/W) 7x7 QFN Package (Notes 1, 2) . . . . . . 26 1.5 Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C Power Dissipation TA ≤ +25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3.7W TA = +70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.0W TA = +85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.4W Recommended Operating Conditions Input Voltage Range, VIN . . . . . . . . . . . . . . . . . . . . . . . . . 8V to 15V Boost Output Voltage, AVDD . . . . . . . . . . . . . . . . . . . . . . . . . . +15V VON Output Range, VON . . . . . . . . . . . . . . . . . . . . . . +15V to +32V VOFF Output Range, VOFF . . . . . . . . . . . . . . . . . . . . . . . -15V to -5V Logic Output Voltage Range, VLOGIC . . . . . . . . . . . . +1.5V to +3.3V Input Capacitance, CIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2x10µF Boost Inductor, L1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3µH-10µH Output Capacitance, COUT . . . . . . . . . . . . . . . . . . . . . . . . . . 2x22µF Buck Inductor, L2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3µH-10µH Operating Ambient Temperature Range . . . . . . . . . -40°C to +85°C Operating Junction Temperature Range . . . . . . . . -40°C to +125°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. +150°C max junction temperature is intended for short periods of time to prevent shortening the lifetime. Operation close to +150°C junction may trigger the shutdown of the device even before +150°C, since this number is specified as typical. NOTES: 1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications PARAMETER SUPPLY PINS PVIN VSUP VGH AVIN PIVIN Supply Voltage VIN = 12V, VBOOST = VSUP = 15V, VON = 25V, VOFF = -8V, over temperature from -40°C to +85°C, unless otherwise stated. DESCRIPTION CONDITIONS MIN TYP MAX UNIT 8 8 8 4.5 Enabled, no switching Disabled 12 15 20 30 20 V V V V mA µA mA µA mA V V kHz kHz Charge Pumps Positive Supply VON-SLICE Positive Supply Op-AmpV Positive Supply Quiescent Current into PVIN 3 0.5 6 5 0.5 5 7 ISUP VSUP Supply Current Enabled, no switching and VPOUT = VSUP Disabled IAVIN VREF AVIN Supply Current Reference Voltage For AVIN range TA = +25°C 1.252 1.240 1.265 1.265 1300 650 1.278 1.290 1500 750 FOSC Oscillator Frequency for Buck, Boost, VON and VOFF Functions FREQ = VIN FREQ = GND 1100 550 AVDD BOOST IBOOST EFFBOOST Boost Switch Peak Current Peak Efficiency Boost Peak Current limit See graphs and component recommendations 2.8 91 A % 2 FN9287.0 December 21, 2006 ISL97652 Electrical Specifications PARAMETER rDS(ON) ΔVBOOST/ΔVIN VIN = 12V, VBOOST = VSUP = 15V, VON = 25V, VOFF = -8V, over temperature from -40°C to +85°C, unless otherwise stated. (Continued) DESCRIPTION Switch On Resistance Line Regulation Vin = 8V to 12V at Iload=200mA, see “Typical Performance Curves” on page 6 100mA to 500mA, see “Typical Performance Curves” on page 6 TA = +25°C 1.252 1.240 Dmax_boost Boost Maximum Duty Cycle FOSC = 650kHz FOSC = 1.3MHz Dmin_boost Boost Minimum Duty Cycle FOSC = 650kHz FOSC = 1.3MHz AVDD DELAY SWITCH RPD SWIMAX IdelayFET FETtimeout Ipull-Down VGATE SWILEAK VDSOK VDSHYS VLOGIC BUCK IBUCK EFFBUCK RDS(ON) BK ΔVBUCK/ΔVIN Buck Switch Current Peak Efficiency Switch On Resistance Line Regulation Vin = 8V to 12V at Iload = 200mA, see “Typical Performance Curves” on page 6 200mA to 1000mA, see “Typical Performance Curves” on page 6 TA = +25°C 1.252 1.240 Dmax_buck Buck Maximum Duty Cycle FOSC = 650kHz FOSC = 1.3MHz Dmin_buck Buck Minimum Duty Cycle FOSC = 650kHz FOSC = 1.3MHz NEGATIVE (VOFF) CHARGE PUMP VOFF ILoad_NCP_min VOFF Output Voltage Range External Load Driving Capability 1X Charge Pump VSUP >5V VSUP + 1.4V 30 0 V mA Current limit See graphs and component recommendations 2.5 85 170 0.05 250 A % mΩ % RDS(ON) Maximum SWI Voltage Delay FET RMS Current Limit Delay FET Fault Timeout Pull-down Current Applied to FET Gate and SUI SUI Voltage When Switch is Fully Switched On SWI Leakage Current When Disabled VIN = 15V, SWI = 21V, SWO = 0V, EN1 = EN2 = 0V 15.7 1.4 I(SWO) > IdelayFET 21 1.5 2 100 65 V(SWI) - 5 1 180 240 mΩ V A µs µA V µA V V CONDITIONS MIN TYP 125 0.08 MAX 200 UNIT mΩ % ΔVBOOST/ΔIOUT VFB Load Regulation Boost Feedback Voltage 0.5 1.265 1.265 90 85 10 20 1.278 1.290 % V V % % % % Drain Source Voltage When Boost is Enabled SWI =16.5V Hysteresis on VDSOK Spec SWI =16.5V ΔVBUCK/ΔIOUT VFBB Load Regulation FBL Regulation Voltage 0.1 1.265 1.265 90 85 10 20 1.278 1.290 % V V % % % % 3 FN9287.0 December 21, 2006 ISL97652 Electrical Specifications PARAMETER Ron(DRVN)H RON(DRVN)L Ipu(DRVN)lim Ipd(DRVN)lim I(DRVN)leak VFBN VIN = 12V, VBOOST = VSUP = 15V, VON = 25V, VOFF = -8V, over temperature from -40°C to +85°C, unless otherwise stated. (Continued) DESCRIPTION High-Side Driver ON Resistance at DRVN Low-Side Driver ON Resistance at DRVN Pull-Up Current Limit in DRVN Pull-Down Current Limit in DRVN Leakage Current in DRVN FBN Regulation Voltage CONDITIONS I(DRVN) = +60mA I(DRVN) = -60mA V(DRVN) = 0V to