Boost VON Slice VCOM

® ISL97645 Data Sheet April 11, 2006 FN9263.0 Boost + VON Slice + VCOM The ISL97645 represents an integrated DC/DC regulator for monitor and notebook applications with screen sizes up to 20”. The device integrates a boost converter for generating AVDD, a VON slice circuit, and a high performance VCOM amplifier. The boost converter features a 2.6A FET and has user programmable soft-start and compensation. With efficiencies up to 92%, the AVDD is user selectable from 7V to 20V. The VON slice circuit can control gate voltages up to 30V. High and low levels are programmable, as well as discharge rate and timing. The integrated VCOM features high speed and drive capability. With 30MHz bandwidth and 50V/µs slew rate, the VCOM amplifier is capable of driving 400mA peaks, and 100mA continuous output current. Features • 2.7V to 5.5V Input • 2.6A Integrated Boost for Up to 20V AVDD • Integrated VON Slice • 600kHz/1.2MHz fS • VCOM Amplifier - 30MHz BW - 50V/µs SR - 400mA Peak Output Current • UV and OT Protection • 24 Ld 4x4 QFN • Pb-Free Plus Anneal Available (RoHS Compliant) Applications • LCD Monitors (15”+) • Notebook Display (up to 16”) Pinout ISL97645 (24 LD 4x4 QFN) TOP VIEW ENABLE PGND Ordering Information TEMP. RANGE PART NUMBER PART (°C) (Note) MARKING ISL97645IRZ 18 17 16 15 14 13 LX VIN FREQ COMP SS NC VGH RE CE FB PACKAGE (Pb-Free) PKG. DWG. # L24.4x4D 24 GND VGH_M VFLK VDPM VDD_1 VDD_2 1 2 3 4 5 6 7 OUT 23 22 21 20 19 97645IRZ -40 to 85 24 Ld 4x4 QFN ISL97645IRZ-T 97645IRZ -40 to 85 24 Ld 4x4 QFN L24.4x4D 6k pc Tape & Reel ISL97645IRZ-TK 97645IRZ -40 to 85 24 Ld 4x4 QFN L24.4x4D 1k pc Tape & Reel NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 8 NEG 9 POS 10 AGND 11 NC 12 NC 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL97645 Pin Descriptions PIN NUMBER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 PIN NAME GND VGH_M VFLK VDPM VDD_1 VDD_2 OUT NEG POS AGND NC NC NC SS COMP FREQ VIN LX ENABLE FB PGND CE RE VGH Boost Converter Soft-start. Connect a capacitor between this pin and GND to set the soft-start time. Boost Converter Compensation Pin. Connect a series resistor and capacitor between this pin and GND to optimize transient response. Boost Converter Frequency Select. Boost Converter Power Supply Boost Converter Switching Node Chip Enable Pin. Connect to Vin for normal operation, GND for shutdown. Boost Converter Feedback Boost Converter Power Ground Gate Pulse Modulator Delay Control. Connect a capacitor between this pin and GND to set the delay time. Gate Pulse Modulator Slew Control. Connect a resistor between this pin and GND to set the falling slew rate. Gate Pulse Modulator High Voltage Input Ground Gate Pulse Modulation Output Gate Pulse Modulation Control Input Gate Pulse Modulation Enable Gate Pulse Modulation Lower Voltage Input VCOM Amplifier Supply VCOM Amplifier Output VCOM Amplifier Inverting Input VCOM Amplifier Noninverting Input VCOM Amplifier Ground FUNCTION 2 FN9263.0 April 11, 2006 ISL97645 Absolute Maximum Ratings Lx to GND, AGND and PGND . . . . . . . . . . . . . . . . . . . . -0.5 to +25V VDD2, OUT, NEG and POS to GND, AGND and PGND. . . . . . . . . . . . . . . . . . . . . -0.5 to +25V VDD1, VGH and VGH_M to GND, AGND and PGND. . . . . . . . . . . . . . . . . . . . . -0.5 to +32V Differential Voltage Between POS and NEG . . . . . . . . . . . . . . . ±6V Voltage Between GND, AGND and PGND . . . . . . . . . . . . . . . ±0.5V All Other Pins to GND, AGND and PGND . . . . . . . . . . -0.5 to +6.5V Input, Output, or I/O Voltage . . . . . . . . . . . GND -0.3V to VIN + 0.3V Thermal Information Thermal Resistance θJA (°C/W) θJC (°C/W) 4x4 QFN Package (Notes 1, 2) . . . . . . 39 2.5 Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Maximum Continuous Junction Temperature . . . . . . . . . . . . 125°C Power Dissipation TA ≤ 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.44W TA = 70°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.34W TA = 85°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.98W TA = 100°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.61W Recommended Operating Conditions Input Voltage Range, VS . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V Boost Output Voltage Range, AVDD . . . . . . . . . . . . . . . . . 8V to 20V Input Capacitance, CIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22µF Boost Inductor, L1 . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3µH to 10µH Output Capacitance, COUT . . . . . . . . . . . . . . . . . . . . . . . . . . 2x22µF Operating Ambient Temperature Range . . . . . . . . . .-40°C to +85°C Operating Junction Temperature . . . . . . . . . . . . . . .-40°C to +125°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications SYMBOL GENERAL VS IS_DIS IS UVLO VIN = ENABLE = 5V, VDD1 = VDD2 = 14V, VGH = 25V, AVDD = 10V, TA = -40°C to 85°C Unless Otherwise Noted. TEST CONDITION MIN TYP MAX UNIT PARAMETER VINInput Voltage Range VIN Supply Currents when Disabled ENABLE = 0V VIN Supply Currents Undervoltage Lockout Threshold ENABLE = 5V, LX not switching VIN2 Rising VIN2 Falling 2.7 3.3 0.2 1 5.5 2 V µA mA 2.3 2.2 2.45 2.35 140 100 2.6 2.5 V V °C °C OTR OTF Thermal Shutdown Temperature Temperature Rising Temperature Falling LOGIC INPUT CHARACTERISTICS - ENABLE, VFLK, FREQ, VDPM VIL VIH RIL Low Voltage Threshold High Voltage Threshold Pull-Down Resistor Enabled, Input at Vin 2.2 150 250 400 0.8 V V kΩ STEP-UP SWITCHING REGULATOR AVDD ∆AVDD/∆IOUT ∆AVDD/∆VIN ACCAVDD VFB Output Voltage Range Load Regulation Line Regulation Overall Accuracy (Line, Load, Temperature) Feedback Voltage (VFB) 50mA < ILOAD < 250mA ILOAD = 150mA, 3.0 < VIN < 5.5V 10mA < ILOAD < 300mA, 3.0 < Vin < 5.5V, 0°C < TA < 85°C ILOAD = 100mA, TA = 25°C ILOAD = 100mA, TA = -40°C to +85°C -3 1.20 1.19 1.21 1.21 VIN*1.25 0.2 0.15 0.25 3 1.22 1.23 20 V % %/V % V V 3 FN9263.0 April 11, 2006 ISL97645 Electrical Specifications SYMBOL IFB RDS(ON) EFF ILIM DMAX FOSC VIN = ENABLE = 5V, VDD1 = VDD2 = 14V, VGH = 25V, AVDD = 10V, TA = -40°C to 85°C Unless Otherwise Noted. (Continued) TEST CONDITION MIN TYP 250 150 92 2.1 85 FREQ = 0V FREQ = VIN2 ISS Soft-Start Slew Current SS < 1V, TA = 25°C 550 1.0 2.6 90 650 1.2 2.75 800 1.4 3.1 MAX 500 300 UNIT nA mΩ % A % kHz MHz µA PARAMETER FB Input Bias Current Switch On Resistance Peak Efficiency Switch Current Limit Max Duty Cycle Oscillator Frequency VCOM AMPLIFIER RLOAD = 10k, CLOAD = 10pF, Unless Otherwise Stated VSAMP ISAMP VOS IB CMIR CMRR PSRR VOH VOH VOL VOL ISC SR BW Supply Voltage Supply Current Offset Voltage Noninverting Input Bias Current Common Mode Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Output Voltage Swing High Output Voltage Swing High Output Voltage Swing Low Output Voltage Swing Low Output Short Circuit Current Slew Rate Gain Bandwidth -3dB gain point Iout(source) = 5mA Iout(source) = 50mA Iout(sink) = 5mA Iout(sink) = 50mA 250 0 50 70 70 85 VDD2-50 VDD2-450 50 450 400 50 30 4.5 3 3 0 20 100 VDD2 20 V mA mV nA V dB dB mV mV mV mV mA V/µs MHz GATE PULSE MODULATOR VGH IVGH VGH Voltage VGH Input Current VFLK = 0 RE = 33kΩ, VFLK = VDD1 VDD1 IVDD1 RONVGH IDIS_VGH TDEL NOTES: 1. Nominal discharge current = 300/(RE+5kΩ). 2. Nominal delay time = 4000*CE. VDD1 Voltage VDD1 Input Current VGH to VGH_M On Resistance VGH_M Discharge Current (Note 1) RE = 33kΩ DELAY Time (Note 2) CE = 470pF, RE = 33kΩ 3 -2 0.1 70 8 1.9 7 260 40 VGH - 2 2 30 V µA µA V µA Ω mA µs 4 FN9263.0 April 11, 2006 ISL97645 Typical Performance Curves I 100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10 0 0 200 400 FOSC = 650kHz LOAD REGULATION (%) FOSC = 1.2MHz 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 FOSC = 1.2MHz FOSC = 650kHz 600 800 IAVDD (mA) 1000 1200 -0.9 0 200 400 600 800 IAVDD (mA) 1000 1200 FIGURE 1. AVDD EFFICIENCY vs IAVDD FIGURE 2. AVDD LOAD REGULATION vs IAVDD 10.5 10.45 AVDD 150mA 10.4 AVDD (V) 10.35 10.3 10.25 10.2 10.15 AVDD 500mA L = 10µH, COUT = 40µF, CCOMP = 2.2nF, RCOMP = 10k IAVDD AVDD (AC COUPLED) 3 3.5 4.0 4.5 VIN (V) 5.0 5.5 6.0 FIGURE 3. LINE REGULATION AVDD vs VIN FIGURE 4. BOOST CONVERTER TRANSIENT RESPONSE CE = 1pF, RE = 100k CE = 1000pF, RE = 100k VGH_M VGH_M VFLK VFLK FIGURE 5. GPM CIRCUIT WAVEFORM FIGURE 6. GPM CIRCUIT WAVEFORM 5 FN9263.0 April 11, 2006 ISL97645 Typical Performance Curves (Continued) CE = 10pF, RE = 100k CE = 10pF, RE = 150k VGH_M VGH_