Boost + LDO + VON Slice + VCOM

® ISL97644 Data Sheet April 11, 2006 FN9228.0 Boost + LDO + VON Slice + VCOM The ISL97644 represents an integrated DC/DC regulator for monitor and notebook applications with screen sizes up to 20”. The device integrates a boost converter for generating AVDD, a VON slice circuit, an integrated logic LDO and a high performance VCOM amplifier. The boost converter features a 2.6A FET and has user programmable soft-start and compensation. With efficiencies up to 92%, the AVDD is user selectable from 7V to 20V. The logic LDO includes a 350mA FET for driving the low voltage needed by the external digital circuitry. The VON slice circuit can control gate voltages up to 30V. High and low levels are programmable, as well as discharge rate and timing. The integrated VCOM features high speed and drive capability. With 30MHz bandwidth and 50V/µs slew rate, the VCOM amplifier is capable of driving 400mA peaks, and 100mA continuous output current. Features • 3V to 5.5V Input • 2.6A Integrated Boost for Up to 20V AVDD • Integrated VON Slice • 350mA VLOGIC LDO - 2.5V, 2.85V, 3.3V Output Voltage Selectable • 600kHz/1.2MHz fS • VCOM Amplifier - 30MHz BW - 50V/µs SR - 400mA Peak Output Current • UV and OT Protection • 24 Ld 4x4 QFN • Pb-Free Plus Anneal Available (RoHS Compliant) Applications • LCD Monitors (15”+) • Notebook Display (up to 16”) Pinout ISL97644 (24 LD 4x4 QFN) TOP VIEW ENABLE PGND Ordering Information TEMP. RANGE PART NUMBER PART (°C) (Note) MARKING ISL97644IRZ 18 17 16 15 14 13 LX VIN_2 FREQ COMP SS VIN_1 VGH RE CE 24 GND VGH_M VFLK VDPM VDD_1 VDD_2 1 2 3 4 5 6 7 OUT 23 22 21 20 FB PACKAGE (Pb-Free) PKG. DWG. # L24.4x4D 19 97644IRZ -40 to +85 24 Ld 4x4 QFN ISL97644IRZ-T 97644IRZ -40 to +85 24 Ld 4x4 QFN L24.4x4D 6k pc Tape & Reel ISL97644IRZ-TK 97644IRZ -40 to +85 24 Ld 4x4 QFN L24.4x4D 1k pc Tape & Reel NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 8 NEG 9 POS 10 AGND 11 ADJ 12 LDO_OUT 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL97644 Pin Descriptions PIN NUMBER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 PIN NAME GND VGH_M VFLK VDPM VDD_1 VDD_2 OUT NEG POS AGND ADJ LDO_OUT VIN_1 SS COMP FREQ VIN_2 LX ENABLE FB PGND CE RE VGH Ground Gate Pulse Modulation Output Gate Pulse Modulation Control Input Gate Pulse Modulation Enable Gate Pulse Modulation Lower Voltage Input VCOM Amplifier Supply VCOM Amplifier Output VCOM Amplifier Inverting Input VCOM Amplifier Noninverting Input VCOM Amplifier Ground LDO Output Adjust Pin LDO Output LDO power supply Boost Converter Soft-start. Connect a capacitor between this pin and GND to set the soft-start time. Boost Converter Compensation Pin. Connect a series resistor and capacitor between this pin and GND to optimize transient response. Boost Converter Frequency Select. Boost Converter Power Supply Boost Converter Switching Node Chip Enable Pin. Connect to VIN1 for normal operation, GND for shutdown. Boost Converter Feedback Boost Converter Power Ground Gate Pulse Modulator Delay Control. Connect a capacitor between this pin and GND to set the delay time. Gate Pulse Modulator Slew Control. Connect a resistor between this pin and GND to set the falling slew rate. Gate Pulse Modulator High Voltage Input FUNCTION 2 FN9228.0 April 11, 2006 ISL97644 Absolute Maximum Ratings Lx to GND, AGND and PGND . . . . . . . . . . . . . . . . . . . . -0.5 to +25V VDD2, OUT, NEG and POS to GND, AGND and PGND . . . . . . . . . . . . . . . . . . . . . -0.5 to +25V VDD1, VGH and VGH_M to GND, AGND and PGND . . . . . . . . . . . . . . . . . . . . . -0.5 to +32V Differential Voltage Between POS and NEG . . . . . . . . . . . . . . . ±6V Voltage Between GND, AGND and PGND . . . . . . . . . . . . . . . ±0.5V All Other Pins to GND, AGND and PGND . . . . . . . . . . -0.5 to +6.5V Input, Output, or I/O Voltage . . . . . . . . . . . GND -0.3V to VIN + 0.3V Thermal Information Thermal Resistance θJA (°C/W) θJC (°C/W) 4x4 QFN Package (Notes 1, 2) . . . . . . 39 2.5 Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Maximum Continuous Junction Temperature . . . . . . . . . . . . 125°C Power Dissipation TA ≤ 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.44W TA = 70°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.34W TA = 85°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.98W TA = 100°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.61W Recommended Operating Conditions Input Voltage Range, VS . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 5.5V Boost Output Voltage Range, AVDD . . . . . . . . . . . . . . . . . 8V to 20V Input Capacitance, CIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22µF Boost Inductor, L1 . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3µH to 10µH LDO Output Capacitance. . . . . . . . . . . . . . . . . . . . . . .2.2µF to 10µF Output Capacitance, COUT . . . . . . . . . . . . . . . . . . . . . . . . . . 2x22µF Operating Ambient Temperature Range . . . . . . . . . .-40°C to +85°C Operating Junction Temperature . . . . . . . . . . . . . . .-40°C to +125°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications SYMBOL GENERAL VS IS_DIS IS UVLO VIN1 = VIN2 = ENABLE = 5V, VDD1 = VDD2 = 14V, VGH = 25V, AVDD = 10V, TA = -40°C to 85°C Unless Otherwise Noted. TEST CONDITION MIN TYP MAX UNIT PARAMETER VIN1, VIN2 Input Voltage Range Sum of VIN1, VIN2 Supply Currents when Disabled Sum of VIN1, VIN2 Supply Currents Undervoltage Lockout Threshold See separate LDO specifications ENABLE = 0V ENABLE = 5V, LX not switching, LDO not loaded VIN2 Rising VIN2 Falling 3.0 5.0 0.2 1 5.5 2 V µA mA 2.3 2.2 2.45 2.35 140 100 2.6 2.5 V V C C OTR OTF Thermal Shutdown Temperature Temperature Rising Temperature Falling LOGIC INPUT CHARACTERISTICS - ENABLE, VFLK, FREQ, VDPM VIL VIH RIL Low Voltage Threshold High Voltage Threshold Pull-Down Resistor Enabled, Input at VIN2 2.2 150 250 400 0.8 V V kΩ STEP-UP SWITCHING REGULATOR AVDD ∆AVDD/∆IOUT ∆AVDD/∆VIN ACCAVDD Output Voltage Range Load Regulation Line Regulation Overall Accuracy (Line, Load, Temperature) 50mA < ILOAD < 250mA ILOAD = 150mA, 3.0 < VIN1 < 5.5V 10mA < ILOAD < 300mA, 3.0 < VIN1 < 5.5V, 0°C < TA < 85°C -3 VIN*1.25 0.2 0.15 0.25 3 20 V % %/V % 3 FN9228.0 April 11, 2006 ISL97644 Electrical Specifications SYMBOL VFB VIN1 = VIN2 = ENABLE = 5V, VDD1 = VDD2 = 14V, VGH = 25V, AVDD = 10V, TA = -40°C to 85°C Unless Otherwise Noted. (Continued) TEST CONDITION ILOAD = 100mA, TA = 25°C ILOAD = 100mA, TA = -40°C to +85°C IFB RDS(ON) EFF ILIM DMAX FOSC FB Input Bias Current Switch On Resistance Peak Efficiency Switch Current Limit Max Duty Cycle Oscillator Frequency FREQ = 0V FREQ = VIN2 ISS Soft-Start Slew Current SS < 1V, TA = 25°C 2.1 85 550 1.0 MIN 1.20 1.19 TYP 1.21 1.21 250 150 92 2.6 90 650 1.2 2.75 800 1.4 3.1 MAX 1.22 1.23 500 300 UNIT V V nA mΩ % A % KHz MHz µA PARAMETER Feedback Voltage (VFB) LDO REGULATOR VSL Input Voltage Range VIN1 ADJ = LDO_OUT ADJ OPEN ADJ = 0V VLDO Output Voltage ADJ = GND, ILDO = 1mA ADJ = GND, ILDO = 350mA ADJ OPEN, ILDO = 1mA ADJ OPEN, ILDO = 350mA ADJ = LDO_OUT, ILDO = 1mA ADJ = LDO_OUT, ILDO = 350mA ACCLDO ∆VLDO/∆VIN ∆VLDO/∆IOUT VDO ILIML Overall Accuracy Line Regulation Load Regulation Dropout Voltage Current Limit 1mA < ILDO < 350mA ILDO = 1mA, 3.0V < VIN1 < 5.5V 1mA < ILDO < 350mA Output drops by 2%, ILDO = 350mA Output drops by 2% 350 -4 2 0.75 300 400 500 3.0 3.35 3.8 3.31 3.29 2.86 2.84 2.51 2.49 4 5.5 5.5 5.5 V V V V V V V V V % mV/V % mV mA VCOM AMPLIFIER RLOAD = 10K, CLOAD = 10pF, Unless Otherwise Stated VSAMP ISAMP VOS IB CMIR CMRR PSRR VOH VOH VOL VOL Supply Voltage Supply Current Offset Voltage Noninverting Input Bias Current Common Mode Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Output Voltage Swing High Output Voltage Swing High Output Voltage Swing Low Output Voltage Swing Low Iout(source) = 5mA Iout(source) = 50mA Iout(sink) = 5mA Iout(sink) = 50mA 0 50 70 70 85 VDD2-50 VDD2-450 50 450 4.5 3 3 0 20 100 VDD2 20 V mA mV nA V dB dB mV mV mV mV 4 FN9228.0 April 11, 2006 ISL97644 Electrical Specifications SYMBOL ISC SR BW VIN1 = VIN2 = ENABLE = 5V, VDD1 = VDD2 = 14V, VGH = 25V, AVDD = 10V, TA = -40°C to 85°C Unless Otherwise Noted. (Continued) TEST CONDITION MIN 250 TYP 400 50 -3dB gain point 30 MAX UNIT mA V/µs MHz PARAMETER Output Short Circuit Current Slew Rate Gain Bandwidth GATE PULSE MODULATOR VGH IVGH VGH Voltage VGH Input Current VFLK = 0 RE = 33k