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Part Number |
ISL97536 |
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Manufacturer |
Intersil Corporation |
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Semiconductor DataSheet |
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DataSheet View |
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®
ISL97536
Data Sheet October 5, 2006 FN6279.0
Monolithic 1A Step-Down Regulator with Low Quiescent Current
The ISL97536 is a synchronous, integrated FET 1A step-down regulator with internal compensation. It operates with an input voltage range from 2.5V to 6V, which accommodates supplies of 3.3V, 5V, or a Li-Ion battery source. The output can be externally set from 0.8V to VIN with a resistive divider. The ISL97536 features PWM control with a 1.4MHz typical switching frequency. The typical no load quiescent current is only 500µA. Additional features include a 100ms Power-OnReset output, <1µA shutdown current, short-circuit protection, and over-temperature protection. The ISL97536 is available in the 10 Ld MSOP package, making the entire converter occupy less than 0.15in2 of PCB area with components on one side only. The 10 Ld MSOP package is specified for operation over the full -40°C to +85°C temperature range.
Features
• Less than 0.15in2 footprint for the complete 1A converter • Components on one side of PCB • Max height 1.1mm MSOP10 • 100ms Power-On-Reset output (POR) • Internally-compensated voltage mode controller • Up to 95% efficiency • <1µA shutdown current • 500µA quiescent current • Hiccup mode overcurrent and over-temperature protection • Pb-free plus anneal available (RoHS compliant)
Applications
• PDA and pocket PC computers • Bar code readers • Cellular phones
Ordering Information
PART NUMBER ISL97536IUZ (Note) PART MARKING 7536Z TAPE & REEL PACKAGE PKG. DWG. #
• Portable test equipment • Li-Ion battery powered devices • Small form factor (SFP) modules
10 Ld MSOP MDP0043 (Pb-free)
ISL97536IUZ-TK 7536Z (Note) ISL97536IUZ-T (Note) 7536Z
13” 10 Ld MSOP MDP0043 (1k pcs) (Pb-free) 13” 10 Ld MSOP MDP0043 (2.5k pcs) (Pb-free)
Pinout and Typical Application Diagram
ISL97536 (10 LD MSOP) TOP VIEW
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
C1 10µF VO (1.8V@600mA) VS (2.5V-6V) L1 1.8µH R3 100Ω C3 0.1µF C2 10µF
1 SGND 2 PGND 3 LX 4 VIN 5 VDD R4 R5
FB 10 VO 9 POR 8 EN 7 RSI 6 100kΩ 100kΩ
R2* 100kΩ R1* 124kΩ
C4 470pF POR EN
RSI R6 100kΩ
* VO = 0.8V * (1 + R1/R2)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL97536
Absolute Maximum Ratings (TA = +25°C)
VIN, VDD, PG to SGND . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V LX to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VIN + +0.3V) SYNC, EN, VO, FB to SGND . . . . . . . . . . . . . -0.3V to (VIN + +0.3V) PGND to SGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1A
Thermal Information
Thermal Resistance (Typical, Note 1) θJA (°C/W) MSOP10 Package . . . . . . . . . . . . . . . . . . . . . . . . . . 130 Operating Ambient Temperature . . . . . . . . . . . . . . . .-40°C to +85°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER DC CHARACTERISTICS VFB IFB VIN, VDD VIN,OFF VIN,ON IDD
VDD = VIN = VEN = 3.3V, C1 = C2 = 10µF, L = 1.8µH, VO = 1.8V (as shown in Typical Application Diagram), TA = -40°C to +85°C unless otherwise specified. CONDITIONS MIN TYP MAX UNIT
DESCRIPTION
Feedback Input Voltage Feedback Input Current Input Voltage Minimum Voltage for Shutdown Maximum Voltage for Start-up Supply Current VIN falling, TA = +25°C only VIN rising, TA = +25°C only VIN = VDD = 5V EN = 0, VIN = VDD = 5V
790
800
810 250
mV nA V V V µA µA mΩ mΩ A °C °C
2.5 2 2.2 400 0.1 70 45 1.5 T rising T falling VEN, VRSI = 0V and 3.3V VDD = 3.3V VDD = 3.3V VFB rising VFB falling ISINK = 3.3mA 86 35 0.8 -1 145 130
6 2.2 2.4 500 3
RDS(ON)-PMOS
PMOS FET Resistance
VDD = 5V, TA = +25°C VDD = 5V, TA = +25°C
RDS(ON)-NMOS NMOS FET Resistance ILMAX TOT,OFF TOT,ON IEN, IRSI VEN1, VRSI1 VEN2, VRSI2 VPOR Current Limit Over-temperature Threshold Over-temperature Hysteresis EN, RSI Current EN, RSI Rising Threshold EN, RSI Falling Threshold Minimum VFB for POR, WRT Targeted VFB Value POR Voltage Drop
1 2.4
µA V V
95
% %
VOLPOR
70
mV
AC CHARACTERISTICS FPWM tRSI tSS tPOR PWM Switching Frequency Minimum RSI Pulse Width Soft-Start Time Power On Reset Delay Time 80 Guaranteed by design 1.25 1.4 25 650 100 120 1.6 50 MHz ns µs ms
2
FN6279.0 October 5, 2006
ISL97536 Pin Descriptions
PIN NUMBER 1 2 3 4 5 6 7 8 9 10 PIN NAME SGND PGND LX VIN VDD RSI EN POR VO FB Negative supply for the controller stage Negative supply for the power stage Inductor drive pin; high current digital output with average voltage equal to the regulator output voltage Positive supply for the power stage Power supply for the controller stage Resets POR timer Enable Power on reset open drain output Output voltage sense Voltage feedback input; connected to an external resistor divider between VO and SGND for variable output PIN FUNCTION
Block Diagram
100Ω 0.1µF
VDD VO 10pF INDUCTOR SHORT + CURRENT SENSE PWM COMPENSATION + PWM COMPARATOR PFM ON-TIME CONTROL CONTROL LOGIC
C4 124k 470pF
VIN
FB
5M
+
100k CLOCK EN 10µF EN SOFTSTART RAMP GENERATOR
P-DRIVER LX 1.8µH 1.8V 0 TO 1A
+ PWM COMPARATOR UNDERVOLTAGE LOCKOUT TEMPERATURE SENSE
N-DRIVER
10µF
5V + –
BANDGAP REFERENCE
SGND POR RSI
+ SYNCHRONOUS RECTIFIER
PGND 100k POR POR
3
FN6279.0 October 5, 2006
ISL97536 Performance Curves and Waveforms
All waveforms are taken at VIN = 3.3V, VO = 1.8V, IO = 600mA with component values shown on page 1 at room ambient temperature, unless otherwise noted.
100 90 80 EFFECIENCY (%) EFFECIENCY (%) 70 60 50 40 30 20 10 0 0 200 400 600 800 1000 VO = 3.3V VO = 2.5V VO = 1.8V VO = 1.2V 100 90 80 70 60 50 40 30 20 10 0 0 200 400 600 IO (mA) 800 1000 VO = 2.5V VO = 1.8V VO = 1.2V
IO (mA)
FIGURE 1. EFFICIENCY vs IO AT 5V VIN
FIGURE 2. EFFICIENCY vs IO AT 3.3V
0.2 0 LOAD REGULATION (%) -0.2 -0.4 -0.6 -0.8 -1 -1.2
200.2
400.2
600.2
800.2
1000.2
1200.2 0 LOAD REGULATION (%) -0.2 -0.4 -0.6 -0.8 -1 -1.2
0
200
400
600
800
1000
1200
VO = 3.3V
VO = 2.5V VO = 1.8V
VO = 1.8V
VO = 2.5V
VO = 1.2V
VO = 1.2V
IO (mA)
IO (mA)
FIGURE 3. LOAD REGULATION vs IO AT 5V VIN
FIGURE 4. LOAD REGULATION vs IO AT 3.3V VIN
2
3
4
5
6
12 10 8 IS (mA) 6 4 2 0 2.5 3
LINE REGULATION (%)
-0.05 -0.1 -0.15 -0.2 -0.25 -0.3 -0.35 VIN (V) VO = 1.8V VO = 1.2V
3.5 VS (V)
4
4.5
5
FIGURE 5. LINE REGULATION vs VIN
FIGURE 6. NO LOAD QUIESCENT CURRENT
4
FN6279.0 October 5, 2006
ISL97536 Performance Curves and Waveforms
(Continued)
All waveforms are taken at VIN = 3.3V, VO = 1.8V, IO = 600mA with component values shown on page 1 at room ambient temperature, unless otherwise noted.
VOUT
LX (2V/DIV) IL (0.5A/DIV)
VIN
∆VO (10mV/DIV)
IIN 0.5µs/DIV
FIGURE 7. START-UP AT IO = 600mA
FIGURE 8. PWM STEADY-STATE OPERATION (IO = 600mA)
SYNC (2V/DIV) LX (2V/DIV) IL (0.5A/DIV)
SYNC (2V/DIV) LX (2V/DIV) IL (0.5A/DIV)
0.2µs/DIV
20ns/DIV
FIGURE 9. EXTERNAL SYNCHRONIZATION TO 2MHz
FIGURE 10. EXTERNAL SYNCHRONIZATION TO 12MHz
IO (200mA/DIV) ∆VO (100mV/DIV)
IO (200mA/DIV) ∆VO (100mV/DIV)
100µs/DIV
50µs/DIV
FIGURE 11. LOAD TRANSIENT RESPONSE (22mA TO 600mA)
FIGURE 12. LOAD TRANSIENT RESPONSE (30mA TO 600mA)
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FN6279.0 October 5, 2006
ISL97536 Performance Curves and Waveforms
(Continued)
All waveforms are taken at VIN = 3.3V, VO = 1.8V, IO = 600mA with component values shown on page 1 at room ambient temperature, unless otherwise noted.
100 80 EFFICIENCY (%) 60 40 20 0 5MHz 12MHz 1 1.4MHz 0.6 VO CHANGES (%) 0.2 0 -0.2 -0.6 0 200 400 600 IO (mA) 800 1K 1.2K 1.4MHz 5MHz 12MHz
0
200
400
600 IO (mA)
800
1K
1.2K
FIGURE 13. EFFICIENCY vs IO
FIGURE 14. LOAD REGULATION
0.5 0.3 VO CHANGES (%) 0.1 1.4MHz -0.1 -0.3 -0.5 5MHz 12MHz
PG
IL
VO
0
200
400
600 VIN (V)
800
1K
1.2K
FIGURE 15. LINE REGULATION @ 500mA
FIGURE 16. OVERCURRENT SHUTDOWN
PG
IL
VO
FIGURE 17. OVERCURRENT HICCUP MODE
6
FN6279.0 October 5, 2006
ISL97536 Applications Information
Product Description
The ISL97536 is a synchronous, integrated FET 1A step-down regulator which operates from an input of 2.5V to 6V. The output voltage is user-adjustable with a pair of external resistors. The internally-compensated controller makes it possible to use only two ceramic capacitors and one inductor to form a complete, very small footprint 1A DC:DC converter. average power dissipation is reduced, thereby reducing the likelihood of damage current and thermal conditions in the IC.
700µ ⋅ V IN tHICCUP ≈ ⎛ - |