Charging System Safety Circuit

® ISL9212B Data Sheet March 21, 2007 FN6399.0 Charging System Safety Circuit The ISL9212B is an integrated circuit (IC) optimized to provide a Li-ion battery redundant safety protection from failures of a charging system. The IC monitors the input voltage, the battery voltage, and the charge current. When any of the three parameters exceeds its limit, the IC turns off an internal P-Channel MOSFET to remove the power from the charging system. In addition to the above protected parameters, the IC also monitors its own internal temperature and turns off the P-Channel MOSFET when the die temperature exceeds +140°C. Together with the battery charger IC and the protection module in a battery pack, the charging system using the ISL9212B has triple-level protection and is two-fault tolerant. The IC is designed to turn on the internal PFET slowly to avoid inrush current at power-up but will turn off the PFET quickly when input overvoltage is detected in order to remove the power before any damage occurs. The ISL9212B has a logic warning output to indicate the fault and an enable input to allow the system to remove the input power. Features • Fully Integrated Protection Circuit for Three Protection Variables - User Programmable Overcurrent Protection Threshold - Input Overvoltage Protection in Less Than 1µs - Battery Overvoltage Protection • High Immunity of False Triggering Under Transients • High Accuracy Protection Thresholds • Warning Output to Indicate the Occurrence of Faults • Enable Input • Thermal Enhanced DFN Package • Pb-Free Plus Anneal Available (RoHS Compliant) Applications • Cell Phones • Digital Still Cameras • PDAs and Smart Phones • Portable Instruments • Desktop Chargers Ordering Information PART NUMBER ISL9212BIRZ* (Note) TEMP. RANGE PART (°C) MARKING 2BZ PACKAGE PKG. DWG. # Related Literature • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” • Technical Brief TB379 “Thermal Characterization of Packaged Semiconductor Devices” • Technical Brief TB389 “PCB Land Pattern Design and Surface Mount Guidelines for QFN Packages” -40 to +85 12 Ld 4x3 TDFN L12.4x3A (Pb-free) ISL9212EVAL1 ISL9212B Evaluation Board *Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Pinout ISL9212B (12 LD 4x3 TDFN) TOP VIEW Typical Application Circuit VIN INPUT VIN VIN OUT ISL6292 BATTERY CHARGER GND WRN NC ISL9212B ILIM VB RVB EN RILIM GND WRN BATTERY PACK + NC 1 2 3 4 5 6 EPAD 12 NC 11 OUT 10 OUT 9 8 7 ILIM VB EN C1 NOTE: EPAD must be electrically connected to the GND pin. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2006. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL9212B Absolute Maximum Ratings (Reference to GND) Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 30V Output and VB Pin (OUT, VB) (Note 1) . . . . . . . . . . . . . . . -0.3 to 7V Other Pins (ILIM, WRN, EN) . . . . . . . . . . . . . . . . . . . . . -0.3 to 5.5V Thermal Information Thermal Resistance (Notes 2, 3) θJA (°C/W) θJC (°C/W) 4x3 TDFN Package . . . . . . . . . . . . . . . 41 3.5 Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C Recommended Operating Conditions Ambient Temperature Range . . . . . . . . . . . . . . . . . . .-40°C to +85°C Supply Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3V to 6.5V Operating Current Range. . . . . . . . . . . . . . . . . . . . . . . . . . 0A to 2A CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. +150°C max junction temperature is intended for short periods of time to prevent shortening the lifetime. Operation close to +150°C junction may trigger the shutdown of the device even before +150°C, since this number is specified as typical. ΝΟΤΕΣ: 1. The maximum voltage rating for the VB pin under continuous operating conditions is 5.5V. All other pins are allowed to operate continuously at the absolute maximum ratings. 2. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 3. θJC, “case temperature” location is at the center of the exposed metal pad on the package underside. See Tech Brief TB379. Electrical Specifications PARAMETER POWER-ON RESET Rising VIN Threshold POR Hysteresis VIN Bias Current VIN Bias Current PROTECTIONS Typical values are tested at VIN = 5V and +25°C Ambient Temperature, maximum and minimum values are guaranteed over the recommended operating conditions, unless otherwise noted. SYMBOL TEST CONDITIONS MIN TYP MAX UNITS VPOR 2.40 - 2.58 100 0.90 60 2.70 1.10 100 V mV mA μA IVIN When enabled When disabled 0.75 30 Input Overvoltage Protection (OVP) Input OVP Hysteresis Input OVP Falling Threshold Input OVP Propagation Delay Overcurrent Protection Overcurrent Protection Blanking Time Battery Overvoltage Protection Threshold Battery OVP Threshold Hysteresis Battery OVP Falling Threshold Battery OVP Blanking Time VB Pin Leakage Current Over-Temperature Protection Rising Threshold Over-Temperature Protection Falling Threshold LOGIC EN Input Logic HIGH EN Input Logic LOW EN Internal Pull Down Resistor WRN Output Logic Low WRN Output Logic High Leakage Current POWER MOSFET ON-Resistance VOVP 6.65 6.55 - 6.80 60 1.00 170 4.34 30 180 140 90 7.00 100 1 1.07 4.40 20 - V mV V μs A μs V mV V μs nA °C °C IOCP BTOCP VBOVP VVB = 3V, RILIM = 25kΩ 0.93 4.28 4.25 BTBOVP VVB = 4.34V - 1.5 100 Sink 5mA current - 200 0.35 - 0.4 400 0.80 1 V V kΩ V μA rDS(ON) 4.6V < VIN < 6.5V - 170 280 mΩ 2 FN6399.0 March 21, 2007 ISL9212B Pin Descriptions VIN (Pins 1, 2) The input power source. The VIN can withstand 30V input. VB (Pin 8) Battery voltage monitoring input. This pin is connected to the battery pack positive terminal via an isolation resistor. GND (Pin 3) System ground reference. ILIM (Pin 9) Overcurrent protection threshold setting pin. Connect a resistor between this pin and GND to set the OCP threshold. WRN (Pin 4) WRN is an open-drain logic output that turns LOW when any protection event occurs. OUT (Pins 10, 11) Output pin. NC (Pins 5, 6, 12) No connection and must be left floating. EPAD The exposed pad at the bottom of the DFN package for enhancing thermal performance. Must be electrically connected to the GND pin. EN (Pin 7) Enable input. Pull this pin to low or leave it floating to enable the IC and force it to high, which will disable the IC. Typical Applications INPUT VIN OUT ISL6292 BATTERY CHARGER C1 PART ISL9212B ILIM VB RVB EN + DESCRIPTION 25kΩ 200kΩ to 1MΩ 1µF/16V X5R ceramic capacitor RILIM RVB C1 RILIM GND WRN BATTERY PACK Block Diagram INPUT VIN Q1 OUT ISL6292 BATTERY CHARGER Q3 Q2 ILIM POR PRE-REG REF R1 FET DRIVER CP2 EA RILIM 0.8V CP1 LOGIC R2 1.2V R3 Q4 Q5 R4 BUF CP3 VB R VB + R5 EN WRN GND FIGURE 1. BLOCK DIAGRAM 3 FN6399.0 March 21, 2007 ISL9212B Typical Operating Performance The test conditions for the Typical Operating Performance are: VIN = 5V, TA = +25°C, RILIM = 25.5kΩ, RVB = 200kΩ, Unless Otherwise Noted. VIN (2V/div) VIN (2V/DIV) VIN (1V/div) VIN (1V/DIV) OUT (1V/div) OUT (1V/DIV) OUT (2V/div) OUT (2V/DIV) LOAD CURRENT Load Current 200mA/DIV (200mA/div) TIME: 5ms/div Time: 5ms/DIV WRN (5V/div) WRN (5V/DIV) TIME: 2µs/DIV Time: 2μs/div FIGURE 2. CAPTURED WAVEFORMS FOR POWER-UP. THE OUTPUT IS LOADED WITH A 10Ω RESISTOR FIGURE 3. CAPTURED WAVEFORMS WHEN THE INPUT VOLTAGE STEPS FROM 6.5V TO 10.5V TIME: 200ms/DIV Time: 200ms/div VIN (2V/div) VIN (2V/DIV) VIN (2V/DIV) VIN (2V/div) OUT (2V/DIV) OUT (2V/div) OUT (2V/DIV) OUT (2V/div) WRN (5V/div) WRN (5V/DIV) WRN (5V/div) WRN (5V/DIV) Time: 5ms/div TIME: 5ms/DIV FIGURE 4. CAPTURED WAVEFORMS WHEN THE INPUT GRADUALLY RISES TO THE INPUT OVERVOLTAGE THRESHOLD FIGURE 5. TRANSIENT WHEN THE INPUT VOLTAGE STEPS FROM 7.5V TO 6.5V TIME: 20s/div Time: 20s/DIV VIN (2V/div) VIN (2V/DIV) VIN (1V/DIV) VIN (1V/div) VB (1V/div) VB (1V/DIV) OUT (2V/div) OUT (2V/DIV) ILIM (1V/div) ILIM(2V/DIV) WRN (5V/DIV) WRN (5V/div) Time: 500μs/div TIME: 500µs/DIV OUT (1V/div) OUT (1V/DIV) WRN (5V/div) WRN (5V/DIV) FIGURE 6. TRANSIENT WAVEFORMS WHEN INPUT STEPS FROM 0V TO 9V FIGURE 7. BATTERY OVERVOLTAGE PROTECTION. THE IC IS LATCHED OFF AFTER 16 COUNTS OF PROTECTION. VB VOLTAGE VARIES BETWEEN 4.3V TO 4.5V 4 FN6399.0 March 21, 2007 ISL9212B Typical Operating Performance TIME: 200ms/div Time: 200ms/DIV VIN (1V/DIV) VIN (1V/div) The test conditions for the Typical Operating Performance are: VIN = 5V, TA = +25°C, RILIM = 25.5kΩ, RVB = 200kΩ, Unless Otherwise Noted. (Continued) TIME: 10ms/div Time: 10ms/DIV VIN (1V/div) VIN(1V/DIV) OUT (1V/div) OUT (1V/DIV) Load Current LOAD CURRENT 500mA/DIV (500mA/div) OUT (1V/div) OUT (1V/DIV) WRN (5V/div) WRN (5V/DIV) Load Current LOAD CURRENT 500mA/DIV (500mA/div) WRN (5V/div) WRN (5V/DIV)