Multi-Cell Li-ion Battery Pack OCP/Analog Front End

® ISL9208 Data Sheet February 16, 2007 FN6446.0 Multi-Cell Li-ion Battery Pack OCP/Analog Front End The ISL9208 is an overcurrent protection device and analog front end for a microcontroller in a multi-cell Li-ion battery pack. The ISL9208 supports battery pack configurations consisting of 5 cells to 7 cells in series and 1 or more cells in parallel. The ISL9208 provides integral overcurrent protection circuitry, short circuit protection, an internal 3.3V voltage regulator, internal cell balancing switches, cell voltage monitor level shifters, and drive circuitry for external FET devices for control of pack charge and discharge. Selectable overcurrent and short circuit thresholds reside in internal RAM registers. An external microcontroller sets the thresholds by setting register values through an I2C serial interface. Internal registers also contain the detection delays for overcurrent and short circuit conditions. Using an internal analog multiplexer the ISL9208 provides monitoring of each cell voltage plus internal and external temperature by a separate microcontroller with an A/D converter. Software on this microcontroller implements all battery pack control functionality, except for overcurrent and short circuit shutdown. Features • Software selectable overcurrent protection levels and variable protect detection times - 4 discharge overcurrent thresholds - 4 short circuit thresholds - 4 charge overcurrent thresholds - 8 overcurrent delay times (Charge) - 8 overcurrent delay times (Discharge) - 2 short circuit delay times (Discharge) • Automatic FET turn-off and cell balance disable on reaching external (battery) or internal (IC) temperature limit. • Automatic over-ride of cell balance on reaching internal (IC) temperature limit. • Fast short circuit pack shutdown • Can use current sense resistor, FET rDS(ON), or Sense FET for overcurrent detection. • Four battery backed software controlled flags. • Allows three different FET controls: - Back-to-back N-Channel FETs for charge and discharge control - Single N-Channel discharge FET. - Single N-Channel FET for discharge, with separate, optional (smaller) back-to-back N-channel FETs for charge. • Integrated Charge/Discharge FET Drive Circuitry with 200µA (typ) turn-on current and 150mA (typ) Discharge FET turn-off current. • 10% Accurate 3.3V voltage regulator (minimum 25mA out with external NPN transistor having current gain of 70). • Monitored cell voltage output stable in 100µs. • Internal Cell balancing FETs handle up to 200mA of balancing current for each cell (with the number of cells being balanced limited by the maximum package power dissipation of 400mW). • Simple I2C host interface • Sleep operation with programmable negative edge or positive edge wake up. • <10µA Sleep Mode • Pb-free plus anneal available (RoHS compliant) Ordering Information PART NUMBER (Note) ISL9208IRZ* PART MARKING ISL9208 IRZ PACKAGE (Pb-free) 32 Ld 5x5 QFN PKG. DWG. # L32.5x5B *Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL9208 Pinout ISL9208 (32 LD QFN) TOP VIEW TEMP3V WKUP RGC SDA RGO NC VC7/VCC CB7 VCELL6 CB6 VCELL5 CB5 VCELL4 32 31 30 29 28 27 26 25 1 24 2 3 4 5 6 7 23 22 21 20 19 18 SCL NC NC TEMPI AO VMON CFET DFET CSENSE DSENSE DSREF 8 17 9 10 11 12 13 14 15 16 CB4 CB3 CB2 CB1 VCELL3 VCELL2 Functional Diagram SCL SDA VCELL1 VSS I2C I/F 2 VC7/VCC CB7 VCELL6 CB6 VCELL5 CB5 VCELL4 CB4 VCELL3 CB3 VCELL2 CB2 VCELL1 CB1 BACKUP SUPPLY DSREF DSENSE VMON VSS CSENSE AO TEMPI TEMP3V LEVEL SHIFTERS/ CELL BALANCE CIRCUITS CELL VOLTAGES 7 MUX POWER CONTROL REGISTERS 3.3VDC REGULATOR CONTROL LOGIC OSC FET CONTROL CIRCUITRY TEMPERATURE SENSOR, INT/EXT COMPARATOR EXT TEMP RGC RGO WKUP OVERCURRENT PROTECTION CIRCUITS (THRESHOLD DETECT AND TIMING) DFET 2 CFET FN6446.0 February 16, 2007 ISL9208 Pin Names SYMBOL DESCRIPTION VC7/VCC Battery cell 7 voltage input/VCC supply. This pin is used to monitor the voltage of this battery cell externally at pin AO. This pin also provides the operating voltage for the IC circuitry. VCELLN Battery cell N voltage input. This pin is used to monitor the voltage of this battery cell externally at pin AO. VCELLN connects to the positive terminal of CELLN and the negative terminal of CELLN + 1. CBN Cell balancing FET control output N. This internal FET diverts a fraction of the current around a cell while the cell is being charged or adds to the current pulled from a cell during discharge in order to perform a cell voltage balancing operation. This function is generally used to reduce the voltage on an individual cell relative to other cells in the pack. The cell balancing FETs are turned on or off by an external controller. Ground. This pin connects to the most negative terminal in the battery string. Discharge current sense reference. This input provides a separate reference point for the charge and discharge current monitoring circuits. WIth a separate reference connection, it is possible to minimize errors that result from voltage drops on the ground lead when the load is drawing large currents. If a separate reference is not necessary, connect this pin to VSS. VSS DSREF DSENSE Discharge current sense monitor. This input monitors the discharge current by monitoring a voltage. It can monitor the voltage across a sense resistor, or the voltage across the DFET, or by using a FET with a current sense pin. The voltage on this pin is measured with reference to DSREF. CSENSE Charge current sense monitor. This input monitors the charge current by monitoring a voltage. It can monitor the voltage across a sense resistor, or the voltage across the CFET, or by using a FET with a current sense pin. The voltage on this pin is measured with reference to VSS. DFET Discharge FET control. The ISL9208 controls the gate of a discharge FET through this pin. The power FET is a N-Channel device. The FET is turned on only by the microcontroller. The FET can be turned off by the microcontroller, but the ISL9208 also turns off the FET in the event of an overcurrent or short circuit condition. If the microcontroller detects an undervoltage condition on any of the battery cells, it can turn off the discharge FET by controlling this output with a control bit. Charge FET control. The ISL9208 controls the gate of a charge FET through this pin. The power FET is a N-Channel device. The FET is turned on only by the microcontroller. The FET can be turned off by the microcontroller, but the ISL9208 also turns off the FET in the event of an overcurrent condition. If the microcontroller detects an overvoltage condition on any of the battery cells, it can turn off the FET by controlling this output with a control bit. Discharge load monitoring. In the event of an overcurrent or short circuit condition, the microcontroller can enable an internal resistor that connects between the VMON pin and VSS. When the FETs open because of an overcurrent or short circuit condition and the load remains, the voltage at VMON will be near the VCC voltage. When the load is released, the voltage at VMON drops below a threshold indicating that the overcurrent or short circuit condition is resolved. At this point, the LDFAIL flag is cleared and operation can resume. Analog multiplexer output. The analog output pin is used by an external microcontroller to monitor the cell voltages and temperature sensor voltages. The microcontroller selects the specific voltage being applied to the output by writing to a control register. CFET VMON AO TEMP3V Temperature monitor output control. This pin outputs a voltage to be used in a divider that consists of a fixed resistor and a thermistor. The thermistor is located in close proximity to the cells. The TEMP3V output is connected internally to the RGO voltage through a PMOS switch only during a measurement of the temperature, otherwise the TEMP3V output is off. The TEMP3V output can be turned on continuously with a special control bit. Microcontroller wake up control. The TEMP3V pin is also turned on when any of the DSC, DOC, or COC bits are set. This can be used to wake up a sleeping microcontroller to respond to overcurrent conditions with its own control mechanism. TEMPI Temperature monitor input. This pin inputs the voltage across a thermistor to determine the temperature of the cells. When this input drops below TEMP3V/13, an external over-temperature condition exists. The TEMPI voltage is also fed to the AO output pin through an analog multiplexer so the temperature of the cells can be monitored by the microcontroller. 3 FN6446.0 February 16, 2007 ISL9208 Pin Names (Continued) SYMBOL RGO DESCRIPTION Regulated output voltage. This pin connects to the emitter of an external NPN transistor and works in conjunction with the RGC pin to provides a regulated 3.3V. The voltage at this pin provides feedback for the regulator and power for many of the ISL9208 internal circuits as well as providing the 3.3V output voltage for the microcontroller and other external circuits. Regulated output control. This pin connects to the base of an external NPN transistor and works in conjunction with the RGO pin to provide a regulated 3.3V. The RGC output provides the control signal for