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Part Number |
ISL88022 |
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Manufacturer |
Intersil Corporation |
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Semiconductor DataSheet |
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DataSheet View |
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ISL88021, ISL88022
Data Sheet September 18, 2006 FN8226.1
Triple Voltage Monitor with Adjustable Power-On-Reset and Undervoltage/ Overvoltage Monitoring Capability
The ISL88021 and ISL88022 family of devices are customizable triple voltage-monitoring supervisors that assert a reset if any of the monitored voltages becomes non-compliant. They offer popular functions such as Power-On-Reset timing control with both RESET and RESET outputs, Supply Voltage Supervision, both under or overvoltage detection, and Manual Reset assertion. By offering these features in a small 8 Ld MSOP package, the ISL88021 and ISL88022 can lower system cost, reduce board space requirements and increase the reliability of systems. Applying a voltage to VDD activates the Power-On-Reset circuit which holds RESET low for an adjustable period of time. This allows the power supply and system oscillator to stabilize before the processor can execute code. Low VDD detection circuitry protects the user’s system from low voltage conditions, resetting the system when VDD falls below its minimum preset voltage threshold VTH1. Reset remains asserted until VDD returns to its proper operating www.DataSheet4U.com level and stabilizes. Two additional voltage monitoring inputs, V2MON (preset) and V3MON (adjustable), monitor other supplies to provide reliable system operation. The ISL88021 V3MON input monitors for undervoltage (UV) conditions whereas the ISL88022 V3MON input allows monitoring for overvoltage (OV) conditions. The monitored voltage on V3MON on either device is compared via a resistor divider to a 600mV internal reference. Hence, any voltage more or less positive than this reference can be accurately monitored to meet specific system level requirements or to fine-tune the threshold for applications requiring higher precision. These devices also let users increase the Power-On-Reset time-out delay by connecting a capacitor between CPOR and ground. This lengthens the period of an internal clock counter thereby increasing the time between voltage compliance and reset outputs signaling. A manual reset input provides debounce circuitry for minimum reset component count.
Features
• Triple Voltage Monitor and Reset Assertion • Low VDD Detection and Reset Assertion - Adjustable Reset Threshold Voltages - 0.6V ±6mV Over -40°C to +85°C - Reset Signal Valid to VDD = 1V • 140ms Minimum Reset Pulse Delay that is Customizable Using an External Capacitor • Both RST and RST Outputs Available • Undervoltage/Overvoltage Monitoring Capability • Low 20µA Consumption • Small 8 Ld MSOP Package • Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Process Control Systems • Intelligent Instruments • Embedded Control Systems • Computer Systems • Portable/Battery-Powered Equipment • Multi-Voltage Systems
Pinout
ISL88021, ISL88022 (8 LD MSOP) TOP VIEW
MR VDD V2MON GND
1 2 3 4
8 7 6 5
RST RST CPOR V3MON
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL88021, ISL88022 Ordering Information
PART NUMBER (See Notes)
Ordering Information
PART NUMBER ISL88022IU8HAZ ISL88022IU8HCZ ISL88022IU8HEZ ANO ISL88022IU8HFZ ANN NOTES:
(See Notes) (Continued)
PART VDD V2MO V3MON MARKING VTRIP1 VTRIP2 TYPE PACKAGE 3.09V 3.09V 3.09V 3.09V 4.64V 4.64V 4.64V 4.64V 3.09V 3.09V 3.09V 3.09V 1.69V 2.32V 2.92V 3.09V 1.69V 2.32V 2.92V 3.09V 1.69V 2.32V 2.92V 3.09V UV UV UV UV UV UV UV UV OV OV OV OV 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP
PART VDD V2MO V3MON MARKING VTRIP1 VTRIP2 TYPE PACKAGE 4.64V 4.64V 4.64V 4.64V 1.69V 2.32V 2.92V 3.09V OV OV OV OV 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP 8 Ld MSOP
ISL88021IU8FAZ ANM ISL88021IU8FCZ ANL ISL88021IU8FEZ ISL88021IU8FFZ ISL88021IU8HAZ ISL88021IU8HCZ ISL88021IU8HEZ ANK ISL88021IU8HFZ ANJ ISL88022IU8FAZ ANQ ISL88022IU8FCZ ANP ISL88022IU8FEZ ISL88022IU8FFZ
1. Standard versions are shown in bold. For non-standard versions, please contact factory for availability. 2. Add “-TK” suffix for Tape and Reel. 3. Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Block Diagrams
VDD RST RST POR V2MON CPOR V2MON POR CPOR VDD RST RST
MR V3MON PB ± VREF GND
ISL88021 ISL88022
MR V3MON PB ± VREF GND
Pin Descriptions
ISL88021 1 2 3 4 5 5 6 7 8 6 7 8 ISL88022 1 2 3 4 NAME MR VDD V2MON GND V3MON V3MON CPOR RST RST FUNCTION Active-Low Open Drain Manual Reset Input Power Supply Input Second Undervoltage Monitor Input Ground Undervoltage Monitor Input Overvoltage Monitor Input Set Power-On-Reset Timeout Delay Active-Low Open Drain Reset Output Active-High Push-Pull Reset Output
2
FN8226.1 September 18, 2006
ISL88021, ISL88022
Absolute Maximum Ratings
Temperature Under Bias . . . . . . . . . . . . . . . . . . . . -40 C to +85 C Voltage on Any Pin with Respect to GND . . . . . . . . . . . -1.0V to +7V D.C. Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Thermal Information
Thermal Resistance (Typical, Note 1) θJA (°C/W) MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145 Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C (MSOP - Lead Tips Only)
Recommended Operating Conditions
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
SYMBOL VDD IDD1 IDD2 IDDA
Over the recommended operating conditions unless otherwise specified. TEST CONDITIONS MIN 2.0 VDD = 5.0V V2MON = 3.3V V3MON = 1.0V 12.5 5.5 19 TYP MAX 5.5 15 6 100 UNITS V µA µA nA
PARAMETER Supply Voltage Range VDD Supply Current V2MON Input Current V3MON Input Current
VOLTAGE THRESHOLDS VTH1 Fixed Voltage Trip Point for VDD ISL88021/22IU8HxZ ISL88021/22IU8FxZ VTH1HYST Hysteresis of VTH1 VTH1 = 4.64V VTH1 = 3.09V VTH2 Fixed Voltage Trip Point for V2MON ISL88021/22IU8xFZ ISL88021/22IU8xEZ ISL88021/22IU8xCZ ISL88021/22IU8xAZ VTH2HYST Hysteresis of VTH2 VTH2 = 3.09V VTH2 = 2.92V VTH2 = 2.32V VTH2 = 2.19V VTH2 = 1.69V VTH3 V3MON Threshold Voltage VTH for V3MON on ISL88021 VTH for V3MON on ISL88022 VREFHYST RESET VOL Reset Output Voltage Low VDD ≥ 3.3V, Sinking 2.5mA VDD < 3.3V, Sinking 1.5mA VOH RST Output Voltage High VDD ≥ 3.3V, Sourcing 2.5mA VDD < 3.3V, Sourcing 1.5mA tRPD tPOR CLOAD VTH to Reset Asserted Delay POR Timeout Delay Load Capacitance on Reset Pins CPOR is open 140 VDD-0.6 VDD-0.6 0.05 0.05 VDD-0.4 VDD-0.4 10 200 5 0.40 0.40 V V V V µs ms pF Hysteresis Voltage 0.594 0.587 3.034 2.894 2.290 1.660 4.565 3.029 4.649 3.085 46 37 3.090 2.947 2.332 1.690 37 29 23 22 17 0.605 0.595 3 0.616 0.603 3.146 3.000 2.374 1.720 4.733 3.141 V V mV mV V V V V mV mV mV mV mV V V mV
3
FN8226.1 September 18, 2006
ISL88021, ISL88022
Electrical Specifications
SYMBOL MANUAL RESET VMRL VMRH tMR RPU MR Input Voltage Low MR Input Voltage High MR Minimum Pulse Width Internal Pull-Up Resistor VDD-0.6 550 20 0.8 V V ns kΩ Over the recommended operating conditions unless otherwise specified. (Continued) TEST CONDITIONS MIN TYP MAX UNITS
PARAMETER
Functional Description
The ISL88021 and ISL88022 devices incorporate such features as Power-On-Reset control, Supply Voltage Supervision, Undervoltage or Overvoltage Monitoring, and Manual Reset Assertion. The ISL88021 and ISL88022 devices provide common preset threshold voltages on both VDD and V2MON and for an optional resistor divider network on V3MON to provide custom voltage monitoring of voltages greater than 0.6V. An optional capacitor can be connected between the CPOR pin and GND to increase the nominal 200ms tPOR delay. Figure 7 illustrates operational functionality with a timing diagram.
Power-On-Reset (POR)
Applying power to the ISL88021 and ISL88022 devices activates a POR circuit which holds the RESET pin low once VDD > 1V. This signal provides several benefits: • It prevents the system microprocessor from starting to operate with insufficient voltage. • It prevents the processor from operating prior to stabilization of the oscillator. • It ensures that the monitored device is held out of operation until internal registers are properly loaded. • It allows time for an FPGA to download its configuration prior to initialization of the circuit. When all of the monitored voltages meet their respective input voltage requirements for the specified reset timeout delay tPOR, the POR circuit simultaneously pulls the RST output low and releases the RST output to allow the system to begin operation.
Voltage Monitoring
During normal operation, the ISL88021 and ISL88022 monitor the voltage levels on VDD, V2MON and V3MON. The ISL88021 asserts reset if any one of these voltages fall below their respective voltage trip points and in the case of ISL88022 above the voltage t |