Dual Advanced Synchronous Rectified Buck MOSFET Drivers

Part  Number ISL6614B
Manufacturer Intersil Corporation
Semiconductor DataSheet

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® ISL6614B Data Sheet January 3, 2006 FN9206.2 Dual Advanced Synchronous Rectified Buck MOSFET Drivers with Pre-POR OVP The ISL6614B integrates two ISL6613B MOSFET drivers and is specifically designed to drive two Channel MOSFETs in a synchronous rectified buck converter topology. This driver combined with HIP63xx or ISL65xx Multi-Phase Buck PWM controllers and N-Channel MOSFETs forms complete core-voltage regulator solutions for advanced microprocessors. The ISL6614B features 7V rising threshold and drives both the upper and lower gates simultaneously over a range from 5V to 12V. This drive-voltage provides the flexibility necessary to optimize applications involving trade-offs between gate charge and conduction losses. This driver is optimized for POL DC/DC Converters for IBA Systems. An advanced adaptive zero shoot-through protection is integrated to prevent both the upper and lower MOSFETs from conducting simultaneously and to minimize the dead time. These products add an overvoltage protection feature operational before VCC exceeds its turn-on threshold, at which the PHASE node is connected to the gate of the low side MOSFET (LGATE). The output voltage of the converter is then limited by the threshold of the low side MOSFET, which provides some protection to the microprocessor if the upper MOSFET(s) is shorted during start-up. The ISL6614B also features a three-state PWM input which, working together with Intersil’s multi-phase PWM controllers, prevents a negative transient on the output voltage when the output is shut down. This feature eliminates the Schottky diode that is used in some systems for protecting the load from reversed output voltage events. Features • Pin-to-pin Compatible with HIP6602 SOIC family • Quad N-Channel MOSFET Drives for Two Synchronous Rectified Bridges • Low VCC Rising Threshold (7V) for IBA Applications • Advanced Adaptive Zero Shoot-Through Protection - Body Diode Detection - Auto-zero of rDS(ON) Conduction Offset Effect • Adjustable Gate Voltage (5V to 12V) for Optimal Efficiency • Internal Bootstrap Schottky Diode • Bootstrap Capacitor Overcharging Prevention • Supports High Switching Frequency (up to 1MHz) - 3A Sinking Current Capability - Fast Rise/Fall Times and Low Propagation Delays • Three-State PWM Input for Output Stage Shutdown • Three-State PWM Input Hysteresis for Applications With Power Sequencing Requirement • Pre-POR Overvoltage Protection • VCC Undervoltage Protection • Expandable Bottom Copper Pad for Enhanced Heat Sinking • QFN Package: - Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat No Leads - Package Outline - Near Chip Scale Package footprint, which improves PCB efficiency and has a thinner profile • Pb-Free Plus Anneal Available (RoHS Compliant) Applications • Optimized for POL DC/DC Converters for IBA Systems • Core Regulators for Intel® and AMD® Microprocessors • High Current DC/DC Converters • High Frequency and High Efficiency VRM and VRD Related Literature • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” • Technical Brief 400 and 417 for Power Train Design, Layout Guidelines, and Feedback Compensation Design 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL6614B Pinouts ISL6614BCB/ISL6614BCBZ (14 LD SOIC) TOP VIEW ISL6614BCR/ISL6614BCRZ (16 LD QFN) TOP VIEW PHASE1 13 12 UGATE1 11 BOOT1 GND PVCC 3 PGND 4 5 NC 6 LGATE2 7 PHASE2 8 NC 10 BOOT2 9 UGATE2 PWM2 PWM1 15 PWM1 PWM2 GND LGATE1 PVCC PGND LGATE2 1 2 3 4 5 6 7 14 VCC 13 PHASE1 12 UGATE1 11 BOOT1 10 BOOT2 9 UGATE2 8 PHASE2 GND 1 LGATE1 2 16 Ordering Information PART NUMBER ISL6614BCB ISL6614BCB-T ISL6614BCBZ (Note) ISL6614BCBZ-T (Note) ISL6614BCR ISL6614BCR-T ISL6614BCRZ (Note) ISL6614BCRZ-T (Note) ISL6614BIB ISL6614BIB-T ISL6614BIBZ (Note) ISL6614BIBZ-T (Note) ISL6614BIR ISL6614BIR-T ISL6614BIRZ (Note) ISL6614BIRZ-T (Note) PART MARKING 6614BCB 6614BCB 6614BCBZ 6614BCBZ 6614BCR 6614BCR 6614BCRZ 6614BCRZ 6614BIB 6614BIB 6614BIBZ 6614BIBZ 6614BIR 6614BIR 6614BIRZ 6614BIRZ TEMP. RANGE (°C) 0 to 85 14 Ld SOIC Tape and Reel 0 to 85 0 to 85 0 to 85 -40 to 85 14 Ld SOIC Tape and Reel -40 to 85 -40 to 85 -40 to 85 14 Ld SOIC (Pb-free) 16 Ld 4x4 QFN 16 Ld 4x4 QFN (Pb-free) M14.15 VCC 14 PACKAGE 14 Ld SOIC 14 Ld SOIC (Pb-free) 16 Ld 4x4 QFN 16 Ld 4x4 QFN (Pb-free) 14 Ld SOIC PKG. DWG. # M14.15 M14.15 14 Ld SOIC Tape and Reel (Pb-free) L16.4x4 16 Ld 4x4 QFN Tape and Reel L16.4x4 16 Ld 4x4 QFN Tape and Reel (Pb-free) M14.15 14 Ld SOIC Tape and Reel (Pb-free) L16.4x4 16 Ld 4x4 QFN Tape and Reel L16.4x4 16 Ld 4x4 QFN Tape and Reel (Pb-free) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Contact the factory for availability. 2 FN9206.2 January 3, 2006 ISL6614B Block Diagram PVCC VCC BOOT1 UGATE1 +5V PRE-POR OVP FEATURES SHOOTTHROUGH PROTECTION PHASE1 CHANNEL 1 10K PVCC PWM1 8K LGATE1 PGND +5V CONTROL LOGIC PVCC PGND BOOT2 UGATE2 10K PWM2 8K GND SHOOTTHROUGH PROTECTION PHASE2 CHANNEL 2 PVCC LGATE2 PGND PAD FOR ISL6614BCR, THE PAD ON THE BOTTOM SIDE OF THE QFN PACKAGE MUST BE SOLDERED TO THE CIRCUIT’S GROUND. 3 FN9206.2 January 3, 2006 ISL6614B Typical Application - 4 Channel Converter Using ISL65xx and ISL6614B Gate Drivers 7V TO 12V BOOT1 +12V UGATE1 VCC PHASE1 LGATE1 +5V DUAL DRIVER ISL6614B FB VSEN COMP VCC UGATE2 ISEN1 PGOOD EN PWM1 PWM2 MAIN ISEN2 CONTROL ISL65xx PWM1 PWM2 LGATE2 PHASE2 PVCC 5V TO 12V BOOT2 +12V GND PGND VID +VCORE ISEN3 FS/DIS PWM3 PWM4 GND ISEN4 UGATE1 VCC PHASE1 7V TO 12V BOOT1 +12V LGATE1 DUAL DRIVER ISL6614B PVCC 5V TO 12V BOOT2 +12V UGATE2 PWM1 PWM2 LGATE2 PHASE2 GND PGND 4 FN9206.2 January 3, 2006 ISL6614B Absolute Maximum Ratings Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V Supply Voltage (PVCC) . . . . . . . . . . . . . . . . . . . . . . . . . VCC + 0.3V BOOT Voltage (VBOOT-GND). . . . . . . . . . . . . . . . . . . . . . . . . . . .36V Input Voltage (VPWM) . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 7V UGATE. . . . . . . . . . . . . . . . . . . VPHASE - 0.3VDC to VBOOT + 0.3V VPHASE - 3.5V (<100ns Pulse Width, 2µJ) to VBOOT + 0.3V LGATE . . . . . . . . . . . . . . . . . . . . . . GND - 0.3VDC to VPVCC + 0.3V GND - 5V (<100ns Pulse Width, 2µJ) to VPVCC + 0.3V PHASE. . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3VDC to 15VDC GND - 8V (<400ns, 20µJ) to 30V (<200ns, VBOOT-GND<36V) ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . Class I JEDEC STD Thermal Information Thermal Resistance (Typical Notes 1, 2, 3) θJA(°C/W) θJC(°C/W) SOIC Package (Note 1) . . . . . . . . . . . . 90 N/A QFN Package (Notes 2, 3). . . . . . . . . . 46 9 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C (SOIC - Lead Tips Only) Recommended Operating Conditions Ambient Temperature Range . . . . . . . . . . . . . . . . . . . .-40°C to 85°C Maximum Operating Junction Temperature . . . . . . . . . . . . . . 125°C Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V to 13.2V Supply Voltage Range, PVCC . . . . . . . . . . . . . . . . 5V to 12V ±10% CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. 2. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 3. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. 4. Guaranteed by design. Not 100% tested in production. Electrical Specifications PARAMETER VCC SUPPLY CURRENT Bias Supply Current Gate Drive Bias Current Recommended Operating Conditions, Unless Otherwise Noted. SYMBOL IVCC IPVCC TEST CONDITIONS fPWM = 300kHz, VPVCC = 12V fPWM = 300kHz, VPVCC = 12V 0°C to 85°C -40°C to 85°C 0°C to 85°C -40°C to 85°C IPWM VPWM = 5V VPWM = 0V VCC = 12V VCC = 12V VCC = 12V VCC = 12V VCC = 12V VCC = 12V VCC = 12V tTSSHD tRU tRL tFU tFL tPDHU VPVCC = 12V, 3nF Load, 10% to 90% VPVCC = 12V, 3nF Load, 10% to 90% VPVCC = 12V, 3nF Load, 90% to 10% VPVCC = 12V, 3nF Load, 90% to 10% VPVCC = 12V, 3nF Load, Adaptive MIN 6.60 5.60 5.20 4.20 1.80 1.50 1.00 3.20 2.60 245 26 18 18 12 10 500 -460 3.00 2.00 5.4 TYP 7.1 9.7 6.9 MAX 7.25 7.25 5.90 5.90 2.40 UNITS mA mA V V V V µA µA V V V V V V V ns ns ns ns ns ns POWER-ON RESET AND ENABLE VCC Rising Threshold VCC Rising Threshold VCC Falling Threshold VCC Falling Threshold PWM INPUT (See Timing Diagram on Page 7) Input Current PWM Rising Threshold PWM Falling Threshold Typical Three-State Shutdown Window Three-State Lower Gate Falling Threshold Three-State Lower Gate Rising Threshold Three-State Upper Gate Rising Threshold Three-State Upper Gate Falling Threshold Shutdown Holdoff Time UGATE Rise Time LGATE




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