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Part Number |
ISL6567 |
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Manufacturer |
Intersil Corporation |
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Semiconductor DataSheet |
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DataSheet View |
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ISL6567
Data Sheet March 20, 2007 FN9243.2
Multipurpose Two-Phase Buck PWM Controller with Integrated MOSFET Drivers
The ISL6567 two-phase synchronous buck PWM control IC provides a precision voltage regulation system for point-ofload and other high-current applications requiring an efficient and compact implementation. Multi-phase power conversion is a marked departure from single phase converter configurations employed to satisfy the increasing current demands of various electronic circuits. By distributing the power and load current, implementation of multi-phase converters utilize smaller and lower cost transistors with fewer input and output capacitors. These reductions accrue from the higher effective conversion frequency with higher frequency ripple current resulting from the phase interleaving inherent to this topology. Outstanding features of this controller IC include an internal 0.6V reference with a system regulation accuracy of ±1%, an optional external reference input, and user-adjustable switching frequency. Precision regulation is further enhanced by the available unity-gain differential amplifier targeted at remote voltage sensing capability, while output regulation is monitored and its quality is reported via a PGOOD pin. Also included, an internal shunt regulator with optional external connection capability extends the operational input voltage range. For applications requiring voltage tracking or sequencing, the ISL6567 offers a host of possibilities, including coincidental, ratiometric, or offset tracking, as well as sequential start-ups, user adjustable for a wide range of applications. Protection features of this controller IC include overvoltage and overcurrent protection. Overvoltage results in the converter turning the lower MOSFETs ON to clamp the rising output voltage. The ISL6567 uses cost and space-saving rDS(ON) sensing for channel current balance, dynamic voltage positioning, and overcurrent protection. Channel current balancing is automatic and accurate with the integrated current-balance control system. Overcurrent protection can be tailored to various application with no need for additional parts.
Features
• Integrated Two-Phase Power Conversion - Integrated 4A Drivers for High Efficiency • Shunt Regulator for Wide Input Power Conversion - 5V and Higher Bias - Up to 20V Power Down-Conversion • Precision Channel Current Sharing - Loss-Less Current Sampling - Uses rDS(ON) • Precision Output Voltage Regulation - ±0.6% System Accuracy Over Temperature (Commercial Range) • 0.6V Internal Reference • Full Spectrum Voltage Tracking - Coincidental, Ratiometric, or Offset • Sequential Start-up Control • Adjustable Switching Frequency - 150kHz to 1.5MHz • Fast Transient Recovery Time • Unity-Gain Differential Amplifier - Increased Voltage Sensing Accuracy • Overcurrent Protection • Overvoltage Protection • Start-up into Pre-Charged Output • Small, QFN Package Footprint • Pb-Free Plus Anneal Available (RoHS Compliant)
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2005-2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
ISL6567 Ordering Information
PART NUMBER (Note) ISL6567CRZ PART MARKING 6567CRZ TEMP. (°C) 0 to +70 0 to +70 PACKAGE (Pb-Free) PKG. DWG. #
Pinout
ISL6567 (QFN) TOP VIEW
REFTRK UGATE1 19 18 PHASE1 17 ISEN1 25 GND 16 LGATE1 15 PVCC 14 LGATE2 13 ISEN2 7 VREG 8 VCC 9 EN 10 BOOT2 11 UGATE2 12 PHASE2 PGOOD 21 BOOT1 20
SS 23
ISL6567CRZ-T 6567CRZ ISL6567IRZ ISL6567IRZ-T 6567IRZ 6567IRZ
24 Ld 4x4 QFN L24.4x4C
RGND VSEN MON VDIFF FB COMP 1 2 3 4 5 6
24
22
-40 to +85 24 Ld 4x4 QFN L24.4x4C -40 to +85 24 Ld 4x4 QFN L24.4x4C
ISL6567EVAL1 Evaluation Platform NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
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FS
24 Ld 4x4 QFN L24.4x4C
FN9243.2 March 20, 2007
Block Diagram
PGOOD FS EN VCC PVCC BOOT1
MON 300mV + 110% 90% OSCILLATOR VCC 10μA 10μA OVP COMP 120%
20μA
3
POWER-ON RESET (POR) GATE CONTROL PHASE1 UGATE1 LGATE1 REFTRK REFERENCE EA FB + VDIFF RGND
X1
SOFT-START AND FAULT LOGIC
PWM1
ISL6567 ISL6567
GND
CONTROL LOGIC BOOT2 PWM2 OC
Σ Σ
VCC
UGATE2
20μA
GATE CONTROL
PHASE2
VSEN CURRENT CORRECTION 20μA/1mA SHUNT LINEAR REGULATOR LGATE2
VREG
VCC
FN9243.2 March 20, 2007
ISEN1
ISEN2
SS
ISL6567 Simplified Power System Diagram
VIN
Q1 EN PGOOD
CHANNEL1 Q2
VOUT
Q3 CHANNEL2
ISL6567
Q4
Typical Application
VIN LIN RSHUNT CF2 CF1 VCC VREG PVCC BOOT1 REFTRK UGATE1 FS RFS SS CSS MON RPG PGOOD R4 EN UGATE2 R5 PHASE2 ISEN2 C1 COMP LGATE2 R2 C2 FB VDIFF R1 VSEN RGND GND Q4 RP LGATE1 ISEN1 RISEN1 Q2 PHASE1 LOUT1 Q1 CBOOT1 CHFIN1 CBIN1
BOOT2
VOUT CBOOT2 CHFIN2 Q3 CBIN2 CHFOUT
ISL6567
CBOUT
RISEN2
LOUT2
RS
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FN9243.2 March 20, 2007
ISL6567
Absolute Maximum Ratings
Supply Voltage, VCC, PVCC . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V Shunt Regulator Voltage, VVREG . . . . . . . . . . . . . . . -0.3V to +6.5V Boot Voltage, VBOOT . . . . . . . . . . . . . PGND - 0.3V to PGND + 27V Phase Voltage, VPHASE . . . . . . . . . . VBOOT - 7V to VBOOT + 0.3V Upper Gate Voltage, VUGATE . . . . VPHASE - 0.3V to VBOOT + 0.3V Lower Gate Voltage, VLGATE. . . . . . . . PGND - 0.3V to VCC + 0.3V Input, Output, or I/O Voltage . . . . . . . . . GND - 0.3V to VCC + 0.3V ESD Classification . . . . . . . . . . . . . . . . . . HBM Class 1 JEDEC STD
Thermal Information
Thermal Resistance θJA (°C/W) θJC (°C/W) QFN Package (Notes 1, 2). . . . . . . . . . 43 7 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C
Recommended Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . +4.9V to +5.5V Ambient Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied.
NOTES: 1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
PARAMETER
Operating Conditions: VCC = 5V, TJ = -40°C to +85°C, Unless Otherwise Specified TEST CONDITIONS MIN TYP MAX UNITS
BIAS SUPPLY AND INTERNAL OSCILLATOR Input Bias Supply Current Rising VCC POR (Power-On Reset) Threshold VCC POR Hysteresis Rising PVCC POR Threshold Shunt Regulation Maximum Shunt Current Switching Frequency (per channel; Note 4) Frequency Tolerance Oscillator Peak-to-Peak Ramp Amplitude Maximum Duty Cycle CONTROL THRESHOLDS EN Threshold EN Hysteresis Current MON Power-Good Enable Threshold MON Hysteresis Current SOFT-START SS Current SS Ramp Amplitude SS Threshold for Output Gates Turn-Off REFERENCE AND DAC System Accuracy (Commercial Temp. Range) System Accuracy (Industrial Temp. Range) Internal Reference External Reference DC Amplitude Range External Reference DC Offset Range VREF VREFTRK (DC) VREFTRK (DC) offset -0.6 -0.8 0.1 -4.5 0.6 0.6 0.8 2.3 4.5 % % V V mV ISS 0.55 0.40 22 3.60 μA V V VMON_TH 290 0.65 20 305 10 320 V μA mV μA VVCC; IVREG = 0 to 120mA IVREG_MAX FSW FSW VOSC dMAX IVCC; EN > 0.7V; LGATE, UGATE open 4.30 0.46 3.60 4.90 120 200 -10 7.6 4.40 0.51 3.67 5.10 1.4 66 9 4.50 0.58 3.75 5.35 2000 10 mA V V V V mA kHz % V %
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FN9243.2 March 20, 2007
ISL6567
Electrical Specifications
PARAMETER ERROR AMPLIFIER AND REMOTE SENSING DC Gain (Note 3) Gain-Bandwidth Product (Note 3) Slew Rate (Note 3) Maximum Output Voltage Minimum Output Voltage VSEN, RGND Input Resistance POWER GOOD PGOOD Rising Lower Threshold PGOOD Rising Upper Threshold PGOOD Threshold Hysteresis PROTECTION Overcurrent Trip Level Overvoltage Threshold Overvoltage Hysteresis SWITCHING TIME UGATE Rise Time (Note 3) LGATE Rise Time (Note 3) UGATE Fall Time (Note 3) LGATE Fall Time (Note 3) UGATE Turn-On Non-overlap (Note 3) LGATE Turn-On Non-overlap (Note 3) OUTPUT Upper Drive Source Resistance Upper Drive Sink Resistance Lower Drive Source Resistance Lower Drive Sink Resistance NOTES: 3. Parameter magnitude guaranteed by design. 4. Not a tested parameter; range provided for reference only. 100mA Source Current 100mA Sink Current 100mA Source Current 100mA Sink Current 1.0 1.0 1.0 0.4 2.5 2.5 2.5 1.0 Ω Ω Ω Ω tRUGATE; VVCC = 5V, 3nF Load tRLGATE; VVCC = 5V, 3nF Load tFUGATE; VVCC = 5V, 3nF Load tFLGATE; VVCC = 5V, 3nF Load tPDHUGATE; VVCC = 5V, 3nF Load tPDHLGATE; VVCC = 5V, 3nF Load 8 8 8 4 8 8 ns ns ns ns ns ns VDIFF Rising VDIFF Falling 80 103 122 5.5 120 μA % % 92 112 2.5 % % % RL = 10k to ground CL = 10pF CL = 10pF no load no load 4.0 140 80 95 30 225 0.7 dB MHz V/μs V V kΩ Operating Conditions: VCC = 5V, TJ = -40°C to +85°C, Unless Otherwise Specified (Continued) TEST CONDITIONS MIN TYP MAX UNITS
Timing Diagram
tPDHUGATE tRUGATE tFUGATE
UGATE LGATE
tFLGATE tPDHLGATE
tRLGATE
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FN9243.2 March 20, 2007
ISL6567 Functional Pin Description
VCC (Pin 8)
Bias supply for the IC’s small-signal circuitry. Connect this pin to a 5V supply and loca |