Single-Phase Buck PWM Controller

Part  Number ISL6540
Manufacturer Intersil Corporation
Semiconductor DataSheet

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® ISL6540 Data Sheet March 9, 2006 FN9214.0 Single-Phase Buck PWM Controller with Integrated High Speed MOSFET Driver and Pre-Biased Load Capability The ISL6540 is a single-phase voltage-mode PWM controller with input voltage feedforward compensation to maintain a constant loop gain for optimal transient response, especially for applications with a wide input voltage range. Its integrated high speed synchronous rectified MOSFET drivers and other sophisticated features provide complete control and protection for a DC/DC converter with minimum external components, resulting in minimum cost and less engineering design efforts. The output voltage of the converter can be precisely regulated with an internal reference voltage of 0.591V, and has a system tolerance of ±0.85% over commercial temperature and line load variations. An external voltage can be used in place of the internal reference for voltage tracking/DDR applications. The ISL6540 has an internal linear regulator or external linear regulator drive options for applications with only a single supply rail. The internal oscillator is adjustable from 250kHz to 2MHz. The integrated voltage margining, programmable pre-biased soft-start, differential remote sensing amplifier, and programmable input voltage POR features enhance the ISL6540 value. Features • VIN and Power Rail Operation from +3.3V to +20V • Fast Transient Response - 0 to 100% Duty Cycle - 15MHz Bandwidth Error Amplifier with 6V/µs Slew Rate - Voltage-Mode PWM Leading and Trailing-edge Modulation Control - Input Voltage Feedforward Compensation • 2.9V to 5.6V High Speed 2A/4A MOSFET Gate Drivers - Tri-state for Power Stage Shutdown • Internal Linear Regulator (LR) - 5.6V Bias from VIN • External LR Drive for Optimal Thermal Performance • Voltage Margining with Independently Adjustable Upper and Lower Settings for System Stress Testing & Over Clocking • Reference Voltage I/O for DDR/Tracking Applications • Precise 0.591V Internal Reference with Buffered Output - ±0.85%/±1.25% Over Commercial/Industrial Range • Source and Sink Overcurrent Protections - Low- and High-Side MOSFET rDS(ON) Sensing • Overvoltage and Undervoltage Protections • Small Converter Size - QFN package • Oscillator Programmable from 250kHz to 2MHz • Differential Remote Voltage Sensing with Unity Gain • Programmable Soft-start with Pre-Biased Load Capability • Power Good Indication with Programmable Delay • EN Input with Voltage Monitoring Capability • Pb-Free Plus Anneal Available (RoHS Compliant) Pinout ISL6540 (28 LD 5x5 QFN) TOP VIEW VMON COMP HSOC LSOC GND Applications • Power Supply for some Microprocessors and GPUs • Wide and Narrow Input Voltage Range Buck Regulators 21 20 19 BOOT UGATE PHASE PGND LGATE PVCC LINDRV FB 28 VSEN+ VSENREFOUT REFIN SS OFS+ OFS1 2 3 27 26 25 24 FS 23 22 • Point of Load Applications • Low-Voltage and High Current Distributed Power Supplies Ordering Information PART NUMBER* (Note) ISL6540CRZ PART MARKING ISL6540CRZ TEMP. PACKAGE PKG. RANGE (°C) (Pb-Free) DWG. # 0 to 70 0 to 70 -40 to 85 -40 to 85 28 Ld QFN L28.5x5 28 Ld QFN L28.5x5 28 Ld QFN L28.5x5 28 Ld QFN L28.5x5 GND 4 5 6 7 8 VCC 9 MARCTRL 10 PG_DLY 11 PG 12 EN 13 VFF 14 VIN BOTTOM SIDE PAD 18 17 16 15 ISL6540CRZA ISL6540CRZ ISL6540IRZ ISL6540IRZA ISL6540IRZ ISL6540IRZ *Add “-T” suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. EN VIN LIN_DRV VCC POWER-ON REFERENCE VREF = 0.591 V RESET (POR) INTERNAL SERIES LINEAR EXTERNAL SERIES LINEAR DRIVER HSOC Block Diagram REFIN 2 VOLTAGE MARGINING SOURCE OCP OTA SOFT-START AND FAULT LOGIC PWM COMP EA GATE CONTROL LOGIC OV/UV COMP SOURCE OCP OSCILLATOR PGOOD COMP G = -1 100µA SINKING OCP VMON PG_DLY PG LSOC VFF FS REFOUT 100µA MAR_CTRL BOOT UGATE OFS+ OFS- ISL6540 SS PHASE FB COMP PVCC VCC 800mV LGATE PGND VSEN+ GND GND VSEN- G=1 UNITY GAIN DIFF AMP FN9214.0 March 9, 2006 ISL6540 Typical Application I (Internal Linear Regulator with Remote Sense) +3.3V to +20V RCC LIN CF2 DBOOT CHFIN CBIN CF1 VCC VIN VFF CF3 Internal 5.6V Bias Linear Regulator PVCC RBOOT BOOT HSOC RHSOC CBOOT Q1 LOUT CHSOC UGATE VCC EN REFIN REFOUT PG CPG_DLY RFS PG_DLY FS PHASE LGATE PGND Q2 RLSOC CLSOC C2 C1 MARCTRL ROFS+ OFS+ RMARG ROFSOFSFB VMON VSEN+ CSEN ZFB R2 VOUT CBOUT CHFOUT ISL6540 LSOC 10Ω 10Ω COMP C3 R3 ZIN R1 RFB VSENSE+ ROS SS CSS LINDRV GND GND VSENVSENSE- 3 FN9214.0 March 9, 2006 ISL6540 Typical Application II (External Linear Regulator without Remote Sense) +3.3V to +20V LIN CF2 CLC RLC CF1 RCC VCC PVCC BOOT LINDRV VIN CF3 VFF REFOUT REFIN EN PG CPG_DLY RFS PG_DLY FS COMP PHASE LGATE PGND Q2 CHFOUT CBOUT CHSOC UGATE Q1 HSOC RHSOC CBOOT LOUT RBOOT DBOOT CHFIN CBIN RDRV VCC VOUT ISL6540 LSOC RLSOC CLSOC C2 C1 MARCTRL ROFS+ OFS+ FB VMON OFSVSEN+ SS CSS GND GND VSEN- ZFB C3 R3 ZIN R2 R1 RMARG ROFS- ROS VCC Rvmon1 RvmonOS 4 FN9214.0 March 9, 2006 ISL6540 Typical Application III (Dual Data Rate I or II) VDDQ 1.8V or 2.5V LIN 5V RCC CF1 VIN REN1 VFF EN REN2 CF4 UGATE 1K REFIN 15nF 1K DIMM REFOUT PG CPG_DLY RFS PG_DLY FS PHASE LGATE PGND Q2 RLSOC CHFOUT CBOUT VCC PVCC BOOT HSOC RHSOC CBOOT Q1 LOUT CF2 DBOOT CHFIN CBIN CHSOC VTT 1.25V (DDR I) 0.9V (DDR II) ISL6540 LSOC COMP CLSOC C2 ZFB C1 MARCTRL ROFS+ RMARG ROFSOFS+ FB VMON VSEN+ OFSVSENSS CSS LINDRV GND GND C3 R3 ZIN R2 R1 RFB CSEN 5 FN9214.0 March 9, 2006 ISL6540 Absolute Maximum Ratings Input Voltage, VIN, VFF . . . . . . . . . . . . . . . . . . . . . . -0.3V to +22.0V Driver Bias Voltage, PVCC . . . . . . . . . . . . . . . . . . . . -0.3V to +6.0V Signal Bias Voltage, VCC . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.0V Boot Voltage, VBOOT . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +36V Phase Voltage, VPHASE . . . . . . . . . . VBOOT - 6V to VBOOT + 0.3V Boot to Phase Voltage, VBOOT - VPHASE . . . . . . . . . . . . . . . . . . .6V Other Input or Output Voltages . . . . . . . . . . . . . -0.3V to VCC +0.3V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2 Thermal Information Thermal Resistance (Note 1, 2) θJA (°C/W) θJC (°C/W) QFN Package (Note 1, 2) . . . . . . . . . 32 5 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C Recommended Operating Conditions Input Voltage, VIN, VFF . . . . . . . . . . . . . . . . . . . . 3.3V to 20V ±10% Driver Bias Voltage, PVCC . . . . . . . . . . . . . . . . . . . . . . 2.9V to 5.6V Signal Bias Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . 2.9V to 5.6V Boot to Phase Voltage (Overcharged), VBOOT - VPHASE . . . . . .<6V Ambient Temperature Range . . . . . . . . . . . . . . . . . . . .-40°C to 85°C Junction Temperature Range. . . . . . . . . . . . . . . . . . .-40°C to 125°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. 2. θJC, "case temperature" location is at the center of the package underside exposed pad. See Tech Brief TB379 for details. 3. Test conditions identified as “GBD” are guaranteed by design simulation. Electrical Specifications SYMBOL INPUT SUPPLY CURRENTS IVCC IPVCC IVIN IPVCC_S IVCC_S IVIN_S PORVCC_R PORVCC_F PORVCC_H PORPVCC_R PORPVCC_F PORPVCC_H PORVFF_R PORVFF_F PORVFF_H ENABLE VEN_REF IEN_HYS VEN Recommended Operating Conditions, Unless Otherwise Noted TEST CONDITIONS MIN TYP MAX UNITS PARAMETER Nominal VCC Supply Current Nominal PVCC Supply Current Nominal Vin Supply Current Shutdown VCC Supply Current Shutdown PVCC Supply Current Shutdown VIN Supply Current VIN = VCC = PVCC = 5V, Fs = 600kHz, UGATE and LGATE Open VIN = VCC = PVCC = 5V; Fs = 600kHz, UGATE and LGATE Open VIN = VCC = PVCC = 5V; Fs = 600kHz, UGATE and LGATE Open EN = 0V, VCC = PVCC = VIN = 5V EN = 0V, VCC = PVCC = VIN = 5V EN = 0V, VCC = PVCC = VIN = 5V - 8 5 1 7 1 1 - mA mA mA mA mA mA POWER-ON RESET Rising VCC Threshold Falling VCC Threshold VCC Hysterisis Rising PVCC Threshold Falling PVCC Threshold PVCC Hysterisis Rising VFF Threshold Falling VFF Threshold VFF Hysterisis 2.58 184 2.58 187 1.35 124 202 204 135 2.90 217 2.90 223 1.54 146 V V mV V V mV V V mV Input Reference Voltage Hysteresis Source Current Maximum Input Voltage 0.480 7 - 0.496 10 VCC+0.3 0.512 15 - V µA V 6 FN9214.0 March 9, 2006 ISL6540 Electrical Specifications SYMBOL OSCILLATOR OSCRANGE ∆OSCCOM ∆OSCIND ∆VOSC VOSC_MIN VFF PWM DMAX DMIN VREFIN VREFIN_OS IREFOUT VREFOUT VREFOUT_OS CREFOUT_MIN VREFIN_DIS REFERENCE VREF_COM VREF_IND VSYS_COM VSYS_IND ERROR AMPLIFIER DC Gain UGBW SR Unity Gain-Bandwidth Slew Rate RL = 10K, CL = 100p, at COMP Pin RL = 10K, CL = 100p, at COMP Pin RL = 10K, CL = 100p, at COMP Pin Standard Instrumentation A




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