Advanced PWM and Triple Linear Power Controller

TM ISL6440A Data Sheet October 2001 File Number 9041 Advanced PWM and Triple Linear Power Controller for Gateway Applications The ISL6440A provides the power control and protection for four output voltages required by microprocessors used in high-performance, graphics-intensive gateway applications. The IC integrates a voltage-mode PWM controller and three linear controllers, as well as the monitoring and protection functions into a 28 lead SOIC package. The synchronous rectified buck converter includes an Intel®compatible, TTL five-input, digital-to-analog converter (DAC) that adjusts the core PWM output voltage from 1.3VDC to 2.05VDC in 0.05V steps and from 2.1V DC to 3.5VDC in 0.1V increments. The precision reference and voltage-mode control provide ±1% static regulation. A TTL-compatible signal applied to the SELECT pin dictates which method of control is used for the AGP bus power. A low state results in linear control of the AGP bus to 1.5V, while a high state transitions the output through a linearly controlled soft-start to 3.3V, followed by full enhancement of the external MOSFET to pass the input voltage. The other two linear regulators provide fixed output voltages of 1.5V GTL bus power and 1.8V power for the north/south bridge core and/or cache memory. These levels are user-adjustable by means of an external resistor divider and pulling the FIX pin low. All linear controllers can employ either N-Channel MOSFETs or bipolar NPNs for the pass transistor. The ISL6440A monitors all the output voltages. A single power good signal is issued when the core is within ±10% of the DAC setting and all other outputs are above their undervoltage levels. Additional built-in overvoltage protection for the core output uses the lower MOSFET to prevent output voltages above 115% of the DAC setting. The PWM controller’s overcurrent function monitors the output current by using the voltage drop across the upper MOSFET’s rDS(ON). Features • Provides four regulated voltages - Microprocessor core, AGP bus, memory, and GTL bus power • Drives N-Channel MOSFETs • Linear regulator drives compatible with both MOSFET and bipolar series pass transistors • Fixed or externally resistor-adjustable linear outputs • Simple single-loop control design - Voltage-mode PWM control • Fast PWM converter transient response - High-bandwidth error amplifier - Full 0–100% duty ratio • Excellent output voltage regulation - Core PWM output: ±1% over temperature - Other outputs: ±3% over temperature • TTL-compatible 5-bit DAC core output voltage selection - Shutdown feature removed when all inputs high - Wide range 1.3VDC to 3.5VDC • Power-good output voltage monitor • Overvoltage and overcurrent fault monitors - Switching regulator does not require extra current Sensing element, uses upper MOSFET’s rDS(ON) • Small converter size - Constant frequency operation - 200kHz free-running oscillator; programmable from 50kHz to over 1MHz - Small external component count Applications • Power regulation for gateway processors Pinout DRIVE2 1 FIX 2 VID4 3 VID3 4 VID2 5 VID1 6 VID0 7 PGOOD 8 SD 9 ISL6440A (SOIC) TOP VIEW 28 VCC 27 UGATE 26 PHASE 25 LGATE 24 PGND 23 OCSET 22 VSEN1 21 FB 20 COMP 19 VSEN3 18 DRIVE3 17 GND 16 VAUX 15 DRIVE4 Ordering Information PART NUMBER ISL6440ACB TEMP. RANGE ( oC) 0 to 70 PACKAGE 28 Ld SOIC PKG. NO. M28.3 VSEN2 10 SELECT 11 SS 12 FAULT/RT 13 VSEN4 14 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2001. All Rights Reserved Intel® is a registered trademark of Intel Corporation. Block Diagram VSEN3 FIX SD VSEN1 OCSET VCC VAUX POWER-ON x 1.10 RESET (POR) + x 0.90 + + 1.26V LINEAR UNDERVOLTAGE + x 1.15 LUV + PGOOD 200µA + x 0.75 OV SOFTINHIBIT START AND FAULT FAULT LOGIC OC1 + ERROR AMP1 + + GATE CONTROL PWM COMP1 PWM1 VCC LGATE SYNCH DRIVE DACOUT PGND GND + VCC 28µA OSCILLATOR 4.5V TTL D/A CONVERTER (DAC) FAULT / RT SS FB COMP VID0 VID2 VID4 VID1 VID3 VAUX ISL6440A VSEN2 + SELECT - 1.5V OR 3.3VIN + 2 DRIVE3 + DRIVE4 + - VSEN4 DRIVE1 VCC UGATE PHASE DRIVE2 x 0.75 ISL6440A Simplified Power System Diagram +5VIN +3.3VIN LINEAR CONTROLLER PWM CONTROLLER Q2 Q1 Q3 VOUT2 VOUT1 ISL6440A VOUT3 Q4 LINEAR CONTROLLER LINEAR CONTROLLER Q5 VOUT4 Typical Application +12VIN +5VIN LIN CIN VCC OCSET +3.3VIN PGOOD VOUT2 1.5V OR 3.3VIN Q3 DRIVE2 VSEN2 POWERGOOD UGATE PHASE Q1 LOUT1 VOUT1 1.3V TO 3.5V COUT2 LGATE SELECT VAUX PGND VSEN1 Q2 COUT1 TYPEDET ISL6440A VOUT3 1.5V Q4 DRIVE3 VSEN3 FB COMP COUT3 FIX FAULT / RT VID0 Q5 VOUT4 1.8V DRIVE4 VSEN4 SS CSS GND VID1 VID2 VID3 COUT4 VID4 3 ISL6440A Absolute Maximum Ratings Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +15V PGOOD, RT/FAULT, DRIVE, PHASE, and GATE Voltage . . . . . . . . . . . . . . . . GND -0.3V to VCC + 0.3V Input, Output or I/O Voltage . . . . . . . . . . . . . . . . . . GND -0.3V to 7V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 Thermal Information Thermal Resistance (Typical, Note 1) θJA (oC/W) Operating Conditions Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10% Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . 0oC to 70oC Junction Temperature Range. . . . . . . . . . . . . . . . . . . 0oC to 125oC SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications PARAMETER VCC SUPPLY CURRENT Nominal Supply Current POWER-ON RESET Rising VCC Threshold Falling VCC Threshold Rising VAUX Threshold VAUX Threshold Hysteresis Rising VOCSET Threshold OSCILLATOR Free Running Frequency Total Variation Ramp Amplitude DAC AND BANDGAP REFERENCE DAC(VID0-VID4) Input Low Voltage DAC(VID0-VID4) Input High Voltage DACOUT Voltage Accuracy Bandgap Reference Voltage Bandgap Reference Tolerance LINEAR REGULATORS (OUT2, OUT3, AND OUT4) Regulation (All Linears) VSEN2 Regulation Voltage VSEN3 Regulation Voltage VSEN4 Regulation Voltage Undervoltage Level (VSEN/VREG) Undervoltage Hysteresis (VSEN/VREG) Output Drive Current (All Linears) VREG2 VREG3 VREG4 VSEN UV VSEN Rising VSEN Falling VAUX-VDRIVE > 0.6V Except OUT2 when SELECT > 2.0V SELECT < 0.8V 20 3 1.5 1.5 1.8 75 7 40 % V V V % % mA VBG 2.0 -1.0 -2.5 1.265 0.8 +1.0 +2.5 V V % V % ∆VOSC FOSC RT = OPEN 6kΩ < RT to GND < 200kΩ RT = Open 185 -15 200 1.9 215 +15 kHz % VP-P VOCSET = 4.5V VOCSET = 4.5V VOCSET = 4.5V VOCSET = 4.5V 8.2 2.5 0.5 1.26 10.4 V V V V V ICC UGATE, LGATE, DRIVE2, DRIVE3, and DRIVE4 Open 9 mA Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System Diagrams, and Typical Application Schematic SYMBOL TEST CONDITIONS MIN TYP MAX UNITS SYNCHRONOUS PWM CONTROLLER ERROR AMPLIFIER 4 ISL6440A Electrical Specifications PARAMETER DC Gain Gain-Bandwidth Product Slew Rate PWM CONTROLLER GATE DRIVER UGATE Source UGATE Sink LGATE Source LGATE Sink PROTECTION VSEN1 Overvoltage (VSEN1/DACOUT) FAULT Sourcing Current OCSET1 Current Source Soft-Start Current POWER GOOD VSEN1 Upper Threshold (VSEN1/DACOUT) VSEN1 Undervoltage (VSEN1/DACOUT) VSEN1 Hysteresis (VSEN1/DACOUT) PGOOD Voltage Low VPGOOD VSEN1 Rising VSEN1 Rising Upper/Lower Threshold IPGOOD = -4mA 108 92 2 110 94 0.8 % % % V IOVP IOCSET ISS VSEN1 Rising VFAULT/RT = 2.0V VOCSET = 4.5VDC 170 115 8.5 200 28 120 230 % mA µA µA IUGATE RUGATE ILGATE RLGATE VCC = 12V, VUGATE = 6V VGATE-PHASE = 1V VCC = 12V, VLGATE = 1V VLGATE = 1V 1 1.7 1 1.4 3.5 3.0 A Ω A Ω GBWP SR COMP = 10pF Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System Diagrams, and Typical Application Schematic (Continued) SYMBOL TEST CONDITIONS MIN TYP 88 15 6 MAX UNITS dB MHz V/µs Typical Performance Curve 1000 RESISTANCE (kΩ) RT PULLUP TO +12V 100 10 RT PULLDOWN TO VSS 10 100 SWITCHING FREQUENCY (kHz) 1000 FIGURE 1. R T RESISTANCE vs FREQUENCY 5 ISL6440A Functional Pin Descriptions VCC (Pin 28) Provide a 12V bias supply for the IC to this pin. This pin also provides the gate bias charge for all the MOSFETs controlled by the IC. The voltage at this pin is monitored for power-on reset (POR) purposes. internal circuitry insures the core output voltage does not go negative during this process. When re-enabled, the IC undergoes a new soft-start cycle. Left open, this pin is pulled low by an internal pull-down resistor, enabling operation. FIX (Pin 2) Grounding this pin bypasses the internal resistor dividers that set the output voltage of the 1.5V and 1.8V linear regulators. This way, the output voltage of the two regulators can be adjusted from 1.26V up to the input voltage (+3.3V or +5V) by way of an external resistor divider connected at the corresponding VSEN pin. The new output voltage set by the external resistor divider can be determined using the following formula: R OUT   V OU T = 1.265V ×  1 + ---------------- R GND  GND (Pin 17) Signal ground for the IC. All voltage levels are measured with respect to this pin. PGND (Pin 24) This is the power ground connection. Tie the synchronous PWM converter’s lower MOSFET source to this pin. V