High-Performance Notebook PWM Controller

® ISL6269A Data Sheet August 7, 2006 FN9253.1 High-Performance Notebook PWM Controller The ISL6269A IC is a Single-Phase Synchronous-Buck PWM controller featuring Intersil's Robust Ripple Regulator (R3) technology that delivers truly superior dynamic response to input voltage and output load transients. Integrated MOSFET drivers and bootstrap diode result in fewer components and smaller implementation area. Intersil’s R3 technology combines the best features of fixedfrequency PWM and hysteretic PWM while eliminating many of their shortcomings. R3 technology employs an innovative modulator that synthesizes an AC ripple voltage signal VR, analogous to the output inductor ripple current. The AC signal VR enters a window comparator where the lower threshold is the error amplifier output VCOMP, and the upper threshold is a programmable voltage reference VW, resulting in generation of the PWM signal. The voltage reference VW sets the steady-state PWM frequency. Both edges of the PWM can be modulated in response to input voltage transients and output load transients, much faster than conventional fixed-frequency PWM controllers. Unlike a conventional hysteretic converter, the ISL6269A has an error amplifier that provides ±1% voltage regulation at the FB pin. The ISL6269A has a 1.5ms digital soft-start and can be started into a pre-biased output voltage. A resistor divider is used to program the output voltage setpoint. The ISL6269A can be configured to operate in continuous-conductionmode (CCM) or diode-emulation-mode (DEM), which improves light-load efficiency. In CCM the controller always operates as a synchronous rectifier however, when DEM is enabled the low-side MOSFET is permitted to stay off, blocking negative current flow into the low-side MOSFET from the output inductor. Features • High performance R3 technology • Fast transient response • ±1% regulation accuracy: -10°C to +100°C • Wide input voltage range: +7.0V to +25.0V • Output voltage range: +0.6V to +3.3V • Wide output load range: 0A to 25A • Selectable diode emulation mode for increased light load efficiency • Programmable PWM frequency: 200kHz to 600kHz • Pre-biased output start-up capability • Integrated MOSFET drivers and bootstrap diode • Internal digital soft-start • Power good monitor • Fault protection - Undervoltage protection - Soft crowbar overvoltage protection - Low-side MOSFET rDS(on) overcurrent protection - Over-temperature protection - Fault identification by PGOOD pull down resistance Applications • PCI express graphical processing unit • Auxiliary power rail • VRM • Network adapter Ordering Information PART PART NUMBER MARKING TEMP (°C) ISL6269ACRZ (See Note) PACKAGE PKG. DWG. # Pinout ISL6269A (4x4 QFN) TOP VIEW PGOOD PHASE BOOT 6269ACRZ -10 to +100 16 Ld 4x4 QFN L16.4x4 (Pb-Free) L16.4x4 UG 16 VIN VCC FCCM EN 1 2 3 4 5 COMP 15 14 13 12 PVCC ISL6269ACRZ-T 6269ACRZ 16 Ld 4x4 QFN Tape and (See Note) Reel (Pb-Free) GND 11 LG 10 PGND 9 ISEN NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 6 FB 7 FSET 8 VO 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005-2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Block Diagram VIN VO GND PACKAGE BOTTOM PWM FREQUENCY CONTROL VREF FSET VCC EN gmVIN VW + − + PWM − OVP UVP + EA FB COMP ISEN IOC DRIVER POR DIGITAL SOFT-START PWM CONTROL PHASE SHOOT THROUGH PROTECTION PVCC UG − OCP 30Ω 90Ω PGOOD FIGURE 1. SCHEMATIC BLOCK DIAGRAM − − + gmVO + − CR VCOMP + BOOT 60Ω DRIVER 150°OT PGND FCCM FN9253.1 August 7, 2006 − + VR − R Q S + − + + − 2 ISL6269A LG ISL6269A Typical Application ISL6269A VIN 7V-25V PGOOD VIN RPGOOD CIN 5V PVCC UG QHIGH_SIDE RVCC VCC BOOT CPVCC CVCC GND CBOOT PHASE LOUT VOUT 0.6V-3.3V RSEN FCCM ISEN COUT QLOW_SIDE EN LG RCOMP COMP PGND CCOMP1 FB CCOMP2 RBOTTOM RTOP VO FSET RFSET CFSET 3 FN9253.1 August 7, 2006 ISL6269A Absolute Voltage Ratings ISEN, VIN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +28V VCC, PGOOD to GND . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +7.0V PVCC to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +7.0V GND to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V EN, FCCM . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to GND, VCC +3.3V PHASE to GND (DC) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +28V (<100ns Pulse Width, 10µJ) . . . . . . . . . . . . . . . . . . . . . . . . . -5.0V BOOT to GND, or PGND . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +33V BOOT to PHASE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +7V UG (DC) . . . . . . . . . . . . . . . . . . . . . . .-0.3V to PHASE, BOOT +0.3V (<200ns Pulse Width, 20µJ) . . . . . . . . . . . . . . . . . . . . . . . . . -4.0V LG (DC) . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to PGND, PVCC +0.3V (<100ns Pulse Width, 4µJ) . . . . . . . . . . . . . . . . . . . . . . . . . . -2.0V Thermal Information Thermal Resistance (Typical, Notes 1, 2) θJA (°C/W) θJC (°C/W) QFN Package. . . . . . . . . . . . . . . . . . . . 43 11.5 Junction Temperature Range. . . . . . . . . . . . . . . . . .-55°C to +150°C Operating Temperature Range . . . . . . . . . . . . . . . .-10°C to +100°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Lead Temperature (Soldering, 10s) . . . . . . . . . . . . . . . . . . . . +300°C Recommended Operating Conditions Ambient Temperature Range. . . . . . . . . . . . . . . . . . . -10°C to 100°C Supply Voltage (VIN to GND) . . . . . . . . . . . . . . . . . . . . . . 7V to 25V VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ±5% PVCC to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ±5% CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. NOTES: 1. θJA is measured with the component mounted on a highly effective thermal conductivity test board on free air. See Tech Brief TB379 for details. 2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications PARAMETER VIN VIN Input Bias Current VIN Shutdown Current VCC and PVCC VCC Input Bias Current VCC Shutdown Current PVCC Shutdown Current VCC POR THRESHOLD These specifications apply for VIN = 15V, TA = -10°C to +100°C, unless otherwise stated. All typical specifications TA = +25°C, VCC = 5V, PVCC = 5V SYMBOL TEST CONDITIONS MIN TYP MAX UNIT IVIN EN = 5V, VIN = 7V EN = 5V, VIN = 25V - 6.5 26 0.1 10 35 1.0 µA µA µA IVIN_SHDN EN = GND, VIN = 25V IVCC IVCC_SHDN EN = 5V, FCCM = GND, FB = 0.65V, VIN = 7V to 25V EN = GND, VCC = 5V - 1.7 0.1 0.1 2.5 1.0 1.0 mA µA µA IPVCC_SHDN EN = GND, PVCC = 5V Rising VCC POR Threshold Voltage Falling VCC POR Threshold Voltage REGULATION Reference Voltage Regulation Accuracy PWM Frequency Range Frequency-Set Accuracy VO Range VO Input Leakage ERROR AMPLIFIER FB Input Bias Current COMP Source Current COMP Sink Current COMP High Clamp Voltage COMP Low Clamp Voltage VVCC_THR V VCC_THF 4.35 4.10 4.45 4.20 4.55 4.30 V V VREF FB connected to COMP -1 0.6 - +1 V % FSW FCCM = 5V FSW = 300kHz 200 -12 0.60 1.3 7.0 600 +12 3.30 - kHz % V µA µA VVO IVO VO = 0.60V VO = 3.30V - IFB FB = 0.60V -0.5 3.10 0.09 2.5 0.3 3.40 0.15 +0.5 3.65 0.21 µA mA mA V V ICOMP_SRC FB = 0.40V, COMP = 3.20V ICOMP_SNK VCOMP_HC VCOMP_LC FB = 0.80V, COMP = 0.30V FB = 0.40V, Sink 50µA FB = 0.80V, Source 50µA 4 FN9253.1 August 7, 2006 ISL6269A Electrical Specifications PARAMETER POWER GOOD RPG_SS PGOOD Pull Down Impedance RPG_UV RPG_OV RPG_OC PGOOD Leakage Current PGOOD Maximum Sink Current (Note 3) PGOOD Soft-Start Delay GATE DRIVER UG Pull-Up Resistance UG Source Current (Note 3) UG Sink Resistance UG Sink Current (Note 3) LG Pull-Up Resistance LG Source Current (Note 3) LG Sink Resistance LG Sink Current (Note 3) UG to LG Deadtime LG to UG Deadtime BOOTSTRAP DIODE Forward Voltage Reverse Leakage CONTROL INPUTS EN High Threshold EN Low Threshold FCCM High Threshold FCCM Low Threshold EN Leakage VENTHR VENTHF VFCCMTHR VFCCMTHF IENL IENH FCCM Leakage PROTECTION ISEN OCP Threshold ISEN Short-Circuit Threshold UVP Threshold OVP Rising Threshold OVP Falling Threshold OTP Rising Threshold (Note 3) OTP Hysteresis (Note 3) NOTE: 3. Guaranteed by characterization. IOC ISC VUV VOVR VOVF TOTR TOTHYS ISEN sourcing ISEN sourcing 19 81 113 100 26 50 84 116 103 150 25 33 87 119 106 µA µA % % % °C °C IFCCML IFCCMH EN = 0V EN = 5.0V FCCM = 0V FCCM = 5.0V 2.0 2.0 0.1 0.1 0.1 2.0 1.0 1.0 1.0 1.0 1.0 V V V V µA µA µA µA VF IR PVCC = 5V, IF = 2mA VR = 25V 0.58 0.2 V µA RUGPU IUGSRC RUGPD IUGSNK RLGPU ILGSRC RLGPD ILGSNK tUGFLGR tLGFUGR 200mA Source Current UG - PHASE = 2.5V 250mA Sink Current UG - PHASE = 2.5V 250mA Source Current LG - PGND = 2.5V 250mA Sink Current LG - PGND = 2.5V UG falling to LG rising, no load LG falling to UG rising, no load 1.0 2.0 1.0 2.0 1.0 2.0 0.5 4.0 21 14 1.5 1.5 1.5 0.9 Ω A