Highly Integrated Narrow VDC Battery Charger

® ISL6257 Data Sheet January 17, 2007 FN9288.2 Highly Integrated Narrow VDC Battery Charger for Notebook Computers The ISL6257 is a highly integrated battery charger controller for Li-Ion/Li-Ion polymer batteries. ISL6257 is designed for Narrow VDC applications where the system power source is either the battery pack or the regulated output of the charger. This makes the max voltage to the system equal to the max battery voltage instead of the max adapter voltage. Operating at lower system voltage can improve overall efficiency. High efficiency is achieved in the charger with a synchronous buck topology. The low-side MOSFET emulates a diode at light loads to improve the light load efficiency and prevent system bus boosting. The constant output voltage can be selected for 2, 3 and 4 series Li-Ion cells with ±0.5% accuracy over temperature. It can also be programmed between 4.2V + 5% per cell and 4.2V - 5% per cell to optimize battery capacity. When supplying the load and battery charger simultaneously, the input current limit for the AC adapter is programmable to within ±3% accuracy to avoid overloading the AC adapter and to allow the system to make efficient use of available adapter power for charging. It also has a wide range of programmable charging current. The ISL6257 automatically transitions from regulating current mode to regulating voltage mode. Features • • • • • • • • • • • • • • • • • • • • ±0.5% Charge Voltage Accuracy (-10°C to +100°C) ±3% Accurate Input Current Limit ±3% Accurate Battery Charge Current Limit ±25% Accurate Battery Trickle Charge Current Limit Programmable Charge Current Limit, Adapter Current Limit and Charge Voltage Fixed 300kHz PWM Synchronous Buck Controller with Diode Emulation at Light Load AC Adapter Present Indicator Fast Input Current Limit Response Input Voltage Range 7V to 25V Support 2, 3 and 4 Cells Battery Pack Up to 17.64V Battery-Voltage Set Point Control Adapter Power Source Select MOSFET Thermal Shutdown Aircraft Power Capable DC Adapter Present Indicator Battery Discharge MOSFET Control Less than 10µA Battery Leakage Current Support Pulse Charging Charge any Battery Chemistry: Li-Ion, NiCd, NiMH, etc. Pb-Free Plus Anneal Available (RoHS Compliant) Ordering Information PART NUMBER (Notes 1, 2) ISL6257HRZ PART TEMP MARKING RANGE (°C) PACKAGE (Pb-free) PKG. DWG. # Applications • Notebook, Desknote and Sub-notebook Computers • Personal Digital Assistant ISL6257HRZ -10 to +100 28 Ld 5x5 QFN L28.5×5 Pinout ISL6257 (28 LD QFN) TOP VIEW DCPRN ACPRN 23 DCSET ACSET CSON 22 21 20 19 18 17 16 15 8 ACLIM 9 VADJ 10 GND 11 PGND 12 LGATE 13 VDDP 14 BOOT CSOP CSIN CSIP SGATE BGATE PHASE UGATE DCIN 25 VDD 26 ISL6257HRZ-T ISL6257HRZ -10 to +100 28 Ld 5x5 QFN L28.5×5 Tape & Reel NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 28 EN CELLS ICOMP VCOMP FB VREF CHLIM 1 2 3 4 5 6 7 27 24 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006-2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL6257 Absolute Maximum Ratings DCIN, CSIP, CSON to GND. . . . . . . . . . . . . . . . . . . . . -0.3V to +28V CSIP-CSIN, CSOP-CSON . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V CSIP-SGATE, CSIP-BGATE . . . . . . . . . . . . . . . . . . . . . -0.3V to 16V PHASE to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V to 30V BOOT to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +35V BOOT to VDDP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2V to 28V ACLIM, ACPRN, CHLIM, DCPRN, VDD to GND. . . . . . . -0.3V to 7V BOOT-PHASE, VDDP-PGND . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V ACSET and DCSET to GND (Note 1) . . . . . . . -0.3V to VDD + 0.3V FB, ICOMP, VCOMP to GND. . . . . . . . . . . . . . -0.3V to VDD + 0.3V VREF, CELLS to GND . . . . . . . . . . . . . . . . . . . -0.3V to VDD + 0.3V EN, VADJ, PGND to GND . . . . . . . . . . . . . . . . -0.3V to VDD + 0.3V UGATE. . . . . . . . . . . . . . . . . . . . . . . . PHASE-0.3V to BOOT + 0.3V LGATE . . . . . . . . . . . . . . . . . . . . . . . . . PGND-0.3V to VDDP + 0.3V PGND to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V Thermal Information Thermal Resistance θJA (°C/W) θJC (°C/W) QFN Package (Notes 2, 3). . . . . . . . . . 39 9.5 QSOP Package (Note 2) . . . . . . . . . . . 80 NA Junction Temperature Range. . . . . . . . . . . . . . . . . .-10°C to +150°C Operating Temperature Range . . . . . . . . . . . . . . . .-10°C to +100°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . +300°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. ACSET and DCSET may be operated 1V below GND if the current through ACSET and DCSET is limited to less than 1mA. 2. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 3. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = DCSET = 1.5V, ACLIM = VREF, VADJ = Floating, EN = VDD = 5V, BOOT - PHASE = 5.0V, GND = PGND = 0V, CVDD = 1µF, IVDD = 0mA, TA = -10°C to +100°C, TJ ≤ +125°C, unless otherwise noted. TEST CONDITIONS MIN TYP MAX UNITS PARAMETER SUPPLY AND BIAS REGULATOR DCIN Input Voltage Range DCIN Quiescent Current Battery Leakage Current (Note 4) VDD Output Voltage/Regulation VDD Undervoltage Lockout Trip Point 7 EN = VDD or GND, 7V ≤ DCIN ≤ 25V DCIN = 0, no load 7V ≤ DCIN ≤ 25V, 0 ≤ IVDD ≤ 30mA VDD Rising Hysteresis 4.925 4.0 150 2.365 2.065 CSON = 16.8V, CELLS = VDD, VADJ = Float CSON = 12.6V, CELLS = GND, VADJ = Float CSON = 8.4V, CELLS = Float, VADJ = Float CSON = 17.64V, CELLS = VDD, VADJ = VREF CSON = 13.23V, CELLS = GND, VADJ = VREF CSON = 8.82V, CELLS = Float, VADJ = VREF CSON = 15.96V, CELLS = VDD, VADJ = GND CSON = 11.97V, CELLS = GND, VADJ = GND CSON = 7.98V, CELLS = Float, VADJ = GND -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 1.4 3 5.075 4.4 250 2.39 2.1 25 3 10 5.225 4.6 400 2.415 2.12 0.5 0.5 0.5 0.5 0.5 0.5 0.5 0.5 0.5 V mA µA V V mV V V % % % % % % % % % Reference Output Voltage VREF FB Feedback Voltage Battery Charge Voltage Accuracy 0 ≤ IVREF ≤ 300µA TRIP POINTS ACSET Threshold ACSET Input Bias Current Hysteresis ACSET Input Bias Current ACSET ≥ 1.26V 1.24 2.2 2.2 1.26 3.4 3.4 1.28 4.4 4.4 V µA µA 2 FN9288.2 January 17, 2007 ISL6257 Electrical Specifications DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = DCSET = 1.5V, ACLIM = VREF, VADJ = Floating, EN = VDD = 5V, BOOT - PHASE = 5.0V, GND = PGND = 0V, CVDD = 1µF, IVDD = 0mA, TA = -10°C to +100°C, TJ ≤ +125°C, unless otherwise noted. (Continued) TEST CONDITIONS ACSET < 1.26V MIN -1 1.24 2.2 DCSET ≥ 1.26V DCSET < 1.26V 2.2 -1 TYP 0 1.26 3.4 3.4 0 MAX 1 1.28 4.4 4.4 1 UNITS µA V µA µA µA PARAMETER ACSET Input Bias Current DCSET Threshold DCSET Input Bias Current Hysteresis DCSET Input Bias Current DCSET Input Bias Current OSCILLATOR Frequency PWM Ramp Voltage (peak-peak) CSIP = 18V CSIP = 11V SYNCHRONOUS BUCK REGULATOR Maximum Duty Cycle UGATE Pull-Up Resistance UGATE Source Current UGATE Pull-Down Resistance UGATE Sink Current LGATE Pull-Up Resistance LGATE Source Current LGATE Pull-Down Resistance LGATE Sink Current Dead Time 245 300 1.6 1 355 kHz V V 97 BOOT - PHASE = 5V, 500mA source current BOOT - PHASE = 5V, BOOT-UGATE = 2.5V BOOT - PHASE = 5V, 500mA sink current BOOT - PHASE = 5V, UGATE - PHASE = 2.5V VDDP - PGND = 5V, 500mA source current VDDP - PGND = 5V, VDDP - LGATE = 2.5V VDDP - PGND = 5V, 500mA sink current VDDP - PGND = 5V, LGATE = 2.5V Falling UGATE to rising LGATE or falling LGATE to rising UGATE 10 99 1.8 1.0 1.0 1.8 1.8 1.0 1.0 1.8 99.6 3.0 % Ω A 1.8 Ω A 3.0 Ω A 1.8 Ω A 30 ns CHARGING CURRENT SENSING AMPLIFIER Input Common-Mode Range Input Offset Voltage Input Bias Current at CSOP Input Bias Current at CSON CHLIM Input Voltage Range CSOP to CSON Full-Scale Current Sense Voltage CHLIM = 3.3V (4V