Highly Integrated Battery Charger

Part  Number ISL6253
Manufacturer Intersil Corporation
Semiconductor DataSheet

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® ISL6253 Data Sheet August 2004 FN9117.2 Highly Integrated Battery Charger for Notebook Computers The ISL6253 is a highly integrated battery charger controller for Li-Ion/Li-Polymer batteries. High Efficiency is achieved by a synchronous buck topology and the use of a MOSFET, instead of a diode, for selecting power from the adapter or battery. The low side MOSFET emulates a diode at light loads to improve the light load efficiency and prevent system bus boosting. The constant output voltage can be selected for 2, 3 or 4 series Li-Ion cells with 0.5% accuracy over temperature. It can also be programmed between 4.2V +5% per cell and 4.2V -5% per cell to optimize battery capacity. When supplying the load and battery charger simultaneously, the input current limit for the AC adapter is programmable to within 3% accuracy to avoid overloading the AC adapter, and to allow the system to make efficient use of available adapter power for charging. It also has programmable charging current with 4% accuracy. The ISL6253 provides outputs that are used to monitor the current drawn from the AC adapter, and to monitor for the presence of an AC adapter. The ISL6253 automatically transitions from regulating current to regulating voltage. A conditioning charge feature provides approximately 10% of full scale charge current to safely charge deeply discharged lithiumion (LI+) battery packs when the battery voltage is below 3.0V/cell. ISL6253 has a feature of automatic power source selection by switching to the battery when the AC adapter is removed or switching to the AC adapter when the AC adapter is available. It also supports aircraft power applications while powering the system and not charging the battery. Features • ±0.5% Voltage Accuracy • ±3% Input Current Limit Accuracy • ±4% Accurate Battery Charge Current Limit • Programmable Charge Limit Current, Adaptor Current Limit and Charge Voltage • Fixed 300kHz PWM Synchronous Buck Controller with Diode Emulation at Light Load • Output for Current Drawn from the AC Adapter • AC Adapter Present Indicator • Fast Input Current Limit Response • Input Voltage Range 7V to 25V • Up to 17.6V Battery-Voltage Set Point • Trickle Charge Mode When Battery Voltage is below 3.0V/Cell • Supports 2, 3 and 4 Cell Battery Packs • Control Adapter Power Source Select MOSFET • Thermal Shutdown • Aircraft Power Capable • DC Adapter Present Indicator • Battery Discharge MOSFET Control • Less than 10µA Battery Leakage Current • QFN Package - Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat No Leads - Package Outline - Near Chip Scale Package footprint, which improves PCB efficiency and has a thinner profile • Pb-free Available Ordering Information PART # ISL6253HRZ (Note 1) ISL6253HAZ (Note 1) NOTES: 1. Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B. 2. Add “-T” for Tape and Reel. TEMP. RANGE (°C) -10 to 100 -10 to 100 PACKAGE 28 Ld 5x5 QFN (Pb-free) 28 Ld QSOP (Pb-free) PKG. DWG. # L28.5x5 M28.15 Applications • Notebook, Desknote and Sub-notebook Computers • Personal Digital Assistants 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL6253 Pinouts ISL6253 (28 LD QFN) TOP VIEW DCPRN ACPRN DCSET ACSET CSON DCIN VDD DCIN VDD ACSET 21 20 19 18 17 16 15 8 ACLIM 9 VADJ 10 GND 11 PGND 12 LGATE 13 VDDP 14 BOOT CSOP CSIN CSIP SGATE BGATE PHASE UGATE DCSET EN CELLS ICOMP VCOMP ICM ICM VREF CHLIM 5 6 7 VREF CHLIM ACLIM VADJ GND ISL6253 (28 LD QSOP) TOP VIEW 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 DCPRN 27 ACPRN 26 CSON 25 CSOP 24 CSIN 23 CSIP 22 SGATE 21 BGATE 20 PHASE 19 UGATE 18 BOOT 17 VDDP 16 LGATE 15 PGND 28 EN CELLS ICOMP VCOMP 1 2 3 4 27 26 25 24 23 22 2 ISL6253 Absolute Maximum Ratings DCIN, CSIP, DCPRN, ACPRN, CSON to GND . . . . . . -0.3V to +28V CSIP-CSIN, CSOP-CSON . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V CSIP-SGATE, CSIP-BGATE . . . . . . . . . . . . . . . . . . . . . -0.3V to 16V PHASE to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V to 28V BOOT to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +35V BOOT-PHASE, VDD-GND, VDDP-PGND . . . . . . . . . . . . -0.3V to 7V ICM, ICOMP, VCOMP . . . . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V ACSET and DCSET to GND (Note 3) . . . . . . . . -0.8V to VDD+0.3V VDDP, ACLIM, CHLIM, VREF, CELLS. . . . . . . . -0.3V to VDD+0.3V EN, VADJ, PGND to GND . . . . . . . . . . . . . . . . . -0.3V to VDD+0.3V UGATE. . . . . . . . . . . . . . . . . . . . . . . . . PHASE-0.3V to BOOT+0.3V LGATE . . . . . . . . . . . . . . . . . . . . . . . . . . PGND-0.3V to VDDP+0.3V Thermal Information Thermal Resistance θJA (°C/W) θJC (°C/W) QFN Package (Notes 4, 6). . . . . . . . . . 39 9.5 QSOP Package (Note 5) . . . . . . . . . . . 80 NA ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1 Junction Temperature Range. . . . . . . . . . . . . . . . . .-10°C to +150°C Operating Temperature Range . . . . . . . . . . . . . . . .-10°C to +100°C Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Lead Temperature (soldering, 10s).. . . . . . . . . . . . . . . . . . . . +300°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress ratings only and operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. NOTES: 3. When the voltage across ACSET and DCSET is below 0V, the current through ACSET and DCSET should be limited less than 1mA. 4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 5. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 6. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = DCSET = 1.5V, VREF = ACLIM = CHLIM, VADJ = Floating, EN = VDD = 5V, BOOT-PHASE = 5.0V, GND = PGND = 0V, CVDD = 1µF IVDD = 0mA, TA = -10°C to +100°C, TJ ≤ 125°C, unless otherwise noted. TEST CONDITIONS MIN TYP MAX UNITS PARAMETER SUPPLY AND BIAS REGULATOR DCIN Input Voltage Range DCIN Quiescent Current DCIN Quiescent Current in Shutdown mode Battery Leakage Current (Note 5) VDD Output Voltage/Regulation VDD Undervoltage Lockout Trip Point 7 EN = VDD, 7V < DCIN < 25V EN = 0, 7V < DCIN < 25V DCIN = 0, no load 7V < DCIN < 25 V, 0 < IVDD < 30mA Rising Hysteresis O < IVREF < 300µA CSON = 16.8V, CELLS = VDD, VADJ = Float CSON = 12.6V, CELLS = GND, VADJ = Float CSON = 8.4V, CELLS = FLOAT, VADJ = Float CSON = 17.64V, CELLS = VDD, VADJ = VREF 4.925 4.2 100 2.365 -0.5 -0.55 -0.55 -0.6 -0.6 -0.6 -0.6 -0.6 -0.6 1.6 1.3 2 5.075 4.4 250 2.390 0 0 0 0 0 0 0 0 0 25 4 3 10 5.225 4.6 400 2.415 0.5 0.55 0.55 0.6 0.6 0.6 0.6 0.6 0.6 V mA mA µA V V mV V Reference Output Voltage VREF Battery Charge Voltage Accuracy CSON = 13.23V, CELLS = GND, VADJ = VREF CSON = 8.82V, CELLS = FLOAT, VADJ = VREF CSON = 15.96V, CELLS = VDD, VADJ = GND CSON = 11.97V, CELLS = GND, VADJ = GND CSON = 7.98V, CELLS = FLOAT, VADJ = GND % TRIP POINTS ACSET Threshold ACSET Input Bias Current Hysteresis ACSET Input Bias Current ACSET Input Bias Current DCSET Threshold ACSET > 1.26V ACSET < 1.26V 1.235 2 2 -1 1.235 1.26 3.4 3.4 0 1.26 1.285 4.8 4.8 1 1.285 V µA µA µA V 3 ISL6253 Electrical Specifications DCIN = CSIP = CSIN = 18V, CSOP = CSON = 12V, ACSET = DCSET = 1.5V, VREF = ACLIM = CHLIM, VADJ = Floating, EN = VDD = 5V, BOOT-PHASE = 5.0V, GND = PGND = 0V, CVDD = 1µF IVDD = 0mA, TA = -10°C to +100°C, TJ ≤ 125°C, unless otherwise noted. (Continued) TEST CONDITIONS DCSET ≥ 1.26V DCSET < 1.26V MIN 2 2 -1 TYP 3.4 3.4 0 MAX 4.8 4.8 1 UNITS µA µA µA PARAMETER DCSET Input Bias Current Hysteresis DCSET Input Bias Current DCSET Input Bias Current OSCILLATOR Frequency PWM Ramp Voltage (peak-peak) CSIP = 18V CSIP = 11V SYNCHRONOUS BUCK REGULATOR Maximum Duty Cycle UGATE Pull-up Resistance UGATE Source Current UGATE Pull-down Resistance UGATE Sink Current LGATE Pull-up Resistance LGATE Source Current LGATE Pull-down Resistance LGATE Sink Current CHARGING CURRENT SENSING AMPLIFIER Input Common Mode Range Input Offset Voltage Input Bias Current at CSOP Input Bias Current at CSON CSOP to CSON Input Full Scale Sense Voltage 300kHz 240 1.4 0.8 300 1.55 0.9 360 1.7 1.0 kHz V V 97 99 1.8 1.0 0.9 1.8 1.8 1.0 0.9 1.8 99.6 3.0 % Ω A Ω A Ω A Ω A BOOT-PHASE = 5V, 500mA source current BOOT-PHASE = 5V, BOOT-UGATE = 2.5V BOOT-PHASE = 5V, 500mA sink current BOOT-PHASE = 5V, UGATE-PHASE = 2.5V VDDP-PGND = 5V, 500mA source current VDDP-PGND = 5V, VDDP-LGATE = 2.5V VDDP-PGND = 5V, 500mA sink current VDDP-PGND = 5V, LGATE = 2.5V 1.8 3.0 1.8 0 Guarantee by design 0 < CSOP < 18V 0 < CSON < 18V CHLIM = 3.3V CHLIM = VREF CHLIM = FLOAT CHLIM = GND 123 96 61 26 6 4.0 2.5 1.5 3.0 20 -25 -3 0 10 300 127 100 65 30 8.9 7.5 5.6 3.7 3.1 100 18 3 20 425 131 104 69 34 12.0 11.0 9.0 7.0 3.2 180 25 V mV µA µA mV mV mV mV mV mV mV mV V/CELL mV/CELL µA CSOP to CSON Input Full Scale Sense Voltage in Trickle CHLIM = 3.3




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