High Voltage Synchronous Rectified Buck MOSFET Driver

Part  Number ISL6208A
Manufacturer Intersil Corporation
Semiconductor DataSheet

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® ISL6208A Data Sheet February 15, 2006 FN9272.0 High Voltage Synchronous Rectified Buck MOSFET Driver The ISL6208A is a high frequency, dual MOSFET driver, optimized to drive two N-Channel power MOSFETs in a synchronous-rectified buck converter topology. It is especially suited for mobile computing applications that require high efficiency and excellent thermal performance. This driver, combined with an Intersil multiphase Buck PWM controller, forms a complete single-stage core-voltage regulator solution for advanced mobile microprocessors. The ISL6208A features 4A typical sinking current for the lower gate driver. This current is capable of holding the lower MOSFET gate off during the rising edge of the Phase node. This prevents shoot-through power loss caused by the high dv/dt of phase voltages. The operating voltage matches the 30V breakdown voltage of the MOSFETs commonly used in mobile computer power supplies. The ISL6208A also features a three-state PWM input that, working together with Intersil’s multiphase PWM controllers, will prevent negative voltage output during CPU shutdown. This feature eliminates a protective Schottky diode usually seen in a microprocessor power systems. MOSFET gates can be efficiently switched up to 2MHz using the ISL6208A. Each driver is capable of driving a 3000pF load with propagation delays of 15ns and transition times under 10ns. Bootstrapping is implemented with an internal Schottky diode. This reduces system cost and complexity, while allowing the use of higher performance MOSFETs. Adaptive shoot-through protection is integrated to prevent both MOSFETs from conducting simultaneously. A diode emulation feature is integrated in the ISL6208A to enhance converter efficiency at light load conditions. This feature also allows for monotonic start-up into pre-biased outputs. When diode emulation is enabled, the driver will allow discontinuous conduction mode by detecting when the inductor current reaches zero and subsequently turning off the low side MOSFET gate. Programmable dead-time control with gate threshold monitoring is also integrated to prevent both MOSFETs from conducting simultaneously. Features • Dual MOSFET Drives for Synchronous Rectified Bridge • Adaptive Shoot-Through Protection - Active Gate Threshold Monitoring - Programmable Dead-Time • 0.5Ω On-Resistance and 4A Sink Current Capability • Supports High Switching Frequency up to 2MHz - Fast Output Rise and Fall Time - Low Propagation Delay • • • • • • Three-State PWM Input for Power Stage Shutdown Internal Bootstrap Schottky Diode Low Bias Supply Current (5V, 100µA) Diode Emulation for Efficiency and Pre-Biased Startup VCC POR (Power-On-Reset) Feature Integrated Pin-to-pin Compatible with ISL6207, ISL6208, ISL6209 • QFN Package: - Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat No Leads - Package Outline - Near Chip Scale Package footprint, which improves PCB efficiency and has a thinner profile • Pb-Free Plus Anneal Available (RoHS Compliant) Applications • Supplies for Intel® and AMD® Mobile Microprocessors • High Frequency, Low Profile DC/DC Converters • High Current Low Output Voltage DC/DC Converters • High Input Voltage DC/DC Converters Ordering Information PART NUMBER ISL6208ACBZ (Note) PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. # M8.15 ISL6208ACBZ -10 to 100 8 Ld SOIC (Pb-Free) ISL6208ACBZ-T ISL6208ACBZ 8 Ld SOIC Tape and Reel (Note) (Pb-Free) ISL6208ACRZ (Note) 08AZ -10 to 100 8 Ld 3x3 QFN L8.3x3 (Pb-Free) 8 Ld 3x3 QFN Tape and Reel (Pb-Free) Related Literature • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” • Technical Brief TB389 “PCB Land Pattern Design and Surface Mount Guidelines for MLFP Packages” • Technical Brief TB447 “Guidelines for Preventing Boot-toPhase Stress on Half-Bridge MOSFET Driver ICs” 1 ISL6208ACRZ-T 08AZ (Note) NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL6208A Pinouts ISL6208ACB (8 LD SOIC) TOP VIEW ISL6208ACR (8 LD 3x3 QFN) TOP VIEW PHASE 7 6 6 FCCM 5 VCC 3 GND 4 LGATE tFU UGATE 8 BOOT 1 PWM 2 SHOOTTHROUGH PROTECTION PWM 10K CONTROL LOGIC VCC LGATE GND THERMAL PAD (FOR QFN PACKAGE ONLY) UGATE BOOT PWM GND 1 2 3 4 8 7 6 5 PHASE FCCM VCC LGATE Block Diagram VCC FCCM BOOT UGATE PHASE FIGURE 1. BLOCK DIAGRAM Timing Diagram 2.5V PWM tPDHU tPDLU tRU tRU tPTS 1V UGATE LGATE 1V tFL tPDLL tPDHL tFL tRL tTSSHD tTSSHD tFU tPTS 2 FN9272.0 February 15, 2006 ISL6208A Absolute Maximum Ratings Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V Input Voltage (VFCCM, VPWM). . . . . . . . . . . . . -0.3V to VCC + 0.3V BOOT Voltage (VBOOT-GND). . . . . . . . . . . . . . . . . . . . . -0.3V to 33V BOOT To PHASE Voltage (VBOOT-PHASE) . . . . . . -0.3V to 7V (DC) -0.3V to 9V (<10ns) PHASE Voltage (Note 1) . . . . . . . . . . . . . . . . . . . GND - 0.3V to 30V GND -8V (<20ns Pulse Width, 10µJ) UGATE Voltage . . . . . . . . . . . . . . . . VPHASE - 0.3V (DC) to VBOOT VPHASE - 5V (<20ns Pulse Width, 10µJ) to VBOOT LGATE Voltage . . . . . . . . . . . . . . . GND - 0.3V (DC) to VCC + 0.3V GND - 2.5V (<20ns Pulse Width, 5µJ) to VCC + 0.3V Ambient Temperature Range . . . . . . . . . . . . . . . . . . .-40°C to 125°C Thermal Information Thermal Resistance (Typical Notes 2, 3, 4) θJA (°C/W) θJC (°C/W) SOIC Package (Note 2) . . . . . . . . . . . . 110 n/a QFN Package (Notes 3, 4). . . . . . . . . . 80 15 Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C (SOIC - Lead Tips Only) Recommended Operating Conditions Ambient Temperature Range . . . . . . . . . . . . . . . . . . .-10°C to 100°C Maximum Operating Junction Temperature. . . . . . . . . . . . . . 125°C Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ±10% CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. The Phase Voltage is capable of withstanding -7V DC when the BOOT pin is at GND. 2. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 3. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 4. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications PARAMETER VCC SUPPLY CURRENT Bias Supply Current POR Recommended Operating Conditions, Unless Otherwise Noted SYMBOL TEST CONDITIONS MIN TYP MAX UNITS IVCC PWM pin floating, VFCCM = 5V Vcc Rising Vcc Falling 2.40 - 100 3.30 2.90 400 3.90 - µA V V mV POR Hysteresis BOOTSTRAP DIODE Forward Voltage PWM INPUT Input Current IPWM VPWM = 5V, VFCCM = 5V VPWM = 0V, VFCCM = 5V PWM Three-State Rising Threshold PWM Three-State Falling Threshold Three-State Shutdown Holdoff Time UG/LG Three-state Propagation Delay FCCM INPUT FCCM Threshold FCCM Transient Delay SWITCHING TIME UGATE Rise Time (Note 5) LGATE Rise Time (Note 5) UGATE Fall Time (Note 5) tRU tRL tFU VVCC = 5V, 3nF Load VVCC = 5V, 3nF Load VVCC = 5V, 3nF Load RSET = 0Ω tTSSHD tPTS VVCC = 5V VVCC = 5V VVCC = 5V, temperature = 25°C VF VVCC = 5V, forward bias current = 2mA 0.45 0.60 0.65 V 0.70 3.5 - 250 -250 1.00 3.8 70 20 1.30 4.1 - µA µA V V ns ns - 2.5 70 - V ns - 8.0 8.0 8.0 - ns ns ns 3 FN9272.0 February 15, 2006 ISL6208A Electrical Specifications PARAMETER LGATE Fall Time (Note 5) UGATE Turn-Off Propagation Delay LGATE Turn-Off Propagation Delay UGATE Turn-On Propagation Delay LGATE Turn-On Propagation Delay UGATE Turn-On Propagation Delay LGATE Turn-On Propagation Delay Minimum LG On TIME in DCM (Note 5) OUTPUT Upper Drive Source Resistance (Note 5) Upper Driver Source Current (Note 5) Upper Drive Sink Resistance (Note 5) Upper Driver Sink Current (Note 5) Lower Drive Source Resistance (Note 5) Lower Driver Source Current (Note 5) Lower Drive Sink Resistance (Note 5) Lower Driver Sink Current (Note 5) NOTE: 5. Guaranteed by Characterization. Not 100% Tested in Production. RU IU RU IU RL IL RL IL 500mA Source Current VUGATE-PHASE = 2.5V 500mA Sink Current VUGATE-PHASE = 2.5V 500mA Source Current VLGATE = 2.5V 500mA Sink Current VLGATE = 2.5V 1 2.00 1 2.00 1 2.00 0.4 4.00 2.5 2.5 2.5 1.0 Ω A Ω A Ω A Ω A Recommended Operating Conditions, Unless Otherwise Noted (Continued) SYMBOL tFL tPDLU tPDLL tPDHU tPDHL tPDHU tPDHL tLGMIN TEST CONDITIONS VVCC = 5V, 3nF Load VVCC = 5V, Outputs Unloaded VVCC = 5V, Outputs Unloaded VVCC = 5V, Outputs Unloaded; RSET = 0Ω VVCC = 5V, Outputs Unloaded; RSET = 0Ω VVCC = 5V, Outputs Unloaded; RSET = 80kΩ VVCC = 5V, Outputs Unloaded; RSET = 80kΩ MIN TYP 4.0 20 27 26 26 41 33 400 MAX UNITS ns ns ns ns ns ns ns ns Typical Application with 2-Phase Converter +5V +5V +5V VCC F



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