SMPS MOSFET

SMPS MOSFET PD - 95471 IRFB16N60LPbF Applications • Zero Voltage Switching SMPS • Telecom and Server Power Supplies • Uninterruptible Power Supplies • Motor Control applications • Lead-Free HEXFET® Power MOSFET VDSS RDS(on) typ. Trr typ. ID 600V 385mΩ 130ns 16A Features and Benefits • SuperFast body diode eliminates the need for external diodes in ZVS applications. • Lower Gate charge results in simpler drive requirements. • Enhanced dv/dt capabilities offer improved ruggedness. • Higher Gate voltage threshold offers improved noise immunity . TO-220AB Absolute Maximum Ratings Parameter ID @ TC = 25°C Continuous Drain Current, VGS @ 10V ID @ TC = 100°C Continuous Drain Current, VGS @ 10V Pulsed Drain Current IDM Max. 16 10 60 310 Units A W W/°C V V/ns °C www.DataSheet4U.com c PD @TC = 25°C Power Dissipation VGS dv/dt TJ TSTG Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and d 2.5 ±30 10 -55 to + 150 300 (1.6mm from case ) 1.1(10) Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw Diode Characteristics Symbol IS ISM VSD trr Qrr IRRM ton N•m (lbf•in) Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time Min. Typ. Max. Units ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 130 240 450 5.8 16 A 60 1.5 200 360 670 8.7 V ns Conditions MOSFET symbol showing the integral reverse G S D Ãc p-n junction diode. TJ = 25°C, IS = 16A, VGS = 0V TJ = 25°C, IF = 16A TJ = 125°C, di/dt = 100A/µs f 1080 1620 nC TJ = 25°C, IS = 16A, VGS = 0V TJ = 125°C, di/dt = 100A/µs A TJ = 25°C f f f 1 7/7/04 Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com IRFB16N60LPbF Static @ TJ = 25°C (unless otherwise specified) Symbol V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) IDSS IGSS RG Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Internal Gate Resistance Min. Typ. Max. Units 600 ––– ––– 3.0 ––– ––– ––– ––– ––– ––– 0.39 385 ––– ––– ––– ––– ––– 0.79 ––– ––– 460 5.0 50 2.0 100 -100 ––– Ω V mΩ V µA mA nA Conditions VGS = 0V, ID = 250µA VGS = 10V, ID = 9.0A V/°C Reference to 25°C, ID = 1mA VDS = VGS, ID = 250µA VDS = 600V, VGS = 0V VDS = 480V, VGS = 0V, TJ = 125°C VGS = 30V VGS = -30V f = 1MHz, open drain f Dynamic @ TJ = 25°C (unless otherwise specified) Symbol gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss eff. Coss eff. (ER) Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance Effective Output Capacitance (Energy Related) Min. Typ. Max. Units 8.3 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 20 44 28 5.5 2720 260 20 120 100 ––– 100 30 46 ––– ––– ––– ––– ––– ––– ––– ––– ––– pF ns nC S ID = 16A Conditions VDS = 50V, ID = 9.0A VDS = 480V VGS = 10V, See Fig. 7 & 15 VDD = 300V ID = 16A RG = 1.8Ω VGS = 10V, See Fig. 11a & 11b VGS = 0V VDS = 25V ƒ = 1.0MHz, See Fig. 5 VGS = 0V,VDS = 0V to 480V f f g Avalanche Characteristics Symbol EAS IAR EAR Parameter Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Ù d Typ. ––– ––– ––– Max. 310 16 31 Units mJ A mJ ™ Thermal Resistance Symbol RθJC RθJA Parameter Junction-to-Case Junction-to-Ambient Typ. ––– ––– Max. 0.4 62 Units °C/W Notes:  Repetitive rating; pulse width limited by max. junction temperature. (See Fig. 11) ‚ Starting TJ = 25°C, L = 2.5mH, RG = 25Ω, IAS = 16A, dv/dt = 10V/ns. (See Figure 12a) ƒ ISD ≤ 16A, di/dt ≤ 340A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C. „ Pulse width ≤ 300µs; duty cycle ≤ 2%. … Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% V DSS . Coss eff.(ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 to 80% V DSS . 2 www.irf.com IRFB16N60LPbF 1000 TOP VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V 5.0V 100 TOP VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V 5.0V ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 100 10 BOTTOM 10 BOTTOM 5.0V 1 1 0.1 5.0V 0.1 0.01 20µs PULSE WIDTH Tj = 25°C 0.01 0.1 1 10 100 0.1 1 20µs PULSE WIDTH Tj = 150°C 10 100 0.001 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 3.0 RDS(on) , Drain-to-Source On Resistance ID = 15A 2.5 ID, Drain-to-Source Current (Α) 100 VGS = 10V (Normalized) 10 T J = 150°C 2.0 1.5 1 T J = 25°C 0.1 1.0 VDS = 50V 20µs PULSE WIDTH 0.01 4 6 8 10 12 14 16 0.5 0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 VGS , Gate-to-Source Voltage (V) T J , Junction Temperature (°C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature www.irf.com 3 IRFB16N60LPbF 100000 VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss = Cgd Coss = Cds + Cgd 25 10000 20 C, Capacitance(pF) Ciss Coss 100 Energy (µJ) 1000 15 Crss 10 10 5 1 1 10 100 1000 0 0 100 200 300 400 500 600 700 VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typ. Output Capacitance Stored Energy vs. VDS 12.0 ID= 15A VGS , Gate-to-Source Voltage (V) 100.00 VDS= 480V VDS= 300V VDS= 120V ISD, Reverse Drain Current (A) 10.0 8.0 6.0 4.0 2.0 0.0 0 10 20 10.00 T J = 150°C 1.00 T J = 25°C 0.10 30 40 50 60 70 0.2 0.4 0.6 0.8 1.0 1.2 Q G Total Gate Charge (nC) VGS = 0V 1.4 1.6 VSD, Source-to-Drain Voltage (V) Fig 7. Typical Gate Charge vs. Gate-to-Source Voltage Fig 8. Typical Source-Drain Diode Forward Voltage 4 www.irf.com IRFB16N60LPbF 1000 OPERATION IN THIS AREA LIMITED BY R DS(on) 18 16 14 ID, Drain Current (A) 10000 ID, Drain-to-Source Current (A) 100 12 10 8 6 4 2 0 10 100µsec 1 Tc = 25°C Tj = 150°C Single Pulse 0.1 1 10 100 1msec 10msec 1000 25 50 75 100 125 150 VDS, Drain-to-Source Voltage (V) T C , Case Temperature (°C) Fig 9. Maximum Safe Operating Area Fig 10. Maximum Drain Current vs. Case Temperature VDS VGS RG 10V Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % RD VDS 90% D.U.T. + -VDD 10% VGS td(on) tr t d(off) tf Fig 11a. Switching Time Test Circuit Fig 11b. Switching Time Waveforms www.irf.com 5 IRFB16N60LPbF 1 Thermal Response ( Z thJC ) D = 0.50 0.1 0.20 0.10 0.05 P DM t1 t2 0.01 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE ) Notes: 1. Duty factor D = 2. Peak T t1/ t 2 J = P DM x Z thJC +T C 0.001 1E-006 1E-005 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 12. Maximum Effective Transient Thermal Impedance, Junction-to-Case 5.0 VGS(th) Gate threshold Voltage (V) 4.5 4.0 3.5 ID = 250µA 3.0 2.5 2.0 -75 -50 -25 0 25 50 75 100 125 150 175 T J , Temperature ( °C ) Fig 13. Threshold Voltage vs. Temperature 6 www.irf.com IRFB16N60LPbF 600 EAS , Single Pulse Avalanche Energy (mJ) 500 ID 7.2A 10A BOTTOM 16A TOP 400 300 200 100 0 25 50 75 100 125 150 Starting T J , Junction Temperature (°C) Fig 14a. Maximum Avalanche Energy vs. Drain Current 15V V(BR)DSS VDS L DRIVER tp RG 20V D.U.T IAS tp + - VDD A 0.01Ω I AS Fig 14b. Unclamped Inductive Test Circuit Current Regulator Same Type as D.U.T. Fig 14c. Unclamped Inductive Waveforms QG 50KΩ 12V .2µF .3µF VGS V D.U.T. + V - DS QGS VG QGD VGS 3mA IG ID Current Sampling Resistors Charge Fig 15a. Gate Charge Test Circuit Fig 15b. Basic Gate Charge Waveform www.irf.com 7 IRFB16N60LPbF Peak Diode Recovery dv/dt Test Circuit D.U.T + ƒ + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer ‚ - „ +  RG • • • • dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig 16. For N-Channel HEXFET® Power MOSFETs 8 www.irf.com IRFB16N60LPbF TO-220AB Package Outline 2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) Dimensions are shown in millimeters (inches) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048) 4 15.24 (.600) 14.84 (.584) 1.15 (.045) MIN 1 2 3 LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 21- GATE DRAIN 1- GATE 32- DRAINSOURCE 2- COLLECTOR 3- SOURCE 3- EMITTER 4 - DRAIN LEAD ASSIGNMENTS HEXFET 14.09 (.555) 13.47 (.530) 4- DRAIN 4.06 (.160) 3.55 (.140) 4- COLLECTOR 3X 3X 1.40 (.055) 1.15 (.045) 0.93 (.037) 0.69 (.027) M B A M 3X 0.55 (.022) 0.46 (.018) 0.36 (.014) 2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH 2.92 (.115) 2.64 (.104) 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information E XAMPL E : T HIS IS AN IR F 1010 LOT CODE 1789 AS S E MB L E D