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Part Number |
IRF6662 |
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Manufacturer |
International Rectifier |
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Semiconductor DataSheet |
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DataSheet View |
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www.DataSheet4U.com
PD - 97039
IRF6662
DirectFET™ Power MOSFET
Typical values (unless otherwise specified)
Lead and Bromide Free Low Profile (<0.7 mm) Dual Sided Cooling Compatible Ultra Low Package Inductance Optimized for High Frequency Switching Ideal for High Performance Isolated Converter Primary Switch Socket Optimized for Synchronous Rectification Low Conduction Losses Compatible with existing Surface Mount Techniques
VDSS Qg
tot
VGS Qgd
6.8nC
RDS(on) Vgs(th)
3.9V
100V max ±20V max 17.5mΩ@ 10V 22nC
MZ
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ SX ST MQ MX MT MZ
DirectFET™ ISOMETRIC
Description
The IRF6662 combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6662 is optimized for primary side bridge topologies in isolated DC-DC applications, for wide range universal input Telecom applications (36V - 75V), and for secondary side synchronous rectification in regulated DC-DC topologies. The reduced total losses in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements, and makes this device ideal for high performance isolated DC-DC converters.
Absolute Maximum Ratings
Parameter
VDS VGS ID @ TA = 25°C ID @ TA = 70°C ID @ TC = 25°C IDM EAS IAR
100
Typical RDS(on) (mΩ)
Max.
100 ±20 8.3 6.6 47 66 39 4.9
VGS, Gate-to-Source Voltage (V)
Units
V
Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Single Pulse Avalanche Energy Avalanche Current
12.0 10.0 8.0 6.0 4.0 2.0 0.0 0 5 ID= 4.9A
A
mJ A
80 60 40 20 0 4 6 8 10 T J = 25°C 12 T J = 125°C
ID = 4.9A
VDS= 80V VDS= 50V VDS= 20V
14
16
10
15
20
25
VGS, Gate -to -Source Voltage (V)
QG Total Gate Charge (nC)
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes: Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Surface mounted on 1 in. square Cu board, steady state.
Fig 2. Typical Total Gate Charge vs. Gate-to-Source Voltage
TC measured with thermocouple mounted to top (Drain) of part. Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25°C, L = 3.2mH, RG = 25Ω, IAS = 4.9A.
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1
08/05/05
IRF6662
Static @ TJ = 25°C (unless otherwise specified)
Parameter
BVDSS ∆ΒVDSS/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss Coss Coss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance
Min.
100 ––– ––– 3.0 ––– ––– ––– ––– ––– 11 ––– ––– ––– ––– ––– ––– –––
–––
Typ.
––– 0.10 17.5 ––– -9.7 ––– ––– ––– ––– ––– 22 4.9 1.2 6.8 9.1 8.0 11 1.2 11 7.5 24 5.9 1360 270 61 1340 160
Max.
––– ––– 22 4.9 ––– 20 250 100 -100 ––– 31 ––– ––– 10 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– –––
Units
V V/°C mΩ V mV/°C µA nA S
Conditions
VGS = 0V, ID = 250µA Reference to 25°C, ID = 1mA VGS = 10V, ID = 8.2A VDS = VGS, ID = 100µA VDS = 100V, VGS = 0V VDS = 80V, VGS = 0V, TJ = 125°C VGS = 20V VGS = -20V VDS = 10V, ID = 4.9A VDS = 50V
nC
VGS = 10V ID = 4.9A See Fig. 17
nC
Ω
VDS = 16V, VGS = 0V VDD = 50V, VGS = 10V ID = 4.9A
––– ––– ––– ––– ––– ––– ––– ––– –––
ns
RG=6.2Ω VGS = 0V
pF
VDS = 25V ƒ = 1.0MHz VGS = 0V, VDS = 1.0V, f=1.0MHz VGS = 0V, VDS = 80V, f=1.0MHz
Diode Characteristics
Parameter
IS ISM VSD trr Qrr Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge ––– ––– ––– ––– 34 50 1.3 51 75 V ns nC ––– ––– 66
Min.
–––
Typ.
–––
Max.
2.5
Units
A
Conditions
MOSFET symbol showing the integral reverse
G S D
p-n junction diode. TJ = 25°C, IS = 4.9A, VGS = 0V TJ = 25°C, IF = 4.9A, VDD = 50V di/dt = 100A/µs
Notes: Pulse width ≤ 400µs; duty cycle ≤ 2%. Repetitive rating; pulse width limited by max. junction temperature.
2
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IRF6662
Absolute Maximum Ratings
Parameter
PD @TA = 25°C PD @TA = 70°C PD @TC = 25°C TP TJ TSTG Power Dissipation Power Dissipation Power Dissipation Peak Soldering Temperature Operating Junction and Storage Temperature Range
Max.
2.8 1.8 89 270 -40 to + 150
Units
W
°C
Thermal Resistance
Parameter
RθJA RθJA RθJA RθJC RθJ-PCB Junction-to-Ambient Junction-to-Ambient Junction-to-Ambient Junction-to-Case Junction-to-PCB Mounted
Typ.
––– 12.5 20 ––– 1.0
Max.
45 ––– ––– 1.4 –––
Units
°C/W
100
D = 0.50
Thermal Response ( Z thJA )
10
0.20 0.10 0.05 0.02 0.01
τJ τJ τ1 R1 R1 τ2 R2 R2 R3 R3 τ3 R4 R4 τA τ1 τ2 τ3 τ4 τ4 τA
1
Ri (°C/W)
1.2801 8.7256 21.7500 13.2511
τi (sec)
0.000322 0.164798 2.2576 69
0.1
0.01
SINGLE PULSE ( THERMAL RESPONSE )
Ci= τi/Ri Ci τi/Ri
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + Tc
0.01 0.1 1 10 100
0.001 1E-006 1E-005 0.0001 0.001
t1 , Rectangular Pulse Duration (sec)
Notes: Surface mounted on 1 in. square Cu board, steady state. Used double sided cooling , mounting pad. Mounted on minimum footprint full size board with metalized back and with small clip heatsink.
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
TC measured with thermocouple incontact with top (Drain) of part. Rθ is measured at TJ of approximately 90°C.
Surface mounted on 1 in. square Cu board (still air).
Mounted to a PCB with small clip heatsink (still air)
Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air)
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IRF6662
100
TOP VGS 15V 10V 8.0V 7.0V 6.0V
100
TOP VGS 15V 10V 8.0V 7.0V 6.0V
ID, Drain-to-Source Current (A)
BOTTOM
ID, Drain-to-Source Current (A)
BOTTOM
6.0V 10
10 6.0V
≤60µs PULSE WIDTH
1 0.1 1 Tj = 25°C
1
≤60µs PULSE WIDTH
Tj = 150°C 0.1 1 10 100
10
100
Fig 4. Typical Output Characteristics
100 VDS = 10V ≤60µs PULSE WIDTH
VDS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 5. Typical Output Characteristics
2.0 VGS = 10V ID = 8.2A
Typical RDS(on) (Normalized)
ID, Drain-to-Source Current (Α)
10
T J = 150°C T J = 25°C T J = -40°C
1.5
1
1.0
0.1 3 4 5 6 7 8
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 6. Typical Transfer Characteristics
100000
VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd
Fig 7. Normalized On-Resistance vs. Temperature
45 T J = 25°C 40
Typical RDS(on) ( mΩ)
10000
C, Capacitance(pF)
C oss = C ds + C gd
35 30 25 20 15
Vgs = 7.0V Vgs = 8.0V Vgs = 10V Vgs = 15V
1000
Ciss Coss
100
Crss
10 1 10 VDS, Drain-to-Source Voltage (V) 100
0
10
20
30
40
50
60
ID, Drain Current (A)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
Fig 9. Typical On-Resistance vs. Drain Current
4
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IRF6662
1000 VGS = 0V 100 T J = 150°C 10 T J = 25°C T J = -40°C
ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A)
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
100
100µsec
10
1msec 10msec
1
1
T A = 25°C
Tj = 150°C Single Pulse 0.1 0 1 10 100 1000
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 VSD, Source-to-Drain Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
10
Typical VGS(th) Gate threshold Voltage (V)
Fig11. Maximum Safe Operating Area
7.0 ID = 100µA ID = 250µA
8
ID, Drain Current (A)
6.0
ID = 1.0mA ID = 1.0A
6
5.0
4
4.0
2
3.0
0 25 50 75 100 125 150 T A , Ambient Temperature (°C)
2.0 -75 -50 -25 0 25 50 75 100 125 150 T J , Temperature ( °C )
Fig 12. Maximum Drain Current vs. Ambient Temperature
160
EAS , Single Pulse Avalanche Energy (mJ)
Fig 13. Typical Threshold Voltage vs. Junction Temperature
ID TOP
140 120 100 80 60 40 20 0 25 50 75
1.6A 1.9A BOTTOM 4.9A
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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5
IRF6662
Current Regulator Same Type as D.U.T.
Id Vds
50KΩ 12V .2µF .3µF
Vgs
D.U.T. VGS
3mA
+ V - DS
Vgs(th)
IG
ID
Current Sampling Resistors
Qgs1 Qgs2
Qgd
Qgodr
Fig 15a. Gate Charge Test Circuit
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
tp
DRIVER
VDS
L
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
0.01Ω
I AS
Fig 16b. Unclamped Inductive Waveforms
Fig 16a. Unclamped Inductive Test Circuit
RD VDS VGS RG
+
90%
D.U.T.
VDS
- V |