|
Part Number |
IRF3805PbF |
|
Manufacturer |
International Rectifier |
|
Semiconductor DataSheet |
|
DataSheet View |
|
PD - 97046
AUTOMOTIVE MOSFET
Features
l l l l l l
IRF3805PbF IRF3805SPbF IRF3805LPbF
HEXFET® Power MOSFET
D
Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Lead-Free
VDSS = 55V RDS(on) = 3.3mΩ
Description
Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low onresistance per silicon area. Additional features of this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
G S
ID = 75A
www.DataSheet4U.com
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C ID @ TC = 100°C ID @ TC = 25°C IDM P D @TC = 25°C V GS E AS (Thermally limited) E AS (Tested ) IAR E AR TJ TSTG
TO-220AB IRF3805PbF
D2Pak IRF3805SPbF
Max.
210 150 75 890 300 2.0 ± 20
TO-262 IRF3805LPbF
Units
A
Continuous Drain Current, V GS @ 10V (Silicon Limited) Continuous Drain Current, V GS @ 10V (Silicon Limited) Continuous Drain Current, V GS @ 10V (Package limited) Pulsed Drain Current
Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energyd Single Pulse Avalanche Energy Tested Value Avalanche Currentà Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
W W/°C V mJ A mJ
h
650 940 See Fig.12a, 12b, 15, 16 -55 to + 175
g i
°C 300 (1.6mm from case ) 10 lbfyin (1.1Nym)
Thermal Resistance
RθJC RθCS RθJA RθJA Junction-to-Case
k
Parameter
Typ.
Max.
0.5 ––– 62 40
Case-to-Sink, Flat Greased Surface Junction-to-Ambient
ik
i
––– 0.50 ––– –––
l
Units
°C/W
Junction-to-Ambient (PCB Mount)
jk
www.irf.com
1
9/20/05
IRF3805/S/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
V(BR)DSS ∆V(BR)DSS/∆TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
55 ––– ––– 2.0 75 ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– ––– 0.051 2.6 ––– ––– ––– ––– ––– ––– 190 52 72 150 20 93 87 4.5 7.5 7960 1260 630 4400 980 1550 ––– ––– 3.3 4.0 ––– 20 250 200 -200 290 ––– ––– ––– ––– ––– ––– ––– nH ––– ––– ––– ––– ––– ––– ––– pF ns nC nA V mΩ V V µA
Conditions
VGS = 0V, ID = 250µA VGS = 10V, ID = 75A VDS = 25V, ID = 75A VDS = 55V, VGS = 0V VDS = 55V, VGS = 0V, TJ = 125°C VGS = 20V VGS = -20V ID = 75A VDS = 44V VGS = 10V VDD = 28V ID = 75A RG = 2.6 Ω VGS = 10V
V/°C Reference to 25°C, ID = 1mA VDS = VGS, ID = 250µA
e
e e
Between lead, 6mm (0.25in.) from package and center of die contact VGS = 0V VDS = 25V ƒ = 1.0MHz
G
D
S
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz VGS = 0V, VDS = 44V, ƒ = 1.0MHz VGS = 0V, VDS = 0V to 44V
f
Source-Drain Ratings and Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)Ã Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
––– ––– ––– ––– ––– ––– ––– ––– 36 47 75 A 890 1.3 54 71 V ns nC
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25°C, IS = 75A, VGS = 0V TJ = 25°C, IF = 75A, VDD = 28V di/dt = 100A/µs
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
www.irf.com
IRF3805/S/LPbF
1000
TOP
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
BOTTOM
100
10
4.5V
≤ 60µs PULSE WIDTH Tj = 25°C
1 0.1 1 10 100 10 0.1
4.5V
≤ 60µs PULSE WIDTH Tj = 175°C
10 100
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.0
200
TJ = 175°C
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current(Α)
TJ = 25°C 160 TJ = 175°C
100.0
120
10.0
TJ = 25°C
1.0
80
VDS = 20V
0.1 4.0 5.0 6.0
40
≤ 60µs PULSE WIDTH
7.0 8.0
VDS = 10V
380µs PULSE WIDTH 0 0 20 40 60 80 100 120 140 160 180 ID, Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance Vs. Drain Current
www.irf.com
3
IRF3805/S/LPbF
14000 12000 10000 8000 6000 4000 2000 0 1 10 100 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20 ID= 75A
VGS, Gate-to-Source Voltage (V)
VDS = 44V VDS= 28V
16
C, Capacitance (pF)
Ciss
12
8
Coss Crss
4
0 0 50 100 150 200 250 300 QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000.0
10000
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
TJ = 175°C
100.0
OPERATION IN THIS AREA LIMITED BY R DS (on)
1000 100µsec 100 10msec 10 1msec
10.0
TJ = 25°C
1.0
1
VGS = 0V
0.1 0.0 0.4 0.8 1.2 1.6 2.0 2.4
Tc = 25°C Tj = 175°C Single Pulse 1 10 100 1000
0.1 VDS , Drain-toSource Voltage (V)
VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
www.irf.com
IRF3805/S/LPbF
240 LIMITED BY PACKAGE 200
ID , Drain Current (A)
RDS(on) , Drain-to-Source On Resistance (Normalized)
2.0
ID = 75A
VGS = 10V
160 120 80 40 0 25 50 75 100 125 150 175 TC , Case Temperature (°C)
1.5
1.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10. Normalized On-Resistance Vs. Temperature
1
D = 0.50
Thermal Response ( Z thJC )
0.1
0.20 0.10 0.05 0.02 0.01
R1 R1 τJ τ1 τ2 R2 R2 τC τ τ2
0.01
τJ
Ri (°C/W) τi (sec) 0.2653 0.001016 0.2347 0.012816
τ1
0.001
Ci= τi/Ri Ci i/Ri
SINGLE PULSE ( THERMAL RESPONSE )
0.0001 1E-006 1E-005 0.0001 0.001
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.01 0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
www.irf.com
5
IRF3805/S/LPbF
EAS, Single Pulse Avalanche Energy (mJ)
15V
2000
VDS
L
DRIVER
1600
ID 15A 20A BOTTOM 75A
TOP
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
1200
A
0.01Ω
800
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
400
0 25 50 75 100 125 150 175
Starting TJ, Junction Temperature (°C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS
QGD
VGS(th) Gate threshold Voltage (V)
4.5
VG
4.0
ID = 250µA
3.5
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
3.0
2.5
50KΩ 12V .2µF .3µF
2.0
D.U.T. VGS
3mA
+ V - DS
1.5 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Temperature ( °C )
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage Vs. Temperature
6
www.irf.com
IRF3805/S/LPbF
10000
Duty Cycle = Single Pulse
Avalanche Current (A)
1000
100
0.01 0.05
Allowed avalanche Current vs avalanche pulsewidth, tav assuming ∆Tj = 25°C due to avalanche losses. Note: In no case should Tj be allowed to exceed Tjmax
10
0.10
1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
800
EAR , Avalanche Energy (mJ)
600
TOP Single Pulse BOTTOM 1% Duty Cycle ID = 75A
400
200
0 25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. 175 D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC Iav = 2DT/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav
Fig 16. Maximum Avalanche Energy Vs. Temperature
www.irf.com
7
IRF3805/S/LPbF
Driver Gate Drive
D.U.T
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
|