Dual Channel High Speed-10 MBit/s Logic Gate Optocouplers

Part  Number HCPL062N
Manufacturer Fairchild Semiconductor
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HCPL062N 3.3V Dual Channel High Speed-10 MBit/s Logic Gate Optocouplers July 2006 HCPL062N 3.3V Dual Channel High Speed-10 MBit/s Logic Gate Optocouplers Features ■ Compact SO8 package ■ Very high speed – 10MBit/s ■ Superior CMR – 25kV/µs minimum (1,000 volts ■ ■ ■ ■ tm Description The HCPL062N optocouplers consist of an AlGaAs LED, optically coupled to a very high speed integrated photodetector logic gate consisting of bipolar transistors on a CMOS process for reduced power consumption. The output features an open collector, thereby permitting wired OR outputs. The devices are housed in a compact small-outline package. The coupled parameters are guaranteed over the temperature range of -40°C to +85°C. An internal noise shield and provides superior common mode rejection. common mode) Logic gate output Wired OR-open collector Fixed threshold detector design minimizes thermal impact on switching times U.L. recognized (File # E90700) Applications ■ Ground loop elimination ■ Field buses ■ Line receiver, data transmission ■ Data multiplexing ■ Switching power supplies ■ Pulse transformer replacement ■ Computer-peripheral interface ■ Instrumentation input/output isolation Package Dimensions 0.164 (4.16) 0.144 (3.66) SEATING PLANE Pin 1 0.202 (5.13) 0.182 (4.63) 0.019 (0.48) 0.010 (0.25) 0.006 (0.16) 0.143 (3.63) 0.123 (3.13) 0.021 (0.53) 0.011 (0.28) 0.008 (0.20) 0.003 (0.08) 0.050 (1.27) TYP 0.244 (6.19) 0.224 (5.69) Lead Coplanarity : 0.004 (0.10) MAX Note: All dimensions are in inches (millimeters) ©2006 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com HCPL062N Rev. 1.0.0 HCPL062N 3.3V Dual Channel High Speed-10 MBit/s Logic Gate Optocouplers Circuit Drawing(1) +1 V F1 8 VCC _2 7 V01 _ V 3 6 V02 F2 +4 5 GND Note: 1. The VCC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected no further than 3mm from the VCC and GND pins of each device. Truth Table (Positive Logic) Input H L Output L H A 0.1µF bypass capacitor must be connected between pins 8 and 5. 2 HCPL062N Rev. 1.0.0 www.fairchildsemi.com HCPL062N 3.3V Dual Channel High Speed-10 MBit/s Logic Gate Optocouplers Absolute Maximum Ratings (No derating required up to 85°C) Symbol TSTG TOPR EMITTER IF VR PI DETECTOR VCC Supply Voltage (1 minute max) IO VO PO Output Current (each channel) Output Voltage (each channel) Collector Output Power Dissipation 7.0 15 7.0 85 V mA V mW DC/Average Forward Input Current (each channel) Reverse Input Voltage (each channel) Power Dissipation 50 5.0 45 mA V mW Storage Temperature Operating Temperature Parameter Value -40 to +125 -40 to +85 Units °C °C Recommended Operating Conditions Symbol IFL IFH VCC TA N RL Parameter Input Current, Low Level Input Current, High Level Supply Voltage, Output Operating Temperature Fan Out (TTL load) Output Pull-up Min. 0 6.3(2) 2.7 -40 – 330 Max. 250 15 3.3 +85 5 4K Units µA mA V °C TTL Loads Ω Note: 2. 6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0mA or less 3 HCPL062N Rev. 1.0.0 www.fairchildsemi.com HCPL062N 3.3V Dual Channel High Speed-10 MBit/s Logic Gate Optocouplers Electrical Characteristics (TA = -40°C to +85°C Unless otherwise specified.) Individual Component Characteristics Symbol EMITTER VF BVR ∆VF/∆TA Input Forward Voltage Input Reverse Breakdown Voltage Input Diode Temperature Coefficient High Level Supply Current Low Level Supply Current IF = 10mA TA =25°C IR = 10µA IF = 10mA – – 5.0 – – – – -1.5 1.8 1.75 – – V mV/°C V Parameter Test Conditions Min. Typ.(3) Max. Unit DETECTOR ICCH ICCL IF = 0mA, VCC = 3.3V IF = 10mA, VCC = 3.3V – – 7.1 6.7 10 15 mA mA Switching Characteristics (TA = -40°C to +85°C, VCC = 3.3V, IF = 7.5 mA Unless otherwise specified.) Symbol TPLH AC Characteristics Propagation Delay Time to Output High Level Propagation Delay Time to Output Low Level Test Conditions RL = 350Ω, CL = 15pF Note 4, Fig. 10 RL = 350Ω, CL = 15pF Note 5, Fig. 10 RL = 350Ω, CL = 15pF Fig. 10 RL = 350Ω, CL = 15pF) Note 6, Fig. 10 RL = 350Ω, CL = 15pF Note 7, Fig. 10 RL = 350Ω, TA = 25°C, IF = 0 mA, VCC = 3.3V, VO(Min.) = 2V |VCM| = 1,000V Notes 8, 11, Fig. 11 RL = 350Ω, TA =25°C, IF = 7.5mA, VCC = 3.3V, VO(Max.) = 0.8V |VCM| = 1,000V Notes 9, 11, Fig. 11 Min. – Typ.(3) – Max. 90 Unit ns TPHL – – 75 ns |TPHL–TPLH| Pulse Width Distortion tr tf |CMH| Output Rise Time (10–90%) Output Fall Time (90–10%) Common Mode Transient Immunity (at Output High Level) Common Mode Transient Immunity (at Output Low Level) – – – 25,000 – 16 4 – 25 – – – ns ns ns V/µs |CML| 25,000 – – V/µs 4 HCPL062N Rev. 1.0.0 www.fairchildsemi.com HCPL062N 3.3V Dual Channel High Speed-10 MBit/s Logic Gate Optocouplers Transfer Characteristics (TA = -40°C to +85°C Unless otherwise specified.) Symbol VOL IFT DC Characteristics Low Level Output Voltage Input Threshold Current Test Conditions VCC = 3.3V, IF = 5mA, IOL = 13mA VCC = 3.3V, VO = 0.6V, IOL = 13mA Min. – – Typ.(3) – – Max. 0.6 5 Unit V mA Isolation Characteristics (TA = -40°C to +85°C Unless otherwise specified.) Symbol II-O Characteristics Input-Output Insulation Leakage Current Withstand Insulation Test Voltage Resistance (Input to Output) Capacitance (Input to Output) Test Conditions Relative humidity = 45% TA = 25°C, t = 5 sec. VI-O = 3000 VDC, Note 10 RH < 50%, TA = 25°C II-O ≤ 2µA, t = 1 min., Note 10 VI-O = 500V, Note 10 f = 1MHz, Note 10 Min. – Typ.(3) – Max. 1.0 Unit µA VISO 2500 – – VRMS RI-O CI-O – – 1012 0.6 – – Ω pF Notes: 3. All typical values are at VCC = 3.3V, TA = 25°C unless otherwise specified. 4. tPLH – Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse. 5. tPHL – Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse. 6. tr – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse. 7. tf – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse. 8. CMH – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., VOUT > 2.0 V). Measured in volts per microsecond (V/µs). 9. CML – The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state (i.e., VOUT < 0.8 V). Measured in volts per microsecond (V/µs). 10. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together. 11. The power supply bypass capacitors must be no further than 3mm from the leads of the optocoupler. A low inductance ground plane width of with ≤ 5nHy of series lead inductance is required. 5 HCPL062N Rev. 1.0.0 www.fairchildsemi.com HCPL062N 3.3V Dual Channel High Speed-10 MBit/s Logic Gate Optocouplers Typical Performance Curves Fig. 1 Forward Current vs. Forward Voltage 100 Fig. 2 High Level Output Current vs. Ambient Temperature 12 IOH – HIGH LEVEL OUTPUT CURRENT (nA) VO = VCC = 3.3V IF = 250µA 10 IF – FORWARD CURRENT (mA) 10 TA = 100oC 1 TA = 85oC 0.1 TA = 0oC TA = 25oC TA = -40oC 8 6 4 0.01 2 0.001 0.8 0 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 -40 -20 0 20 40 60 80 100 VF – FORWARD VOLTAGE (V) TA – AMBIENT TEMPERATURE (°C) Fig. 3 Low Level Output Current vs. Ambient Temperature 40 2.5 Fig. 4 Input Threshold Current vs. Temperature VCC = 3.3V VO = 0.6V RL = 350Ω, 1kΩ, 4kΩ IOL - LOW LEVEL OUTPUT CURRENT (mA) V 35 VOL = 0.6V IF = 5mA ITH - INPUT THRESHOLD CURRENT (mA) CC = 3.3V 2.0 30 1.5 25 1.0 20 0.5 15 10 -40 0.0 -20 0 20 40 60 80 100 -40 -20 0 20 40 60 80 100 TA – AMBIENT TEMPERATURE (°C) TA – AMBIENT TEMPERATURE (°C) 6 HCPL062N Rev. 1.0.0 www.fairchildsemi.com HCPL062N 3.3V Dual Channel High Speed-10 MBit/s Logic Gate Optocouplers Typical Performance Curves (Continued) Fig. 5 Pulse Width Distortion vs. Ambient Temperature 30 VCC = 3.3V 25 IF = 7.5mA RL = 350Ω 100 Fig. 6 Propagation Delay vs. Pulse Input Current 120 VCC = 3.3V RL = 350Ω PWD – PULSE WIDTH DISTORTION (ns) tP – PROPAGATION DELAY (ns) TA = 25oC 20 80 tPLH 60 tPHL 40 15 10 5 20 0 -40 -20 0 20 40 60 80 100 0 5 7 9 11 13 15 TA – AMBIENT TEMPERATURE (˚C) IF – PULSE INPUT CURRENT (mA) Fig. 7 Propagation Delay vs. Ambient Temperature 100 VCC = 3.3V 90 IF = 7.5mA RL = 350Ω 80 70 tPLH 60 50 tPHL 40 30 20 -40 -20 0 20 40 60 80 100 Fig. 8 Rise and Fall Times vs. Ambient Temperature 30 VCC = 3.3V IF = 7.5mA 25 RL = 350Ω tP – PROPAGATION DELAY (ns) tr, tf – RISE, FALL TIMES (ns) 20 tr 15 10 5 tf 0 -40 -20 0 20 40 60 80 100 TA – AMBIENT TEMPERATURE (˚C) TA – AMBIENT TEMPERATURE (˚C) 7 HCPL062N Rev. 1.0.0 www.fairchildsemi.com HCPL062N 3.3V Dual Channel High Speed-10 MBit/s Logic Gate Optocouplers Typical Performance Curves (Continued) Fig. 9 Low Level Output Voltage vs. Ambient Temperature 0.6 VCC = 3.3V VOL – LOW LEVEL OUTPUT VOLTAGE (V) 0.5 IO = 13mA IF = 5mA 0.4 0.3 0.2 0.1 0.0 -40 -20 0 20 40 60 80 100 TA – AMBIENT TEMPERATURE (˚C) 8 HCPL062N Rev. 1.0.0 www.fairchildsemi.com HCPL062N 3.3V Dual Channel High Speed-10 MBit/s Logic Gate Optocouplers Test Circuits Fig. 10 Test Circuit and Waveforms for tPLH, tPHL, tr and tf Pulse Gen. ZO = 50 Ω tf = tr = 5 ns IF 1 Input Monitoring Node RM 4 GND 5 2 3 VCC 8 RL 7 6 0.1µF Bypass Out




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