(HCPL0611 - HCPL0639) High Speed-10 MBit/s Logic Gate Optocouplers

HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers January 2007 HCPL0600, HCPL0601, HCPL0611, HCPL0637, HCPL0638, HCPL0639 High Speed-10 MBit/s Logic Gate Optocouplers Single Channel: HCPL0600, HCPL0601, HCPL0611 Dual Channel: HCPL0637, HCPL0638, HCPL0639 Features ■ Compact SO8 package ■ ■ ■ ■ ■ ■ ■ tm Description The HCPL06XX optocouplers consist of an AlGaAS LED, optically coupled to a very high speed integrated photo-detector logic gate with a strobable output (single channel devices). The devices are housed in a compact small-outline package. This output features an open collector, thereby permitting wired OR outputs. The HCPL0600, HCPL0601 and HCPL0611 output consists of bipolar transistors on a bipolar process while the HCPL0637, HCPL0638, and HCPL0639 output consists of bipolar transistors on a CMOS process for reduced power consumption. The coupled parameters are guaranteed over the temperature range of -40°C to +85°C. An internal noise shield provides superior common mode rejection. Very high speed-10 MBit/s Superior CMR Logic gate output Strobable output (single channel devices) Wired OR-open collector U.L. recognized (File # E90700) VDE approval pending Applications ■ Ground loop elimination ■ LSTTL to TTL, LSTTL or 5-volt CMOS ■ Line receiver, data transmission ■ Data multiplexing ■ Switching power supplies ■ Pulse transformer replacement ■ Computer-peripheral interface Package Dimensions 0.164 (4.16) 0.144 (3.66) SEATING PLANE Pin 1 0.202 (5.13) 0.182 (4.63) 0.019 (0.48) 0.010 (0.25) 0.006 (0.16) 0.143 (3.63) 0.123 (3.13) 0.021 (0.53) 0.011 (0.28) 0.008 (0.20) 0.003 (0.08) 0.050 (1.27) TYP 0.244 (6.19) 0.224 (5.69) Lead Coplanarity : 0.004 (0.10) MAX Note: All dimensions are in inches (millimeters) ©2006 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com HCPL06XX Rev. 1.0.7 HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers N/C 1 8 VCC +1 V F1 8 VCC +2 VF _ 3 7 VE _2 7 V01 6 VO _ V 3 6 V02 F2 N/C 4 5 GND +4 5 GND Single-channel circuit drawing (HCPL0600, HCPL0601 and HCPL0611) Dual-channel circuit drawing (HCPL0637, HCPL0638 and HCPL0639) TRUTH TABLE (Positive Logic) Input H L H L H* L* Enable H H L L NC* NC* Output L H H H L* H* *Dual channel devices or single channel devices with pin 7 not connected. A 0.1µF bypass capacitor must be connected between pins 8 and 5. (See note 1) 2 HCPL06XX Rev. 1.0.7 www.fairchildsemi.com HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers Absolute Maximum Ratings (No derating required up to 85°C) Symbol TSTG TOPR EMITTER IF VE VR PI DETECTOR Supply Voltage VCC (1 minute max) IO VO PO Output Current (each channel) Output Voltage (each channel) Collector Output Power Dissipation Single Channel Dual Channel Single Channel Dual Channel 7.0 50 15 7.0 85 85 V mW V mA DC/Average Forward Input Current (each channel) Enable Input Voltage Not to exceed VCC by more than 500mV Reverse Input Voltage (each channel) Power Dissipation Single Channel Dual Channel Single Channel Dual Channel Single Channel 5.5 5.0 45 V V mW 50 mA Storage Temperature Operating Temperature Parameter Value -40 to +125 -40 to +85 Units °C °C Recommended Operating Conditions Symbol IFL IFH VCC VEL VEH TA N RL Parameter Input Current, Low Level Input Current, High Level Supply Voltage, Output Enable Voltage, Low Level Enable Voltage, High Level Operating Temperature Fan Out (TTL load) Output Pull-up Single Channel Dual Channel Single Channel only Single Channel only Min. 0 *6.3 4.5 0 2.0 -40 Max. 250 15 5.5 0.8 VCC +85 8 5 Units µA mA V V V °C TTL Loads Ω 330 4K *6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is 5.0mA or less 3 HCPL06XX Rev. 1.0.7 www.fairchildsemi.com HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers Electrical Characteristics (TA = -40°C to +85°C Unless otherwise specified.) Individual Component Characteristics Symbol EMITTER VF BVR ∆VF/∆TA DETECTOR ICCH ICCL IEL IEH VEH VEL High Level Supply Current IF = 0mA, VCC = 5.5V IF = 10mA, VCC = 5.5V VE = 0.5 V Single Channel Dual Channel VE = 0.5 V Single Channel Dual Channel Single Channel Single Channel Single Channel Single Channel 2.0 0.8 10 15 13 21 -1.6 -1.6 mA mA V V mA mA Input Forward Voltage IF = 10mA TA = 25°C Input Reverse Breakdown Voltage Input Diode Temperature Coefficient IR = 10µA IF = 10mA 5.0 -1.5 1.8 1.75 V mV/°C V Parameter Test Conditions Min. Typ.** Max. Unit Low Level Supply Current Low Level Enable Current High Level Enable Current High Level Enable Voltage Low Level Enable Voltage VCC = 5.5V, VE = 0.5V VCC = 5.5V, VE = 2.0V VCC = 5.5V, IF = 10mA VCC = 5.5V, IF = 10mA(2) Switching Characteristics (TA = -40°C to +85°C, VCC = 5 V, IF = 7.5 mA Unless otherwise specified.) Symbol TPLH TPHL AC Characteristics Propagation Delay Time to Output High Level Propagation Delay Time to Output Low Level (Fig. 20) Test Conditions RL = 350Ω, CL = 15pF(3) TA = 25°C TA = 25°C Device All Min. 20 Typ. Max. Unit 75 100 ns RL = 350Ω, CL = 15pF(4) (Fig. 20) All 25 75 100 ns |TPHL-TPLH| Pulse Width Distortion tr tf tELH RL = 350Ω, CL = 15pF (Fig. 20) All Single Ch Dual Ch 50 35 ns ns Output Rise Time (10-90%) RL = 350Ω, CL = 15pF(5) (Fig. 20) Output Fall Time (90-10%) RL = 350Ω, CL = 15pF(6) (Fig. 20) IF = 7.5mA, VEH = 3.5V, RL = 350Ω, CL = 15pF(7) (Fig. 21) IF = 7.5mA, VEH = 3.5V, RL = 350Ω, CL = 15 pF(8) (Fig. 21) RL = 350Ω, TA =25°C, IF = 0mA, VOH (Min.) = 2.0 V(9) (Fig. 22, 23) |VCM| = 10V |VCM| = 50V 17 12 ns Single Ch Dual Ch 5 20 ns Enable Propagation Delay Time to Output High Level Enable Propagation Delay Time to Output Low Level Common Mode Transient Immunity (at Output High Level) HCPL0600 HCPL0601 HCPL0611 HCPL0600 HCPL0601 HCPL0611 HCPL0600 HCPL0637 HCPL0601 HCPL0638 5000 tEHL 20 ns |CMH| V/µs |VCM| = 1,000V HCPL0611 10,000 HCPL0639 25,000 |CMH| Common Mode Transient Immunity (at Output Low Level) RL = 350Ω, TA =25°C, IF = 7.5mA, VOL (Max.) = 0.8 V(10) (Fig. 22, 23) |VCM| = 10V |VCM| = 50V HCPL0600 HCPL0637 HCPL0601 HCPL0638 5000 V/µs |VCM| = 1,000V HCPL0611 10,000 HCPL0639 25,000 4 HCPL06XX Rev. 1.0.7 www.fairchildsemi.com HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers Transfer Characteristics (TA = -40°C to +85°C Unless otherwise specified.) Symbol IOH VOL IFT DC Characteristics High Level Output Current Low Level Output Voltage Input Threshold Current Test Conditions VCC = 5.5V, VO = 5.5 V, IF = 250µA, VE = 2.0V(2) VCC = 5.5V, IF = 5mA, VE = 2.0V, IOL = 13mA(2) VCC = 5.5V, VO = 0.6V, VE = 2.0V, IOL = 13mA Min. Typ.** Max. 100 0.6 5 Unit µA V mA Isolation Characteristics (TA = -40°C to +85°C Unless otherwise specified.) Symbol II-O Characteristics Input-Output Insulation Leakage Current Withstand Insulation Test Voltage Resistance (Input to Output) Capacitance (Input to Output) Test Conditions Relative humidity = 45%, TA = 25°C, t = 5s, VI-O = 3000 VDC(11) RH < 50%, TA = 25°C, II-O ≤ 2µA, t = 1 min.(11) VI-O = 500V(11) f= 1MHz(11) Min. Typ.** Max. 1.0* Unit µA VISO RI-O CI-O 3750 1012 0.6 VRMS Ω pF ** All typical values are at VCC = 5 V, TA = 25°C Notes: 1. The VCC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V CC and GND pins of each device. 2. Enable Input – No pull up resistor required as the device has an internal pull up resistor. 3. tPLH – Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse. 4. tPHL – Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse. 5. tr – Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse. 6. tf – Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse. 7. tELH – Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse. 8. tEHL – Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse. 9. CMH – The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., VOUT > 2.0 V). Measured in volts per microsecond (V/µs). 10. CML – The maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state (i.e., VOUT < 0.8 V). Measured in volts per microsecond (V/µs). 11. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together. 5 HCPL06XX Rev. 1.0.7 www.fairchildsemi.com HCPL06XX High Speed-10 MBit/s Logic Gate Optocouplers Typical Performance Curves (HCPL0600, HCPL0601 and HCPL0611 only) Fig. 1 Forward Current vs. Input Forward Voltage 100 6 TA = 25°C VCC = 5V Fig. 2 Output Voltage vs. Forward Current IF - FORWARD CURRENT (mA) 10 TA = 85°C 1 TA = 70°C TA = 25°C 0.1 TA = 0°C TA = -40°C 5 Vo - OUTPUT VOLTAGE (V) 4 RL = 350Ω 3 RL = 1kΩ 2 0.01 1 0.001 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 0 0 1 2 3 4 5 VF - FORWARD VOLTAGE (V) IF - FORWARD INPUT CURRENT (mA) Fig. 3 Input Threshold Current vs. Temperature 5 Fig. 4 High Level Output Current vs. Temperature 16 ITH - INPUT THRESHOLD CURRENT (mA) VCC = 5V VO = 0.6V 4 IOH - HIGH LEVEL OUTPUT CURRENT (µA) 14 12 10 8 6 4 2 0 VO = VCC